| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 99 ST.getOccupancyWithNumVGPRs(getVGPRNum(ST.hasGFX90AInsts()))); in less()
104 ST.getOccupancyWithNumVGPRs(O.getVGPRNum(ST.hasGFX90AInsts()))); in less()
132 std::max(static_cast<int>(getVGPRNum(ST.hasGFX90AInsts()) + in less()
136 std::max(static_cast<int>(O.getVGPRNum(ST.hasGFX90AInsts()) + in less()
150 static_cast<int>(ST.hasGFX90AInsts() ? (getAGPRNum() - MaxArchVGPRs) in less()
154 static_cast<int>(ST.hasGFX90AInsts() ? (O.getAGPRNum() - MaxArchVGPRs) in less()
176 std::max(static_cast<int>(getVGPRNum(ST.hasGFX90AInsts()) - MaxVGPRs), in less()
181 static_cast<int>(O.getVGPRNum(ST.hasGFX90AInsts()) - MaxVGPRs), in less()
222 (getVGPRNum(ST.hasGFX90AInsts()) < in less()
223 O.getVGPRNum(ST.hasGFX90AInsts())); in less()
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| H A D | GCNPreRAOptimizations.cpp | 233 (ST.hasGFX90AInsts() || !TRI->isAGPRClass(RC))) in runOnMachineFunction()
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| H A D | AMDGPUAsmPrinter.cpp | 507 assert(STM.hasGFX90AInsts() || !EvaluatableRsrc3 || in getAmdhsaKernelDescriptor()
624 if (STM.hasGFX90AInsts()) { in runOnMachineFunction()
663 assert(STM.hasGFX90AInsts() || in runOnMachineFunction()
667 if (STM.hasGFX90AInsts()) { in runOnMachineFunction()
1061 if (STM.hasGFX90AInsts()) { in getSIProgramInfo()
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| H A D | GCNSubtarget.h | 675 bool hasLdsAtomicAddF64() const { return hasGFX90AInsts(); } in hasLdsAtomicAddF64()
1226 bool hasGFX90AInsts() const { return GFX90AInsts; } in hasGFX90AInsts() function
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| H A D | SIRegisterInfo.cpp | 398 return ST.hasGFX90AInsts() ? CSR_AMDGPU_GFX90AInsts_SaveList in getCalleeSavedRegs()
401 return ST.hasGFX90AInsts() ? CSR_AMDGPU_SI_Gfx_GFX90AInsts_SaveList in getCalleeSavedRegs()
424 return ST.hasGFX90AInsts() ? CSR_AMDGPU_GFX90AInsts_RegMask in getCallPreservedMask()
427 return ST.hasGFX90AInsts() ? CSR_AMDGPU_SI_Gfx_GFX90AInsts_RegMask in getCallPreservedMask()
683 if (ST.hasGFX90AInsts()) { in getReservedRegs()
723 if (ST.hasMAIInsts() && !ST.hasGFX90AInsts()) { in getReservedRegs()
951 if (isAGPRClass(RC) && !ST.hasGFX90AInsts()) in getCrossCopyRegClass()
1351 const bool IsAGPR = !ST.hasGFX90AInsts() && isAGPRClass(RC); in buildSpillLoadStore()
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| H A D | GCNRegPressure.h | 65 ST.getOccupancyWithNumVGPRs(getVGPRNum(ST.hasGFX90AInsts()))); in getOccupancy()
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| H A D | SIFormMemoryClauses.cpp | 207 MaxPressure.getVGPRNum(ST->hasGFX90AInsts()) <= MaxVGPRs / 2 && in checkPressure()
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| H A D | SIFoldOperands.cpp | 991 else if (ST->hasGFX90AInsts() && TRI->isAGPR(*MRI, Reg0) && in foldOperand()
1778 if (!ST->hasGFX90AInsts() || !TRI->isVGPR(*MRI, Reg) || in tryFoldRegSequence()
1987 if (IsAGPR32 && !ST->hasGFX90AInsts() && !MRI->hasOneNonDBGUse(Reg) && in tryFoldPhiAGPR()
2027 if (!ST->hasGFX90AInsts() || MI.getNumExplicitDefs() != 1) in tryFoldLoad()
2115 if (ST->hasGFX90AInsts()) in tryOptimizeAGPRPhis()
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| H A D | AMDGPU.td | 1817 Predicate<"!Subtarget->hasGFX90AInsts() &&"
1874 Predicate<"Subtarget->isGCN3Encoding() && !Subtarget->hasGFX90AInsts()">,
1878 Predicate<"Subtarget->hasGFX90AInsts()">,
1882 Predicate<"!Subtarget->hasGFX90AInsts()">,
1886 Predicate<"!Subtarget->hasGFX90AInsts() &&"
1892 Predicate<"Subtarget->hasGFX90AInsts() && !Subtarget->hasGFX940Insts()">,
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| H A D | SIMachineFunctionInfo.cpp | 105 if (ST.hasGFX90AInsts() && in SIMachineFunctionInfo()
170 if (ST.hasMAIInsts() && !ST.hasGFX90AInsts()) { in SIMachineFunctionInfo()
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| H A D | GCNSchedStrategy.cpp | 1022 PressureAfter.getVGPRNum(ST.hasGFX90AInsts()) <= S.VGPRCriticalLimit) { in checkScheduling()
1071 if (PressureAfter.getVGPRNum(ST.hasGFX90AInsts()) > MaxVGPRs || in checkScheduling()
1450 int VGPRUsage = NewPressure[I].getVGPRNum(ST.hasGFX90AInsts()); in sinkTriviallyRematInsts()
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| H A D | AMDGPUResourceUsageAnalysis.cpp | 90 return AMDGPU::getTotalNumVGPRs(ST.hasGFX90AInsts(), ArgNumAGPR, ArgNumVGPR); in getTotalNumVGPRs()
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| H A D | GCNHazardRecognizer.cpp | 1945 return ST.hasGFX90AInsts() ? checkMAIHazards90A(MI) : checkMAIHazards908(MI); in checkMAIHazards()
2371 if (!ST.hasMAIInsts() || ST.hasGFX90AInsts()) in checkMAILdStHazards()
2449 if (!ST.hasGFX90AInsts()) in checkMAIVALUHazards()
2544 if (IsMem && ST.hasGFX90AInsts() && !ST.hasGFX940Insts()) { in checkMAIVALUHazards()
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| H A D | SIInstrInfo.cpp | 632 !TII.getSubtarget().hasGFX90AInsts()) && in indirectCopyToAGPR()
928 (ST.hasGFX90AInsts() && AMDGPU::SReg_32RegClass.contains(SrcReg))) { in copyPhysReg()
934 if (AMDGPU::AGPR_32RegClass.contains(SrcReg) && ST.hasGFX90AInsts()) { in copyPhysReg()
1065 if (ST.hasGFX90AInsts() && RI.isAGPRClass(SrcRC)) in copyPhysReg()
1068 (ST.hasGFX90AInsts() && RI.isSGPRClass(SrcRC))) in copyPhysReg()
4387 if (Opcode == AMDGPU::V_MUL_LEGACY_F32_e64 && ST.hasGFX90AInsts()) in hasVALU32BitEncoding()
5230 !ST.hasGFX90AInsts()) { in verifyInstruction()
5236 if (DC > DppCtrl::ROW_NEWBCAST_LAST || !ST.hasGFX90AInsts()) { in verifyInstruction()
5260 if (ST.hasGFX90AInsts()) { in verifyInstruction()
5318 !ST.hasGFX90AInsts()) { in verifyInstruction()
[all …]
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| H A D | SIFrameLowering.cpp | 1460 if (ST.hasMAIInsts() && !ST.hasGFX90AInsts()) { in processFunctionBeforeFrameIndicesReplaced()
1633 if (!ST.hasGFX90AInsts()) in determineCalleeSaves()
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| H A D | AMDGPUSubtarget.cpp | 839 if (hasGFX90AInsts()) in getBaseMaxNumVGPRs()
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| H A D | SIMemoryLegalizer.cpp | 970 if (ST.hasGFX90AInsts()) in create()
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| H A D | AMDGPUInstructionSelector.cpp | 1949 if (Subtarget->hasGFX90AInsts()) { in selectImageIntrinsic()
2020 if (!Subtarget->hasGFX90AInsts()) { in selectImageIntrinsic()
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| H A D | AMDGPULegalizerInfo.cpp | 1654 if (ST.hasGFX90AInsts()) { in AMDGPULegalizerInfo()
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| H A D | SIISelLowering.cpp | 8197 if (!Subtarget->hasGFX90AInsts()) { in lowerImage()
8229 if (Subtarget->hasGFX90AInsts()) { in lowerImage()
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