Lines Matching refs:hasGFX90AInsts

632           !TII.getSubtarget().hasGFX90AInsts()) &&  in indirectCopyToAGPR()
928         (ST.hasGFX90AInsts() && AMDGPU::SReg_32RegClass.contains(SrcReg))) {  in copyPhysReg()
934     if (AMDGPU::AGPR_32RegClass.contains(SrcReg) && ST.hasGFX90AInsts()) {  in copyPhysReg()
1065     if (ST.hasGFX90AInsts() && RI.isAGPRClass(SrcRC))  in copyPhysReg()
1068              (ST.hasGFX90AInsts() && RI.isSGPRClass(SrcRC)))  in copyPhysReg()
4387   if (Opcode == AMDGPU::V_MUL_LEGACY_F32_e64 && ST.hasGFX90AInsts())  in hasVALU32BitEncoding()
5230           !ST.hasGFX90AInsts()) {  in verifyInstruction()
5236       if (DC > DppCtrl::ROW_NEWBCAST_LAST || !ST.hasGFX90AInsts()) {  in verifyInstruction()
5260     if (ST.hasGFX90AInsts()) {  in verifyInstruction()
5318       !ST.hasGFX90AInsts()) {  in verifyInstruction()
5552   if ((IsAllocatable || !ST.hasGFX90AInsts() || !MRI.reservedRegsFrozen()) &&  in adjustAllocatableRegClass()
5787         (!ST.hasGFX90AInsts() || !MRI.reservedRegsFrozen()) &&  in isOperandLegal()
5809     if (Opc == AMDGPU::V_ACCVGPR_WRITE_B32_e64 && !ST.hasGFX90AInsts() &&  in isOperandLegal()
9267   if (ST.hasGFX90AInsts()) {  in pseudoToMCOpcode()