| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMTargetStreamer.cpp | 139 if (STI.hasFeature(ARM::HasV9_0aOps)) in getArchForCPU() 141 else if (STI.hasFeature(ARM::HasV8Ops)) { in getArchForCPU() 142 if (STI.hasFeature(ARM::FeatureRClass)) in getArchForCPU() 145 } else if (STI.hasFeature(ARM::HasV8_1MMainlineOps)) in getArchForCPU() 147 else if (STI.hasFeature(ARM::HasV8MMainlineOps)) in getArchForCPU() 149 else if (STI.hasFeature(ARM::HasV7Ops)) { in getArchForCPU() 150 if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP)) in getArchForCPU() 153 } else if (STI.hasFeature(ARM::HasV6T2Ops)) in getArchForCPU() 155 else if (STI.hasFeature(ARM::HasV8MBaselineOps)) in getArchForCPU() 157 else if (STI.hasFeature(ARM::HasV6MOps)) in getArchForCPU() [all …]
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| H A D | ARMAsmBackend.cpp | 183 bool HasThumb2 = STI.hasFeature(ARM::FeatureThumb2); in getRelaxedOpcode() 184 bool HasV8MBaselineOps = STI.hasFeature(ARM::HasV8MBaselineOps); in getRelaxedOpcode() 356 if (STI->hasFeature(ARM::ModeThumb)) { in writeNopData() 640 (!STI->hasFeature(ARM::FeatureThumb2) && in adjustFixupValue() 641 !STI->hasFeature(ARM::HasV8MBaselineOps) && in adjustFixupValue() 642 !STI->hasFeature(ARM::HasV6MOps) && in adjustFixupValue() 733 if (!STI->hasFeature(ARM::FeatureThumb2) && IsResolved) { in adjustFixupValue() 758 if (!STI->hasFeature(ARM::FeatureThumb2) && in adjustFixupValue() 759 !STI->hasFeature(ARM::HasV8MBaselineOps)) { in adjustFixupValue() 770 if (!STI->hasFeature(ARM::FeatureThumb2)) { in adjustFixupValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYELFStreamer.cpp | 196 if (STI.hasFeature(CSKY::HasE1)) in emitTargetAttributes() 199 if (STI.hasFeature(CSKY::HasE2)) in emitTargetAttributes() 202 if (STI.hasFeature(CSKY::Has2E3)) in emitTargetAttributes() 205 if (STI.hasFeature(CSKY::HasMP)) in emitTargetAttributes() 208 if (STI.hasFeature(CSKY::Has3E3r1)) in emitTargetAttributes() 211 if (STI.hasFeature(CSKY::Has3r1E3r2)) in emitTargetAttributes() 214 if (STI.hasFeature(CSKY::Has3r2E3r3)) in emitTargetAttributes() 217 if (STI.hasFeature(CSKY::Has3E7)) in emitTargetAttributes() 220 if (STI.hasFeature(CSKY::HasMP1E2)) in emitTargetAttributes() 223 if (STI.hasFeature(CSKY::Has7E10)) in emitTargetAttributes() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 55 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in generateInstSeqImpl() 58 if (STI.hasFeature(RISCV::FeatureStdExtZbs) && isPowerOf2_64(Val) && in generateInstSeqImpl() 64 if (!IsRV64 && STI.hasFeature(RISCV::FeatureVendorXqcili)) { in generateInstSeqImpl() 157 STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqImpl() 168 STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqImpl() 241 if (LeadingZeros == 32 && STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqLeadingZeros() 272 isInt<6>(ShiftedVal) && !STI.hasFeature(RISCV::TuneLUIADDIFusion); in generateInstSeq() 288 assert(STI.hasFeature(RISCV::Feature64Bit) && in generateInstSeq() 332 if (Res.size() > 2 && STI.hasFeature(RISCV::FeatureStdExtZbkb)) { in generateInstSeq() 346 if (Res.size() > 2 && STI.hasFeature(RISCV::FeatureStdExtZbs)) { in generateInstSeq() [all …]
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| H A D | RISCVTargetStreamer.cpp | 118 HasRVC = STI.hasFeature(RISCV::FeatureStdExtZca); in setFlagsFromFeatures() 119 HasTSO = STI.hasFeature(RISCV::FeatureStdExtZtso); in setFlagsFromFeatures() 136 STI.hasFeature(RISCV::Feature64Bit), STI.getFeatureBits()); in emitTargetAttributes() 144 if (RiscvAbiAttr && STI.hasFeature(RISCV::FeatureStdExtA)) { in emitTargetAttributes() 146 if (STI.hasFeature(RISCV::FeatureStdExtZalasr)) in emitTargetAttributes() 148 else if (STI.hasFeature(RISCV::FeatureNoTrailingSeqCstFence)) in emitTargetAttributes()
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| H A D | RISCVAsmBackend.cpp | 161 if (!STI.hasFeature(RISCV::FeatureVendorXqcili)) in getRelaxedOpcode() 174 if (!STI.hasFeature(RISCV::FeatureVendorXqcilb)) in getRelaxedOpcode() 230 if (STI.hasFeature(RISCV::FeatureExactAssembly)) in relaxInstruction() 251 assert(STI.hasFeature(RISCV::FeatureVendorXqcilb) && in relaxInstruction() 270 assert(STI.hasFeature(RISCV::FeatureVendorXqcili) && in relaxInstruction() 443 if (STI.hasFeature(RISCV::FeatureExactAssembly)) in mayNeedRelaxation() 464 OS.write(STI->hasFeature(RISCV::FeatureStdExtZca) ? "\x01\0" : "\0\0", 2); in writeNopData() 923 if (!STI->hasFeature(RISCV::FeatureRelax)) in shouldInsertExtraNopBytesForCodeAlign() 926 unsigned MinNopLen = STI->hasFeature(RISCV::FeatureStdExtZca) ? 2 : 4; in shouldInsertExtraNopBytesForCodeAlign() 945 if (!STI->hasFeature(RISCV::FeatureRelax)) in shouldInsertFixupForCodeAlign()
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| H A D | RISCVMCObjectFileInfo.cpp | 22 return STI.hasFeature(RISCV::FeatureStdExtZca) ? 2 : 4; in getTextSectionAlignment()
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/cpu_model/ |
| H A D | x86.c | 827 #define hasFeature(F) ((Features[F / 32] >> (F % 32)) & 1) in getAvailableFeatures() macro 1107 if (hasFeature(FEATURE_LM) && hasFeature(FEATURE_SSE2)) { in getAvailableFeatures() 1109 if (hasFeature(FEATURE_CMPXCHG16B) && hasFeature(FEATURE_POPCNT) && in getAvailableFeatures() 1110 hasFeature(FEATURE_LAHF_LM) && hasFeature(FEATURE_SSE4_2)) { in getAvailableFeatures() 1112 if (hasFeature(FEATURE_AVX2) && hasFeature(FEATURE_BMI) && in getAvailableFeatures() 1113 hasFeature(FEATURE_BMI2) && hasFeature(FEATURE_F16C) && in getAvailableFeatures() 1114 hasFeature(FEATURE_FMA) && hasFeature(FEATURE_LZCNT) && in getAvailableFeatures() 1115 hasFeature(FEATURE_MOVBE)) { in getAvailableFeatures() 1117 if (hasFeature(FEATURE_AVX512BW) && hasFeature(FEATURE_AVX512CD) && in getAvailableFeatures() 1118 hasFeature(FEATURE_AVX512DQ) && hasFeature(FEATURE_AVX512VL)) in getAvailableFeatures() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCAsmInfo.cpp | 74 if (STI->hasFeature(AMDGPU::FeatureNSAEncoding)) in getMaxInstLength() 78 if (STI->hasFeature(AMDGPU::FeatureGFX950Insts)) in getMaxInstLength() 82 if (STI->hasFeature(AMDGPU::FeatureVOP3Literal)) in getMaxInstLength()
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| H A D | AMDGPUMCCodeEmitter.cpp | 155 STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in getLit16Encoding() 212 STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in getLit32Encoding() 253 STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in getLit64Encoding() 259 return STI.hasFeature(AMDGPU::Feature64BitLiterals) && Lo_32(Val) ? 254 in getLit64Encoding() 263 return STI.hasFeature(AMDGPU::Feature64BitLiterals) && in getLit64Encoding() 275 return (STI.hasFeature(AMDGPU::Feature64BitLiterals) && in getLitEncoding() 426 if ((bytes > 8 && STI.hasFeature(AMDGPU::FeatureVOP3Literal)) || in encodeInstruction() 427 (bytes > 4 && !STI.hasFeature(AMDGPU::FeatureVOP3Literal))) in encodeInstruction() 459 assert(STI.hasFeature(AMDGPU::Feature64BitLiterals)); in encodeInstruction()
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| H A D | AMDGPUMCTargetDesc.cpp | 86 if (!STI->hasFeature(AMDGPU::FeatureWavefrontSize64) && in createAMDGPUMCSubtargetInfo() 87 !STI->hasFeature(AMDGPU::FeatureWavefrontSize32)) { in createAMDGPUMCSubtargetInfo()
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| H A D | R600MCCodeEmitter.cpp | 100 if (!(STI.hasFeature(R600::FeatureCaymanISA))) { in encodeInstruction() 128 if ((STI.hasFeature(R600::FeatureR600ALUInst)) && in encodeInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcTargetStreamer.cpp | 27 if (STI.hasFeature(Sparc::FeatureV8Plus)) in getEFlagsForFeatureSet() 30 if (STI.hasFeature(Sparc::FeatureVIS)) in getEFlagsForFeatureSet() 33 if (STI.hasFeature(Sparc::FeatureVIS2)) in getEFlagsForFeatureSet()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 60 if (!STI.hasFeature(AMDGPU::FeatureGCN3Encoding) && !isGFX10Plus()) in AMDGPUDisassembler() 623 if (STI.hasFeature(AMDGPU::Feature64BitLiterals)) { in getInstruction() 636 STI.hasFeature(AMDGPU::FeatureGFX950Insts)) { in getInstruction() 648 if (STI.hasFeature(AMDGPU::FeatureGFX10_BEncoding) && in getInstruction() 652 if (STI.hasFeature(AMDGPU::FeatureUnpackedD16VMem) && in getInstruction() 656 if (STI.hasFeature(AMDGPU::FeatureGFX950Insts) && in getInstruction() 663 if (STI.hasFeature(AMDGPU::FeatureFmaMixInsts) && in getInstruction() 667 if (STI.hasFeature(AMDGPU::FeatureGFX940Insts) && in getInstruction() 671 if (STI.hasFeature(AMDGPU::FeatureGFX90AInsts) && in getInstruction() 726 if (STI.hasFeature(AMDGPU::FeatureGFX950Insts) && in getInstruction() [all …]
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| /freebsd/contrib/llvm-project/clang/lib/Basic/Targets/ |
| H A D | Hexagon.cpp | 88 if (hasFeature("hvx-length64b")) { in getTargetDefines() 94 if (hasFeature("hvx-length128b")) { in getTargetDefines() 102 if (hasFeature("audio")) { in getTargetDefines() 227 bool HexagonTargetInfo::hasFeature(StringRef Feature) const { in hasFeature() function in HexagonTargetInfo
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| H A D | X86.h | 348 bool hasFeature(StringRef Feature) const final; 519 if (hasFeature("cx8")) in setMaxAtomicWidth() 585 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128; in handleTargetFeatures() 833 if (hasFeature("cx16")) in setMaxAtomicWidth() 1032 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128; in handleTargetFeatures()
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| H A D | Lanai.cpp | 53 bool LanaiTargetInfo::hasFeature(StringRef Feature) const { in hasFeature() function in LanaiTargetInfo
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 287 assert((STI.hasFeature(X86::Is32Bit) || STI.hasFeature(X86::Is64Bit)) && in determinePaddingPrefix() 328 if (STI.hasFeature(X86::Is64Bit)) in determinePaddingPrefix() 476 if (!(STI.hasFeature(X86::Is64Bit) || STI.hasFeature(X86::Is32Bit))) in canPadBranches() 782 bool Is16BitMode = STI.hasFeature(X86::Is16Bit); in relaxInstruction() 980 if (STI.hasFeature(X86::Is16Bit)) in getMaximumNopSize() 982 if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Is64Bit)) in getMaximumNopSize() 984 if (STI.hasFeature(X86::TuningFast7ByteNOP)) in getMaximumNopSize() 986 if (STI.hasFeature(X86::TuningFast15ByteNOP)) in getMaximumNopSize() 988 if (STI.hasFeature(X86::TuningFast11ByteNOP)) in getMaximumNopSize() 1037 STI->hasFeature(X86::Is16Bit) ? Nops16Bit : Nops32Bit; in writeNopData()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 596 if (ST.hasFeature(AMDGPU::FeatureGFX1250Insts)) in getVOPDEncodingFamily() 598 if (ST.hasFeature(AMDGPU::FeatureGFX12Insts)) in getVOPDEncodingFamily() 600 if (ST.hasFeature(AMDGPU::FeatureGFX11Insts)) in getVOPDEncodingFamily() 2297 return STI.hasFeature(AMDGPU::FeatureXNACK); in hasXNACK() 2301 return STI.hasFeature(AMDGPU::FeatureSRAMECC); in hasSRAMECC() 2305 return STI.hasFeature(AMDGPU::FeatureMIMG_R128) && in hasMIMG_R128() 2306 !STI.hasFeature(AMDGPU::FeatureR128A16); in hasMIMG_R128() 2310 return STI.hasFeature(AMDGPU::FeatureA16); in hasA16() 2314 return STI.hasFeature(AMDGPU::FeatureG16); in hasG16() 2318 return !STI.hasFeature(AMDGPU::FeatureUnpackedD16VMem) && !isCI(STI) && in hasPackedD16() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchAsmBackend.cpp | 187 if (!AF.getSubtargetInfo()->hasFeature(LoongArch::FeatureRelax)) in shouldInsertExtraNopBytesForCodeAlign() 210 if (!AF.getSubtargetInfo()->hasFeature(LoongArch::FeatureRelax)) in shouldInsertFixupForCodeAlign() 252 return STI.hasFeature(LoongArch::FeatureRelax); in shouldForceRelocation() 485 if (&SecA == &SecB && !STI.hasFeature(LoongArch::FeatureRelax)) in addReloc() 533 OSABI, Is64Bit, STI.hasFeature(LoongArch::FeatureRelax)); in createObjectTargetWriter()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURemoveIncompatibleFunctions.cpp | 190 if (ST->hasFeature(Feature) && !GPUFeatureBits.test(Feature)) { in checkFunction() 201 ST->hasFeature(AMDGPU::FeatureWavefrontSize32)) { in checkFunction()
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| H A D | GCNSubtarget.cpp | 102 } else if (!hasFeature(AMDGPU::FeatureWavefrontSize32) && in initializeSubtargetDependencies() 103 !hasFeature(AMDGPU::FeatureWavefrontSize64)) { in initializeSubtargetDependencies() 163 if (hasFeature(AMDGPU::FeatureWavefrontSize32) && in checkSubtargetFeatures() 164 hasFeature(AMDGPU::FeatureWavefrontSize64)) { in checkSubtargetFeatures()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Hexagon.cpp | 149 if (T.hasFeature("hvx")) { in classifyReturnType() 150 assert(T.hasFeature("hvx-length64b") || T.hasFeature("hvx-length128b")); in classifyReturnType() 151 uint64_t VecSize = T.hasFeature("hvx-length64b") ? 64*8 : 128*8; in classifyReturnType()
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| H A D | RISCV.cpp | 570 if ((EltType->isHalfTy() && !TI.hasFeature("zvfhmin")) || in coerceVLSVector() 571 (EltType->isBFloatTy() && !TI.hasFeature("zvfbfmin")) || in coerceVLSVector() 572 (EltType->isFloatTy() && !TI.hasFeature("zve32f")) || in coerceVLSVector() 573 (EltType->isDoubleTy() && !TI.hasFeature("zve64d")) || in coerceVLSVector() 574 (EltType->isIntegerTy(64) && !TI.hasFeature("zve64x")) || in coerceVLSVector()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaMIPS.cpp | 37 if (!TI.hasFeature("dsp")) in CheckMipsBuiltinCpu() 43 if (!TI.hasFeature("dspr2")) in CheckMipsBuiltinCpu() 50 if (!TI.hasFeature("msa")) in CheckMipsBuiltinCpu()
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