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Searched refs:getVectorShuffle (Results 1 – 23 of 23) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4825 static SDValue getVectorShuffle(SelectionDAG &DAG, EVT VT, const SDLoc &dl, in getVectorShuffle() function
4842 return DAG.getVectorShuffle(VT, dl, V1, V2, Mask); in getVectorShuffle()
4850 return getVectorShuffle(DAG, VT, dl, V1, V2, Mask); in getUnpackl()
4858 return getVectorShuffle(DAG, VT, dl, V1, V2, Mask); in getUnpackh()
4888 return DAG.getVectorShuffle(VT, dl, DAG.getBitcast(VT, LHS), in getPack()
4943 return DAG.getVectorShuffle(VT, SDLoc(V2), V1, V2, MaskVec); in getShuffleVectorZeroOrUndef()
7069 return DAG.getVectorShuffle(VT, SDLoc(V1), V1, VZeroOrUndef, Mask); in LowerBuildVectorv4x32()
7193 return DAG.getVectorShuffle(NVT, dl, V1, DAG.getUNDEF(NVT), Mask); in LowerAsSplatVectorLoad()
7411 return DAG.getVectorShuffle(VT, DL, V, Z, ClearMask); in EltsFromConsecutiveLoads()
7972 SDValue NV = DAG.getVectorShuffle(VT, DL, VecIn1, VecIn2, Mask); in buildFromShuffleMostly()
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H A DX86ISelLoweringCall.cpp2019 return DAG.getVectorShuffle(VT, dl, V1, V2, Mask); in getMOVL()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp767 return DAG.getVectorShuffle(OpTy, dl, Op0, Op1, Mask); in getByteShuffle()
785 return DAG.getVectorShuffle(ResTy, dl, opCastElem(Op0, MVT::i8, DAG), in getByteShuffle()
926 SDValue S = DAG.getVectorShuffle(ExtTy, dl, ExtVec, in buildHvxVectorReg()
1029 SDValue S = DAG.getVectorShuffle(ByteTy, dl, T, DAG.getUNDEF(ByteTy), Mask); in createHvxPrefixPred()
1336 SDValue ShuffV = DAG.getVectorShuffle(ByteTy, dl, ByteVec, Undef, Mask); in extractHvxSubvectorPred()
1362 SDValue ShuffV = DAG.getVectorShuffle(ByteTy, dl, ByteVec, Undef, Mask); in extractHvxSubvectorPred()
1576 DAG.getVectorShuffle(ByteTy, dl, Vor, DAG.getUNDEF(ByteTy), Mask); in compressHvxPred()
3551 DAG.getVectorShuffle(SrcTy, dl, Src, DAG.getUNDEF(SrcTy), Mask); in combineTruncateBeforeLegal()
3618 return DAG.getVectorShuffle(LongTy, dl, Cat, DAG.getUNDEF(LongTy), LongMask); in combineConcatVectorsBeforeLegal()
H A DHexagonISelDAGToDAGHVX.cpp2798 DAG.getVectorShuffle(PairTy, dl, DAG.getBitcast(PairTy, Inp), in ppHvxShuffleOfShuffle()
H A DHexagonISelLowering.cpp2898 SDValue S = DAG.getVectorShuffle(MVT::v8i8, dl, A, DAG.getUNDEF(MVT::v8i8), in contractPredicate()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp1433 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG()
1492 DAG.getVectorShuffle(SrcVT, DL, Zero, Src, ShuffleMask)); in ExpandZERO_EXTEND_VECTOR_INREG()
1518 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP()
1562 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), in ExpandBITREVERSE()
H A DDAGCombiner.cpp6298 return DAG.getVectorShuffle(VT, DL, Logic, ShOp, SVN0->getMask()); in hoistLogicOpWithSameOpcodeHands()
6311 return DAG.getVectorShuffle(VT, DL, ShOp, Logic, SVN0->getMask()); in hoistLogicOpWithSameOpcodeHands()
16834 return DAG.getVectorShuffle(N0.getValueType(), DL, Ops[0], Ops[1], in visitFREEZE()
23028 SDValue Shuf = DAG.getVectorShuffle(ShufVT, DL, DestVecBC, PaddedSubV, Mask); in combineInsertEltToShuffle()
24272 SDValue Shuffle = DAG.getVectorShuffle(InVT1, DL, VecIn1, VecIn2, Mask); in createBuildVecShuffle()
24643 Shuffles[In] = DAG.getVectorShuffle(VT, DL, L, R, Mask); in reduceBuildVecToShuffle()
25245 return DAG.getVectorShuffle(VT, dl, ShufOps[0], ShufOps[1], Mask); in combineConcatVectorOfShuffleAndItsOperands()
25815 return DAG.getVectorShuffle(NarrowVT, DL, NewOps[0], NewOps[1], NewMask); in foldExtractSubvectorFromShuffleVector()
26092 SDValue Shuf0 = DAG.getVectorShuffle(HalfVT, DL, X, Y, Mask0); in foldShuffleOfConcatUndefs()
26093 SDValue Shuf1 = DAG.getVectorShuffle(HalfVT, DL, X, Y, Mask1); in foldShuffleOfConcatUndefs()
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H A DLegalizeDAG.cpp301 return DAG.getVectorShuffle(NVT, dl, N1, N2, Mask); in ShuffleWithNarrowerEltType()
315 return DAG.getVectorShuffle(NVT, dl, N1, N2, NewMask); in ShuffleWithNarrowerEltType()
415 return DAG.getVectorShuffle(Vec.getValueType(), dl, Vec, ScVec, ShufOps); in ExpandINSERT_VECTOR_ELT()
1958 Shuffle = DAG.getVectorShuffle(VT, dl, IntermedVals[i].first, in ExpandBVWithShuffles()
1991 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBVWithShuffles()
2100 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBUILD_VECTOR()
H A DLegalizeVectorTypes.cpp1826 InHi = DAG.getVectorShuffle(InLoVT, dl, InLo, DAG.getUNDEF(InLoVT), SplitHi); in SplitVecRes_ExtVecInRegOp()
3087 Output = DAG.getVectorShuffle(NewVT, DL, Inputs[Idx], in SplitVecRes_VECTOR_SHUFFLE()
3099 Output = DAG.getVectorShuffle(NewVT, DL, Inputs[Idx1], in SplitVecRes_VECTOR_SHUFFLE()
3106 Output = DAG.getVectorShuffle(NewVT, DL, TmpInputs[Idx1], in SplitVecRes_VECTOR_SHUFFLE()
5940 return DAG.getVectorShuffle(WidenVT, dl, in WidenVecRes_CONCAT_VECTORS()
6641 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, NewMask); in WidenVecRes_VECTOR_SHUFFLE()
6690 return DAG.getVectorShuffle(WidenVT, dl, ReverseVal, DAG.getUNDEF(WidenVT), in WidenVecRes_VECTOR_REVERSE()
H A DSelectionDAGBuilder.cpp4095 setValue(&I, DAG.getVectorShuffle(VT, DL, Src1, Src2, Mask)); in visitShuffleVector()
4169 SDValue Result = DAG.getVectorShuffle(PaddedVT, DL, Src1, Src2, MappedOps); in visitShuffleVector()
4234 setValue(&I, DAG.getVectorShuffle(VT, DL, Src1, Src2, MappedOps)); in visitShuffleVector()
12573 setValue(&I, DAG.getVectorShuffle(VT, DL, V, DAG.getUNDEF(VT), Mask)); in visitVectorReverse()
12598 SDValue Even = DAG.getVectorShuffle(OutVT, DL, SubVecs[0], SubVecs[1], in visitVectorDeinterleave()
12600 SDValue Odd = DAG.getVectorShuffle(OutVT, DL, SubVecs[0], SubVecs[1], in visitVectorDeinterleave()
12631 setValue(&I, DAG.getVectorShuffle(OutVT, DL, V, DAG.getUNDEF(OutVT), in visitVectorInterleave()
12692 setValue(&I, DAG.getVectorShuffle(VT, DL, V1, V2, Mask)); in visitVectorSplice()
H A DTargetLowering.cpp1437 SDValue NewOp = TLO.DAG.getVectorShuffle(VT, dl, Op0, Op1, ShuffleMask); in SimplifyDemandedBits()
3616 TLO.DAG.getVectorShuffle(VT, SDLoc(Op), LHS, RHS, ShuffleMask); in SimplifyDemandedVectorElts()
4006 return DAG.getVectorShuffle(VT, DL, N0, N1, Mask); in buildLegalVectorShuffle()
H A DSelectionDAG.cpp2142 SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, in getVectorShuffle() function in SelectionDAG
2320 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec); in getCommutedVectorShuffle()
H A DLegalizeIntegerTypes.cpp6089 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask); in PromoteIntRes_VECTOR_SHUFFLE()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2434 Src = DAG.getVectorShuffle( in LowerConvertLow()
2641 Result = DAG.getVectorShuffle(VecT, DL, Src1, Src2, MaskRef); in LowerBUILD_VECTOR()
2906 SDValue NewShuffle = DAG.getVectorShuffle( in performVECTOR_SHUFFLECombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp912 return DAG.getVectorShuffle(ResTy, DL, Res, DAG.getUNDEF(ResTy), Mask); in lowerBITREVERSE()
941 VT, DAG.getVectorShuffle(NewVT, DL, NewV1, NewV2, NewMask)); in widenShuffleMask()
2200 Flipped = DAG.getVectorShuffle(MVT::v4i64, DL, Flipped, in lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle()
2203 return DAG.getVectorShuffle(VT, DL, V1, Flipped, InLaneMask); in lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle()
2304 return DAG.getVectorShuffle(VT, DL, V1, V2, NewMask); in lowerVECTOR_SHUFFLE()
4368 DAG.getVectorShuffle(WidenVT, DL, WidenIn, WidenIn, TruncMask)); in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3780 DAG.getVectorShuffle(MVT::v4i32, dl, SetCC32, SetCC32, ShuffV); in LowerSETCC()
8223 return DAG.getVectorShuffle(WideVT, DL, Op1, Op2, ShuffV); in LowerTRUNCATEVector()
8792 SDValue Arrange = DAG.getVectorShuffle(WideVT, dl, Wide, ShuffleSrc2, ShuffV); in LowerINT_TO_FPVector()
9428 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops); in BuildVSLDOI()
10068 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs); in GeneratePerfectShuffle()
10376 DAG.getVectorShuffle(MVT::v16i8, dl, DAG.getBitcast(MVT::v16i8, N0), in LowerROTL()
12349 return DAG.getVectorShuffle(MVT::v16i8, dl, OddParts, EvenParts, Ops); in LowerMUL()
12351 return DAG.getVectorShuffle(MVT::v16i8, dl, EvenParts, OddParts, Ops); in LowerMUL()
15673 ReturnSDVal = DAG.getVectorShuffle(N->getValueType(0), dl, WideLoad, in combineBVOfConsecutiveLoads()
15707 DAG.getVectorShuffle(Input.getValueType(), dl, Input, in addShuffleForVecExtend()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3666 Op = DAG.getVectorShuffle(MVT::v4f32, DL, Op, DAG.getUNDEF(MVT::v4f32), Mask); in expandV4F32ToV2F64()
6649 SDValue Shuf = DAG.getVectorShuffle(InVT, DL, PackedOp, ZeroVec, Mask); in lowerZERO_EXTEND_VECTOR_INREG()
6726 SDValue Shuf1 = DAG.getVectorShuffle(MVT::v16i8, DL, Op0, Op1, Mask); in lowerFSHL()
6729 SDValue Shuf2 = DAG.getVectorShuffle(MVT::v16i8, DL, Op1, Op1, Mask); in lowerFSHL()
6756 SDValue Shuf1 = DAG.getVectorShuffle(MVT::v16i8, DL, Op0, Op1, Mask); in lowerFSHR()
6759 SDValue Shuf2 = DAG.getVectorShuffle(MVT::v16i8, DL, Op0, Op0, Mask); in lowerFSHR()
8662 return DAG.getVectorShuffle(VecVT, SDLoc(N), Op0, Op1, SV->getMask()); in combineBSWAP()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp4900 SDValue Splat = DAG.getVectorShuffle(VT, DL, V1, DAG.getUNDEF(VT), in lowerVECTOR_SHUFFLEAsVRGatherVX()
5484 SDValue SubVec = DAG.getVectorShuffle(OneRegVT, DL, SubVec1, SubVec2, Mask); in lowerShuffleViaVRegSplitting()
5605 return DAG.getVectorShuffle(VT, DL, Select, DAG.getUNDEF(VT), NewMask); in lowerDisjointIndicesShuffle()
5677 return DAG.getBitcast(VT, DAG.getVectorShuffle(NewVT, DL, V0, V1, NewMask)); in tryWidenMaskForShuffle()
5703 SDValue Shuffled = DAG.getVectorShuffle(WidenVT, DL, V1, V2, SVN->getMask()); in lowerVECTOR_SHUFFLE()
6116 SDValue Res = DAG.getVectorShuffle(NewVT, DL, V1, DAG.getUNDEF(NewVT), in lowerVECTOR_SHUFFLE()
6312 V1 = DAG.getVectorShuffle(VT, DL, V1, DAG.getUNDEF(VT), ShuffleMaskLHS); in lowerVECTOR_SHUFFLE()
6313 V2 = DAG.getVectorShuffle(VT, DL, V2, DAG.getUNDEF(VT), ShuffleMaskRHS); in lowerVECTOR_SHUFFLE()
19076 SDValue Res = DAG.getVectorShuffle(NewVT, DL, DAG.getBitcast(NewVT, V1), in performVECTOR_SHUFFLECombine()
20172 DAG.getVectorShuffle(VT, DL, Load, DAG.getUNDEF(VT), ShuffleMask); in PerformDAGCombine()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h865 LLVM_ABI SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp13195 DAG.getVectorShuffle(ShuffleVT, DL, ShuffleOps[0], ShuffleOps[1], Mask); in ReconstructShuffle()
13895 DAG.getVectorShuffle(NewVT, DL, V0, V1, NewMask)); in tryWidenMaskForShuffle()
15227 DAG.getVectorShuffle(VT, DL, VEC1, VEC2, MaskVec); in LowerBUILD_VECTOR()
18719 NBV = DAG.getVectorShuffle(PreExtendVT, DL, BV.getOperand(0).getOperand(0), in performBuildShuffleExtendCombine()
20013 DAG.getVectorShuffle( in performConcatVectorsCombine()
21472 DAG.getVectorShuffle(Op0.getValueType(), DL, SubL, SubH, LowMask); in performExtBinopLoadFold()
21474 DAG.getVectorShuffle(Op0.getValueType(), DL, SubL, SubH, HighMask); in performExtBinopLoadFold()
21485 Ext0 = DAG.getVectorShuffle(VT, DL, SubL, SubH, LowMask); in performExtBinopLoadFold()
21486 Ext1 = DAG.getVectorShuffle(VT, DL, SubL, SubH, HighMask); in performExtBinopLoadFold()
25734 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8623 return DAG.getVectorShuffle(VT, DL, OpLHS, OpLHS, NewMask); in LowerReverse_VECTOR_SHUFFLE()
8712 SDValue Shuffled = DAG.getVectorShuffle(NewVT, dl, PredAsVector1, in LowerVECTOR_SHUFFLE_i1()
8799 SDValue NewShuffle = DAG.getVectorShuffle( in LowerVECTOR_SHUFFLEUsingMovs()
15844 return DAG.getVectorShuffle(VT, SDLoc(N), NewConcat, in PerformVECTOR_SHUFFLECombine()
16667 SDValue Shuff = DAG.getVectorShuffle( in PerformTruncatingStoreCombine()
17533 return DCI.DAG.getVectorShuffle(VT, DL, NewBinOp, UndefV, Shuf0->getMask()); in PerformVQDMULHCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp8025 SDValue Shuf = DAG.getVectorShuffle(PackVT, SL, Result0, Result1, in lowerVECTOR_SHUFFLE()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc15062 …ffleENS_3EVTENS_8DebugLocENS_7SDValueES3_PKi", "llvm::SelectionDAG::getVectorShuffle(llvm::EVT, ll…