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Searched refs:getVRegDef (Results 1 – 25 of 128) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperVectorOps.cpp367 GAdd *Add = cast<GAdd>(MRI.getVRegDef(MO.getReg())); in matchAddOfVScale()
368 GVScale *LHSVScale = cast<GVScale>(MRI.getVRegDef(Add->getLHSReg())); in matchAddOfVScale()
369 GVScale *RHSVScale = cast<GVScale>(MRI.getVRegDef(Add->getRHSReg())); in matchAddOfVScale()
386 GMul *Mul = cast<GMul>(MRI.getVRegDef(MO.getReg())); in matchMulOfVScale()
387 GVScale *LHSVScale = cast<GVScale>(MRI.getVRegDef(Mul->getLHSReg())); in matchMulOfVScale()
407 GSub *Sub = cast<GSub>(MRI.getVRegDef(MO.getReg())); in matchSubOfVScale()
408 GVScale *RHSVScale = cast<GVScale>(MRI.getVRegDef(Sub->getRHSReg())); in matchSubOfVScale()
427 GShl *Shl = cast<GShl>(MRI.getVRegDef(MO.getReg())); in matchShlOfVScale()
428 GVScale *LHSVScale = cast<GVScale>(MRI.getVRegDef(Shl->getSrcReg())); in matchShlOfVScale()
H A DGIMatchTableExecutor.cpp50 MachineInstr *RootI = MRI.getVRegDef(Root.getReg()); in isBaseWithConstantOffset()
55 MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg()); in isBaseWithConstantOffset()
H A DCombinerHelper.cpp326 MachineInstr *Def = MRI.getVRegDef(Reg); in matchCombineConcatVectors()
440 dyn_cast<GConcatVectors>(MRI.getVRegDef(MI.getOperand(1).getReg())); in matchCombineShuffleConcat()
442 dyn_cast<GConcatVectors>(MRI.getVRegDef(MI.getOperand(2).getReg())); in matchCombineShuffleConcat()
980 GAnyLoad *LoadMI = dyn_cast<GAnyLoad>(MRI.getVRegDef(SrcReg)); in matchCombineLoadWithAndMask()
1152 GLoad *LoadDef = cast<GLoad>(MRI.getVRegDef(LoadReg)); in applySextInRegOfLoad()
1257 auto *PtrDef = MRI.getVRegDef(Ptr); in findPostIndexCandidate()
1282 MachineInstr *OffsetDef = MRI.getVRegDef(Offset); in findPostIndexCandidate()
1520 auto *OldCst = MRI.getVRegDef(MatchInfo.Offset); in applyCombineIndexedLoadStore()
1786 MachineInstr *Add2Def = MRI.getVRegDef(Add2); in matchPtrAddImmedChain()
2065 auto *SrcDef = MRI.getVRegDef(SrcReg); in matchCommuteShift()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp94 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
101 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
107 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
146 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
157 DefMI = MRI->getVRegDef(SrcReg); in hasLoopHazard()
165 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
171 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
H A DA15SDOptimizer.cpp158 MachineInstr *MI = MRI->getVRegDef(SReg); in getPrefSPRLane()
251 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in optimizeSDPattern()
252 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg()); in optimizeSDPattern()
303 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern()
346 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopies()
373 MachineInstr *NewMI = MRI->getVRegDef(Reg); in elideCopiesAndPHIs()
381 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopiesAndPHIs()
603 MachineInstr *Def = MRI->getVRegDef(I); in runOnInstruction()
H A DMVETPAndVPTOptimisationsPass.cpp103 MI = MRI->getVRegDef(MI->getOperand(1).getReg()); in INITIALIZE_PASS_DEPENDENCY()
152 LookThroughCOPY(MRI->getVRegDef(LoopEnd->getOperand(0).getReg()), MRI); in findLoopComponents()
161 LookThroughCOPY(MRI->getVRegDef(LoopDec->getOperand(1).getReg()), MRI); in findLoopComponents()
174 LoopStart = LookThroughCOPY(MRI->getVRegDef(StartReg), MRI); in findLoopComponents()
491 MachineInstr *Phi = LookThroughCOPY(MRI->getVRegDef(CountReg), MRI); in ConvertTailPredLoop()
937 MachineInstr *Copy = MRI->getVRegDef(VPR); in ReplaceConstByVPNOTs()
948 MachineInstr *Def = MRI->getVRegDef(GPR); in ReplaceConstByVPNOTs()
967 DeadInstructions.insert(MRI->getVRegDef(GPR)); in ReplaceConstByVPNOTs()
985 DeadInstructions.insert(MRI->getVRegDef(GPR)); in ReplaceConstByVPNOTs()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp435 MachineInstr *DI = MRI->getVRegDef(PhiOpReg); in findInductionRegister()
443 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) { in findInductionRegister()
462 MachineInstr *PredI = MRI->getVRegDef(PredR); in findInductionRegister()
498 IVOp = MRI->getVRegDef(F->first); in findInductionRegister()
601 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg); in getLoopTripCount()
648 MachineInstr *CondI = MRI->getVRegDef(PredReg); in getLoopTripCount()
696 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent(); in getLoopTripCount()
702 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount()
706 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent(); in getLoopTripCount()
712 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount()
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H A DHexagonVExtract.cpp73 MachineInstr *DI = MRI.getVRegDef(ExtIdxR); in genElemLoad()
144 MachineInstr *DefI = MRI.getVRegDef(VecR); in runOnMachineFunction()
177 MachineInstr *AlignaI = MRI.getVRegDef(AR); in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp220 return MRI->getVRegDef(Reg); in getVRegDefOrNull()
228 MachineInstr *MI = MRI->getVRegDef(Reg); in getKnownLeadingZeroCount()
362 MachineInstr *Instr = MRI->getVRegDef(RegOp); in collectUnprimedAccPHIs()
404 MachineInstr *PHIInput = MRI->getVRegDef(RegOp); in convertUnprimedAccPHIs()
576 MachineInstr *RootPHI = MRI->getVRegDef(Src); in simplifyCode()
646 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode()
663 MachineInstr *LoadMI = MRI->getVRegDef(FeedReg1); in simplifyCode()
805 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode()
815 MachineInstr *Splt = MRI->getVRegDef(ConvReg); in simplifyCode()
872 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVVectorPeephole.cpp162 MachineInstr *Src = MRI->getVRegDef(SrcReg); in tryToReduceVL()
205 MachineInstr *Def = MRI->getVRegDef(VL.getReg()); in getConstant()
239 MachineInstr *Def = MRI->getVRegDef(VL.getReg()); in convertToVLMAX()
249 Def = MRI->getVRegDef(Def->getOperand(1).getReg()); in convertToVLMAX()
253 Def = MRI->getVRegDef(Def->getOperand(1).getReg()); in convertToVLMAX()
276 MaskDef = MRI->getVRegDef(MaskDef->getOperand(1).getReg()); in isAllOnesMask()
373 if (!isAllOnesMask(MRI->getVRegDef(MI.getOperand(4).getReg()))) in convertAllOnesVMergeToVMv()
422 MachineInstr *True = MRI->getVRegDef(MI.getOperand(3).getReg()); in convertSameMaskVMergeToVMv()
482 if (!isAllOnesMask(MRI->getVRegDef( in convertToUnmasked()
583 MachineInstr *Def = MRI->getVRegDef(MO.getReg()); in ensureDominates()
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H A DRISCVVMV0Elimination.cpp130 if (MachineInstr *SrcMI = MRI.getVRegDef(Src); in runOnMachineFunction()
167 MRI.getVRegDef(MO.getReg())->isInlineAsm()) && in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h80 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineAnyExt()
98 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineAnyExt()
161 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineZExt()
173 markDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineZExt()
178 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineZExt()
223 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineSExt()
237 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineSExt()
242 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineSExt()
271 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineTrunc()
352 markInstAndDefDead(MI, *MRI.getVRegDef(TruncSrc), DeadInsts); in tryCombineTrunc()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVUtils.cpp84 MachineInstr *Def = getVRegDef(MRI, Reg); in getStringValueFromReg()
347 MachineInstr *MI = MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
350 ? MRI->getVRegDef(MI->getOperand(1).getReg()) in getDefInstrMaybeConstant()
355 return MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
359 return MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
365 return MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
745 MachineInstr *getVRegDef(MachineRegisterInfo &MRI, Register Reg) { in getVRegDef() function
746 MachineInstr *MaybeDef = MRI.getVRegDef(Reg); in getVRegDef()
748 MaybeDef = MRI.getVRegDef(MaybeDef->getOperand(1).getReg()); in getVRegDef()
964 ? MRI->getVRegDef(Def->getOperand(1).getReg()) in passCopy()
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H A DSPIRVPreLegalizer.cpp64 GR->add(GV, MRI.getVRegDef(SrcReg)); in addConstantsToTrack()
72 auto *BuildVec = MRI.getVRegDef(SrcReg); in addConstantsToTrack()
83 MRI.getVRegDef(BuildVec->getOperand(1 + i).getReg())); in addConstantsToTrack()
90 MachineInstr *SrcMI = MRI.getVRegDef(SrcReg); in addConstantsToTrack()
112 MachineInstr *SrcMI = MRI.getVRegDef(MI.getOperand(2).getReg()); in addConstantsToTrack()
324 MRI.getVRegDef(MI->getOperand(1).getReg())) { in propagateSPIRVType()
348 MachineInstr *Def = Op.isReg() ? MRI.getVRegDef(Op.getReg()) : nullptr; in propagateSPIRVType()
424 MachineInstr *Def = MRI.getVRegDef(Reg); in insertAssignInstr()
538 MachineInstr *Def = MRI.getVRegDef(Reg); in generateAssignInstrs()
549 MachineInstr *Def = MRI.getVRegDef(Reg); in generateAssignInstrs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp92 MachineInstr *Other = MRI.getVRegDef(Src1Op1); in matchExtractVecEltPairwiseAdd()
95 Other = MRI.getVRegDef(Src1Op2); in matchExtractVecEltPairwiseAdd()
100 Other == MRI.getVRegDef(Shuffle->getOperand(1).getReg())) { in matchExtractVecEltPairwiseAdd()
127 unsigned Opc = MRI.getVRegDef(R)->getOpcode(); in isSignExtended()
133 return MRI.getVRegDef(R)->getOpcode() == TargetOpcode::G_ZEXT; in isZeroExtended()
321 *MRI.getVRegDef(Store.getValueReg()), MRI); in matchSplitStoreZero128()
405 *MRI.getVRegDef(MI.getOperand(2).getReg()), MRI); in matchCombineMulCMLT()
407 *MRI.getVRegDef(AndMI->getOperand(2).getReg()), MRI); in matchCombineMulCMLT()
409 *MRI.getVRegDef(LShrMI->getOperand(2).getReg()), MRI); in matchCombineMulCMLT()
847 GPtrAdd *PtrAdd = cast<GPtrAdd>(MRI.getVRegDef(PtrReg)); in optimizeConsecutiveMemOpAddressing()
H A DAArch64RegisterBankInfo.cpp389 auto ConstMI = MRI.getVRegDef(MI.getOperand(1).getReg()); in applyMappingImpl()
541 onlyDefinesFP(*MRI.getVRegDef(Op.getReg()), MRI, TRI, Depth + 1); in hasFPConstraints()
797 auto ScalarDef = MRI.getVRegDef(ScalarReg); in getInstrMapping()
915 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
926 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
985 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
1073 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
1077 return Op.isDef() || MRI.getVRegDef(Op.getReg())->getOpcode() == in getInstrMapping()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineSSAContext.cpp54 return F->getRegInfo().getVRegDef(value)->getParent(); in getDefBlock()
78 if (Incoming != This && !isUndef(*MRI.getVRegDef(Incoming))) { in isConstantOrUndefValuePhi()
H A DModuloSchedule.cpp406 int LoopValStage = Schedule.getStage(MRI.getVRegDef(LoopVal)); in generateExistingPhis()
460 MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis()
468 InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis()
484 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1)) in generateExistingPhis()
488 MachineInstr *PhiInst = MRI.getVRegDef(LoopVal); in generateExistingPhis()
662 if (MachineInstr *InstOp2 = MRI.getVRegDef(PhiOp2)) in generatePhis()
829 MachineInstr *MI = MRI.getVRegDef(LCDef); in splitLifetimes()
964 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg); in computeDelta()
967 BaseDef = MRI.getVRegDef(BaseReg); in computeDelta()
1066 MachineInstr *Def = MRI.getVRegDef(reg); in updateInstruction()
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H A DMachineCycleAnalysis.cpp159 assert(MRI->getVRegDef(Reg) && "Machine instr not mapped for this vreg?!"); in isCycleInvariant()
163 if (Cycle->contains(MRI->getVRegDef(Reg)->getParent())) in isCycleInvariant()
H A DOptimizePHIs.cpp130 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle()
137 SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankSelect.cpp105 MachineInstr *MI = MRI.getVRegDef(Reg); in isTemporalDivergenceCopy()
177 auto DefMI = MRI.getVRegDef(Reg)->getIterator(); in constrainRegBankUse()
280 MRI.getVRegDef(UseReg)->isPreISelOpcode()) in runOnMachineFunction()
H A DAMDGPUCombinerHelper.cpp202 MatchInfo = MRI.getVRegDef(Src); in matchFoldableFneg()
409 const MachineInstr *Def = MRI.getVRegDef(Reg); in isFPExtFromF16OrConst()
473 MachineInstr *SelectTrue = MRI.getVRegDef(Sel.getOperand(2).getReg()); in matchCombineFmulWithSelectToFldexp()
474 MachineInstr *SelectFalse = MRI.getVRegDef(Sel.getOperand(3).getReg()); in matchCombineFmulWithSelectToFldexp()
510 Builder.buildFNeg(DestTy, XReg, MRI.getVRegDef(XReg)->getFlags()); in matchCombineFmulWithSelectToFldexp()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastPreTileConfig.cpp303 MachineInstr *MI = MRI->getVRegDef(TileReg); in getShape()
361 MachineInstr *TileDefMI = MRI->getVRegDef(InTileReg); in convertPHI()
388 MachineInstr *TileLoad = MRI->getVRegDef(InTileReg); in convertPHI()
474 DefMI = MRI->getVRegDef(InTileReg); in canonicalizePHIs()
614 MachineInstr *RowMI = MRI->getVRegDef(RowMO->getReg()); in configBasicBlock()
615 MachineInstr *ColMI = MRI->getVRegDef(ColMO->getReg()); in configBasicBlock()
634 MachineInstr *ColxMI = MRI->getVRegDef(ColxMO->getReg()); in configBasicBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFixBrTableDefaults.cpp62 auto ExtMI = MF.getRegInfo().getVRegDef(MI.getOperand(0).getReg()); in fixBrTableIndex()
128 auto *RangeCheck = MRI.getVRegDef(Cond[1].getReg()); in fixBrTableDefault()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMIPeephole.cpp112 MachineInstr *DefInsn = MRI->getVRegDef(Reg); in isCopyFrom32Def()
127 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg()); in isPhiFrom32Def()
164 MachineInstr *DefInsn = MRI->getVRegDef(MovMI->getOperand(1).getReg()); in isMovFrom32Def()
199 MachineInstr *SllMI = MRI->getVRegDef(ShfReg); in eliminateZExtSeq()
213 MachineInstr *MovMI = MRI->getVRegDef(SllMI->getOperand(1).getReg()); in eliminateZExtSeq()

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