/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64MIPeepholeOpt.cpp | 236 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in visitORR() 299 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in visitINSERT() 424 MachineInstr &SrcMI = *MRI->getUniqueVRegDef(MI.getOperand(1).getReg()); in visitADDSSUBS() 458 MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in checkMovImmInstr() 466 MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg()); in checkMovImmInstr() 580 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(3).getReg()); in visitINSviGPR() 595 SrcMI = MRI->getUniqueVRegDef(SrcMI->getOperand(1).getReg()); in visitINSviGPR() 633 MachineInstr *Low64MI = MRI->getUniqueVRegDef(MI.getOperand(1).getReg()); in visitINSvi64lane() 636 Low64MI = MRI->getUniqueVRegDef(Low64MI->getOperand(2).getReg()); in visitINSvi64lane() 653 MachineInstr *High64MI = MRI->getUniqueVRegDef(MI.getOperand(3).getReg()); in visitINSvi64lane() [all …]
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H A D | AArch64CondBrTuning.cpp | 84 return MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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H A D | AArch64InstrInfo.cpp | 1400 auto PTestLikeMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in canRemovePTestInstr() 1427 auto PTestLikeMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in canRemovePTestInstr() 1453 auto *PredMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in canRemovePTestInstr() 1483 auto *Mask = MRI->getUniqueVRegDef(MaskReg); in optimizePTestInstr() 1484 auto *Pred = MRI->getUniqueVRegDef(PredReg); in optimizePTestInstr() 1818 MachineInstr *MI = MRI.getUniqueVRegDef(SrcReg); in substituteCmpToZero() 1942 MachineInstr *MI = MRI.getUniqueVRegDef(SrcReg); in removeCmpToZeroOrOne() 5930 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 6371 MI = MRI.getUniqueVRegDef(MO.getReg()); in getFMULPatterns() 6375 MI = MRI.getUniqueVRegDef(MI->getOperand(1).getReg()); in getFMULPatterns() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXPeephole.cpp | 87 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate() 114 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal() 159 if (auto MI = MRI.getUniqueVRegDef(NRI->getFrameRegister(MF))) { in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineConvergenceVerifier.cpp | 42 Check(MRI.getUniqueVRegDef(Def.getReg()), in checkConvergenceTokenProduced() 61 const MachineInstr *Def = MRI.getUniqueVRegDef(OpReg); in findAndCheckConvergenceTokenUsed()
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H A D | MachineSSAContext.cpp | 87 if (auto *Instr = MRI->getUniqueVRegDef(Value)) {
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H A D | TargetInstrInfo.cpp | 844 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands() 846 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands() 861 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling() 862 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling() 1258 MRI.getUniqueVRegDef(Root.getOperand(OperandIndices[0]).getReg()); in genAlternativeCodeSequence()
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H A D | ModuloSchedule.cpp | 1369 MachineInstr *Producer = MRI.getUniqueVRegDef(Reg); in remapUse() 1399 LoopProducer = MRI.getUniqueVRegDef(LoopReg); in remapUse() 1718 MachineInstr *Use = MRI.getUniqueVRegDef(MO.getReg()); in moveStageBetweenBlocks() 1820 MachineInstr *Use = MRI.getUniqueVRegDef(Reg); in peelPrologAndEpilogs() 1909 MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in getEquivalentRegisterIn() 1920 int RMIStage = getStage(MRI.getUniqueVRegDef(R)); in rewriteUsesOf()
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H A D | EarlyIfConversion.cpp | 574 const MachineInstr *TDef = MRI.getUniqueVRegDef(TReg); in hasSameValue() 575 const MachineInstr *FDef = MRI.getUniqueVRegDef(FReg); in hasSameValue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 140 if (!MRI->getUniqueVRegDef(MO.getReg())) in checkADDrr() 205 if (!MRI->getUniqueVRegDef(I->getReg())) in processCandidate() 260 if (IsAma && MRI->getUniqueVRegDef(I->getReg())) in processDstReg() 333 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVDuplicatesTracker.cpp | 25 MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(R); in prebuildReg2Entry() 50 MachineInstr *MI = MRI.getUniqueVRegDef(U.second); in buildDepsGraph()
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H A D | SPIRVBuiltins.cpp | 325 MachineInstr *MI = MRI->getUniqueVRegDef(ParamReg); in getBlockStructInstr() 329 MachineInstr *BitcastMI = MRI->getUniqueVRegDef(BitcastReg); in getBlockStructInstr() 333 MachineInstr *ValueMI = MRI->getUniqueVRegDef(ValueReg); in getBlockStructInstr() 341 MachineInstr *DefMI = MRI->getUniqueVRegDef(Reg); in getConstFromIntrinsic() 344 MachineInstr *DefMI2 = MRI->getUniqueVRegDef(DefMI->getOperand(2).getReg()); in getConstFromIntrinsic() 2003 MachineInstr *DefInstr = MRI->getUniqueVRegDef(GlobalWorkSize); in buildNDRange() 2077 MachineInstr *GepMI = MRI->getUniqueVRegDef(GepReg); in buildEnqueueKernel() 2081 MachineInstr *ArrayMI = MRI->getUniqueVRegDef(ArrayReg); in buildEnqueueKernel()
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H A D | SPIRVModuleAnalysis.cpp | 226 MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(Reg); in collectDefInstr() 263 if (!MF->getRegInfo().getUniqueVRegDef(Reg)) in collectGlobalEntities() 268 MAI.GlobalVarList.push_back(MF->getRegInfo().getUniqueVRegDef(Reg)); in collectGlobalEntities()
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H A D | SPIRVGlobalRegistry.cpp | 1190 return MIRBuilder.getMF().getRegInfo().getUniqueVRegDef(ResVReg); in getOrCreateOpTypeCoopMatr() 1208 return MIRBuilder.getMF().getRegInfo().getUniqueVRegDef(ResVReg); in getOrCreateOpTypeByOpcode() 1220 return MIRBuilder.getMF().getRegInfo().getUniqueVRegDef(Reg); in checkSpecialInstr()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86DynAllocaExpander.cpp | 86 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getDynAllocaAmount() 273 if (MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg)) in lower()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 379 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak() 573 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands() 615 MRI->getUniqueVRegDef(Reg)->eraseFromParent(); in combineMasks() 636 const MachineInstr *Def = MRI->getUniqueVRegDef(SavedExec); in optimizeEndCf()
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H A D | SILowerI1Copies.cpp | 735 MI = MRI->getUniqueVRegDef(Reg); in isConstantLaneMask() 832 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in collectIncomingValuesFromPhi()
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H A D | GCNNSAReassign.cpp | 212 const MachineInstr *Def = MRI->getUniqueVRegDef(Reg); in CheckNSA()
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H A D | R600OptimizeVectorRegisters.cpp | 43 const MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in isImplicitlyDef()
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H A D | SILoadStoreOptimizer.cpp | 2011 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in extractConstOffset() 2034 MachineInstr *Def = MRI->getUniqueVRegDef(Base.getReg()); in processBaseWithConstOffset() 2044 MachineInstr *BaseLoDef = MRI->getUniqueVRegDef(BaseLo.getReg()); in processBaseWithConstOffset() 2045 MachineInstr *BaseHiDef = MRI->getUniqueVRegDef(BaseHi.getReg()); in processBaseWithConstOffset()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegisterInfo.cpp | 96 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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H A D | WebAssemblyMachineFunctionInfo.h | 123 assert(MRI.getUniqueVRegDef(VReg)); in stackifyVReg()
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H A D | WebAssemblyDebugValueManager.cpp | 151 MachineInstr *OtherDef = MRI.getUniqueVRegDef(OtherReg); in getSinkableDebugValues()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostSelectOptimize.cpp | 206 MachineInstr *SrcMI = MRI.getUniqueVRegDef(Src); in foldCopyDup()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfo.cpp | 1822 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableVectorSibling() 1823 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(3).getReg()); in hasReassociableVectorSibling() 1854 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands() 1856 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands() 2085 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 2273 MachineInstr *AddMI = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genShXAddAddShift() 2275 MRI.getUniqueVRegDef(AddMI->getOperand(AddOpIdx).getReg()); in genShXAddAddShift()
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