| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MIPeepholeOpt.cpp | 242 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in visitORR() 328 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in visitINSERT() 453 MachineInstr &SrcMI = *MRI->getUniqueVRegDef(MI.getOperand(1).getReg()); in visitADDSSUBS() 487 MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in checkMovImmInstr() 495 MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg()); in checkMovImmInstr() 609 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(3).getReg()); in visitINSviGPR() 624 SrcMI = MRI->getUniqueVRegDef(SrcMI->getOperand(1).getReg()); in visitINSviGPR() 662 MachineInstr *Low64MI = MRI->getUniqueVRegDef(MI.getOperand(1).getReg()); in visitINSvi64lane() 665 Low64MI = MRI->getUniqueVRegDef(Low64MI->getOperand(2).getReg()); in visitINSvi64lane() 682 MachineInstr *High64MI = MRI->getUniqueVRegDef(MI.getOperand(3).getReg()); in visitINSvi64lane() [all …]
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| H A D | AArch64CondBrTuning.cpp | 82 return MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| H A D | AArch64InstrInfo.cpp | 1508 auto PTestLikeMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in canRemovePTestInstr() 1516 MRI->getUniqueVRegDef(PTestLikeMask->getOperand(1).getReg()); in canRemovePTestInstr() 1575 auto *PredMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in canRemovePTestInstr() 1605 auto *Mask = MRI->getUniqueVRegDef(MaskReg); in optimizePTestInstr() 1606 auto *Pred = MRI->getUniqueVRegDef(PredReg); in optimizePTestInstr() 1940 MachineInstr *MI = MRI.getUniqueVRegDef(SrcReg); in substituteCmpToZero() 2064 MachineInstr *MI = MRI.getUniqueVRegDef(SrcReg); in removeCmpToZeroOrOne() 6599 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 7167 MI = MRI.getUniqueVRegDef(MO.getReg()); in getFMULPatterns() 7171 MI = MRI.getUniqueVRegDef(MI->getOperand(1).getReg()); in getFMULPatterns() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 81 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate() 108 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal() 153 if (auto MI = MRI.getUniqueVRegDef(NRI->getFrameRegister(MF))) { in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineConvergenceVerifier.cpp | 41 Check(MRI.getUniqueVRegDef(Def.getReg()), in checkConvergenceTokenProduced() 60 const MachineInstr *Def = MRI.getUniqueVRegDef(OpReg); in findAndCheckConvergenceTokenUsed()
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| H A D | MachineSSAContext.cpp | 112 if (auto *Instr = MRI->getUniqueVRegDef(Value)) { in print()
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| H A D | TargetInstrInfo.cpp | 921 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands() 923 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands() 938 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling() 939 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling() 987 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 1026 CurrentInstr = MRI.getUniqueVRegDef(CurrentInstr->getOperand(1).getReg()); in getAccumulatorChain() 1499 MRI.getUniqueVRegDef(Root.getOperand(OperandIndices[0]).getReg()); in genAlternativeCodeSequence() 1525 MachineInstr *Instr = MRI.getUniqueVRegDef(IndexedReg.value()); in genAlternativeCodeSequence()
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| H A D | ModuloSchedule.cpp | 1388 MachineInstr *Producer = MRI.getUniqueVRegDef(Reg); in remapUse() 1418 LoopProducer = MRI.getUniqueVRegDef(LoopReg); in remapUse() 1737 MachineInstr *Use = MRI.getUniqueVRegDef(MO.getReg()); in moveStageBetweenBlocks() 1839 MachineInstr *Use = MRI.getUniqueVRegDef(Reg); in peelPrologAndEpilogs() 1928 MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in getEquivalentRegisterIn() 1939 int RMIStage = getStage(MRI.getUniqueVRegDef(R)); in rewriteUsesOf()
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| H A D | EarlyIfConversion.cpp | 581 const MachineInstr *TDef = MRI.getUniqueVRegDef(TReg); in hasSameValue() 582 const MachineInstr *FDef = MRI.getUniqueVRegDef(FReg); in hasSameValue()
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| H A D | MachineRegisterInfo.cpp | 419 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(Register Reg) const { in getUniqueVRegDef() function in MachineRegisterInfo
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 142 if (!MRI->getUniqueVRegDef(MO.getReg())) in checkADDrr() 207 if (!MRI->getUniqueVRegDef(I->getReg())) in processCandidate() 262 if (IsAma && MRI->getUniqueVRegDef(I->getReg())) in processDstReg() 335 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86DynAllocaExpander.cpp | 89 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getDynAllocaAmount() 276 if (MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg)) in lower()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 388 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak() 582 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands() 624 MRI->getUniqueVRegDef(Reg)->eraseFromParent(); in combineMasks() 645 const MachineInstr *Def = MRI->getUniqueVRegDef(SavedExec); in optimizeEndCf()
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| H A D | SILowerI1Copies.cpp | 666 MI = MRI->getUniqueVRegDef(Reg); in isConstantLaneMask() 763 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in collectIncomingValuesFromPhi()
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| H A D | GCNNSAReassign.cpp | 218 const MachineInstr *Def = MRI->getUniqueVRegDef(Reg); in CheckNSA()
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| H A D | R600OptimizeVectorRegisters.cpp | 43 const MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in isImplicitlyDef()
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| H A D | SILoadStoreOptimizer.cpp | 2072 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in extractConstOffset() 2095 MachineInstr *Def = MRI->getUniqueVRegDef(Base.getReg()); in processBaseWithConstOffset() 2105 MachineInstr *BaseLoDef = MRI->getUniqueVRegDef(BaseLo.getReg()); in processBaseWithConstOffset() 2106 MachineInstr *BaseHiDef = MRI->getUniqueVRegDef(BaseHi.getReg()); in processBaseWithConstOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 94 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| H A D | WebAssemblyMachineFunctionInfo.h | 123 assert(MRI.getUniqueVRegDef(VReg)); in stackifyVReg()
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| H A D | WebAssemblyDebugValueManager.cpp | 151 MachineInstr *OtherDef = MRI.getUniqueVRegDef(OtherReg); in getSinkableDebugValues()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVectorPeephole.cpp | 395 while (MachineInstr *Def = MRI->getUniqueVRegDef(Reg)) { in isKnownSameDefs() 726 MachineInstr &True = *MRI->getUniqueVRegDef(TrueReg); in foldVMergeToMask() 730 MachineInstr *Mask = MRI->getUniqueVRegDef(MaskOp.getReg()); in foldVMergeToMask()
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| H A D | RISCVInstrInfo.cpp | 2226 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableVectorSibling() 2227 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(3).getReg()); in hasReassociableVectorSibling() 2258 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands() 2260 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands() 2489 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 2692 MachineInstr *AddMI = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genShXAddAddShift() 2694 MRI.getUniqueVRegDef(AddMI->getOperand(AddOpIdx).getReg()); in genShXAddAddShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 201 MachineInstr *SrcMI = MRI.getUniqueVRegDef(Src); in foldCopyDup()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVModuleAnalysis.cpp | 370 if (const MachineInstr *OpDefMI = MRI.getUniqueVRegDef(OpReg)) { in visitDecl() 1096 auto *ImageInst = MRI.getUniqueVRegDef(ImageReg); in isCombinedImageSampler() 1120 MachineInstr *ResTypeInst = MRI.getUniqueVRegDef(ResTypeReg); in addOpAccessChainReqs() 1131 MachineInstr *PointeeType = MRI.getUniqueVRegDef(PointeeTypeReg); in addOpAccessChainReqs() 1673 MachineInstr *MILayout = MRI.getUniqueVRegDef(RegLayout); in addInstrRequirements()
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| H A D | SPIRVBuiltins.cpp | 377 MachineInstr *MI = MRI->getUniqueVRegDef(ParamReg); in getBlockStructInstr() 381 MachineInstr *BitcastMI = MRI->getUniqueVRegDef(BitcastReg); in getBlockStructInstr() 385 MachineInstr *ValueMI = MRI->getUniqueVRegDef(ValueReg); in getBlockStructInstr() 393 MachineInstr *DefMI = MRI->getUniqueVRegDef(Reg); in getConstFromIntrinsic() 2375 MachineInstr *DefInstr = MRI->getUniqueVRegDef(GlobalWorkSize); in buildNDRange() 2443 MachineInstr *GepMI = MRI->getUniqueVRegDef(GepReg); in buildEnqueueKernel() 2447 MachineInstr *ArrayMI = MRI->getUniqueVRegDef(ArrayReg); in buildEnqueueKernel()
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