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Searched refs:getTargetExtractSubreg (Results 1 – 22 of 22) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp250 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in tryInlineAsm()
252 SDValue Sub1 = CurDAG->getTargetExtractSubreg(SP::sub_odd, dl, MVT::i32, in tryInlineAsm()
H A DSparcISelLowering.cpp2899 SDValue Hi32 = DAG.getTargetExtractSubreg(SP::sub_even, dl, MVT::f32, in LowerF64Op()
2901 SDValue Lo32 = DAG.getTargetExtractSubreg(SP::sub_odd, dl, MVT::f32, in LowerF64Op()
3047 SDValue Hi64 = DAG.getTargetExtractSubreg(SP::sub_even64, dl, MVT::f64, in LowerFNEGorFABS()
3049 SDValue Lo64 = DAG.getTargetExtractSubreg(SP::sub_odd64, dl, MVT::f64, in LowerFNEGorFABS()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp219 CurDAG->getTargetExtractSubreg(CSKY::sub32_0, dl, MVT::i32, RegCopy); in selectInlineAsm()
221 CurDAG->getTargetExtractSubreg(CSKY::sub32_32, dl, MVT::i32, RegCopy); in selectInlineAsm()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp919 return CurDAG->getTargetExtractSubreg(AArch64::sub_32, dl, MVT::i32, N); in narrowIfNeeded()
1744 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad()
1783 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad()
1890 ReplaceUses(SDValue(N, I), CurDAG->getTargetExtractSubreg( in SelectPExtPair()
1906 ReplaceUses(SDValue(N, I), CurDAG->getTargetExtractSubreg( in SelectWhilePair()
1921 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectCVTIntrinsic()
1939 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectCVTIntrinsicFP8()
1980 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectDestructiveMultiIntrinsic()
2010 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectPredicatedLoad()
2045 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectContiguousMultiVectorLoad()
[all …]
H A DAArch64ISelLowering.cpp4477 SDValue Result = DAG.getTargetExtractSubreg(AArch64::hsub, DL, VT, Narrow); in LowerFP_ROUND()
5158 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, OpVT, Op); in LowerBITCAST()
10685 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, VT, BSP); in LowerFCOPYSIGN()
10687 return DAG.getTargetExtractSubreg(AArch64::ssub, DL, VT, BSP); in LowerFCOPYSIGN()
10689 return DAG.getTargetExtractSubreg(AArch64::dsub, DL, VT, BSP); in LowerFCOPYSIGN()
11606 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, Ty, Res); in LowerSELECT()
24113 SDValue FPSubreg = DAG.getTargetExtractSubreg(getFPSubregForVT(FPMemVT), DL, in performSTORECombine()
27516 SDValue Lo = DAG.getTargetExtractSubreg(SubReg1, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
27518 SDValue Hi = DAG.getTargetExtractSubreg(SubReg2, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h477 return DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, V); in LoHalf()
488 return DAG.getTargetExtractSubreg(Hexagon::isub_hi, dl, MVT::i32, V); in HiHalf()
H A DHexagonISelDAGToDAGHVX.cpp1190 Op = DAG.getTargetExtractSubreg(Sub, dl, HalfTy, Op); in materialize()
1881 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, Vec); in scalarizeShuffle()
1883 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, Vec); in scalarizeShuffle()
2576 SDValue Ext = DAG.getTargetExtractSubreg(SubReg, SDLoc(N), ResTy, Inp); in selectExtractSubvector()
H A DHexagonISelDAGToDAG.cpp531 Value = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, in SelectIndexedStore()
721 SDValue Ext = CurDAG->getTargetExtractSubreg(SubReg, SDLoc(N), ResTy, Inp); in SelectExtractSubvector()
834 SDValue E = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, dl, ResTy, in SelectVAlign()
H A DHexagonISelLoweringHVX.cpp1285 VecV = DAG.getTargetExtractSubreg(SubIdx, dl, VecTy, VecV); in extractHvxSubvectorReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2241 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2524 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
2830 CurDAG->getTargetExtractSubreg(ARM::qsub_0 + i, Loc, VT, in SelectMVE_VLD()
2936 SDValue SubReg = CurDAG->getTargetExtractSubreg(SubRegs[ResIdx], Loc, in SelectCDE_CXxD()
3061 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg)); in SelectVLDDup()
3118 SDValue NewExt = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt()
3130 SDValue Inp1 = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt()
3132 SDValue Inp2 = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt()
4059 SDValue Lo = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32, in Select()
4061 SDValue Hi = CurDAG->getTargetExtractSubreg(ARM::gsub_1, dl, MVT::i32, in Select()
[all …]
H A DARMISelLowering.cpp10562 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_1 : ARM::gsub_0, in ReplaceCMP_SWAP_64Results()
10565 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_0 : ARM::gsub_1, in ReplaceCMP_SWAP_64Results()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1087 CurDAG->getTargetExtractSubreg(RISCV::sub_16, DL, VT, Imm).getNode(); in Select()
1090 CurDAG->getTargetExtractSubreg(RISCV::sub_32, DL, VT, Imm).getNode(); in Select()
1136 SDValue Lo = CurDAG->getTargetExtractSubreg(RISCV::sub_gpr_even, DL, in Select()
1143 SDValue Hi = CurDAG->getTargetExtractSubreg( in Select()
1806 SDValue Lo = CurDAG->getTargetExtractSubreg(RISCV::sub_gpr_even, DL, in Select()
1808 SDValue Hi = CurDAG->getTargetExtractSubreg(RISCV::sub_gpr_odd, DL, in Select()
2629 SDValue Extract = CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, V); in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp597 CurDAG->getTargetExtractSubreg(Src0SubReg, DL, EltVT, VSrc0); in SelectVectorShuffle()
599 CurDAG->getTargetExtractSubreg(Src1SubReg, DL, EltVT, VSrc1); in SelectVectorShuffle()
3183 Lo = CurDAG->getTargetExtractSubreg( in SelectVOP3PMods()
3189 Hi = CurDAG->getTargetExtractSubreg( in SelectVOP3PMods()
H A DSIISelLowering.cpp16383 SDValue PtrLo = DAG.getTargetExtractSubreg(AMDGPU::sub0, DL, MVT::i32, Ptr); in buildRSRC()
16384 SDValue PtrHi = DAG.getTargetExtractSubreg(AMDGPU::sub1, DL, MVT::i32, Ptr); in buildRSRC()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp977 return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N); in convertTo()
1212 Node, CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, Op).getNode()); in loadVectorConstant()
H A DSystemZISelLowering.cpp1889 SDValue Hi = DAG.getTargetExtractSubreg(SystemZ::subreg_h64, in lowerGR128ToI128()
1891 SDValue Lo = DAG.getTargetExtractSubreg(SystemZ::subreg_l64, in lowerGR128ToI128()
3574 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
3575 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
4314 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, in lowerBITCAST()
4323 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
6893 DAG.getTargetExtractSubreg(SystemZ::subreg_h16, DL, MVT::f16, BCast); in convertToF16()
7211 DAG.getTargetExtractSubreg(SystemZ::subreg_l64, SL, MVT::f64, Src); in expandBitCastF128ToI128()
7213 DAG.getTargetExtractSubreg(SystemZ::subreg_h64, SL, MVT::f64, Src); in expandBitCastF128ToI128()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp6048 CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result); in Select()
6124 CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl, MVT::i8, FNSTSW); in Select()
6253 CurDAG->getTargetExtractSubreg(SubRegIdx, dl, SubRegVT, Shift); in Select()
6338 Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg); in Select()
6459 Result = CurDAG->getTargetExtractSubreg(SubIndex, dl, VT, Result); in Select()
6480 Result = CurDAG->getTargetExtractSubreg(SubIndex, dl, VT, Result); in Select()
H A DX86ISelLowering.cpp27301 DAG.getTargetExtractSubreg(X86::sub_mask_0, DL, MaskVT, Operation); in LowerINTRINSIC_WO_CHAIN()
27303 DAG.getTargetExtractSubreg(X86::sub_mask_1, DL, MaskVT, Operation); in LowerINTRINSIC_WO_CHAIN()
27940 SDValue Res0 = DAG.getTargetExtractSubreg(X86::sub_t0, DL, MVT::x86amx, in LowerINTRINSIC_W_CHAIN()
27942 SDValue Res1 = DAG.getTargetExtractSubreg(X86::sub_t1, DL, MVT::x86amx, in LowerINTRINSIC_W_CHAIN()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1836 LLVM_ABI SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp5903 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp11496 SDValue SelectionDAG::getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT, in getTargetExtractSubreg() function in SelectionDAG
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc15163 …SubregEiNS_8DebugLocENS_3EVTENS_7SDValueE", "llvm::SelectionDAG::getTargetExtractSubreg(int, llvm:…