| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterBankInfo.cpp | 198 OperandsMapping = Ty.getSizeInBits() == 64 in getInstrMapping()
234 LargeTy.getSizeInBits() <= 32 in getInstrMapping()
244 Ty.getSizeInBits() == 64 in getInstrMapping()
256 OperandsMapping =Ty.getSizeInBits() == 64 in getInstrMapping()
264 Ty.getSizeInBits() == 64 in getInstrMapping()
278 if (ToTy.getSizeInBits() == 64 && FromTy.getSizeInBits() == 32) in getInstrMapping()
287 if (ToTy.getSizeInBits() == 32 && FromTy.getSizeInBits() == 64) in getInstrMapping()
297 if ((FromTy.getSizeInBits() == 32 || FromTy.getSizeInBits() == 64) && in getInstrMapping()
298 ToTy.getSizeInBits() == 32) in getInstrMapping()
300 FromTy.getSizeInBits() == 64 in getInstrMapping()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 133 return getSizeInBits().isZero(); in isZeroSized()
239 return !isZeroSized() && getSizeInBits().isKnownMultipleOf(8); in isByteSized()
246 unsigned BitSize = getSizeInBits(); in isRound()
253 return getSizeInBits() == VT.getSizeInBits(); in bitsEq()
258 return TypeSize::isKnownGT(getSizeInBits(), VT.getSizeInBits()); in knownBitsGT()
264 return TypeSize::isKnownGE(getSizeInBits(), VT.getSizeInBits()); in knownBitsGE()
269 return TypeSize::isKnownLT(getSizeInBits(), VT.getSizeInBits()); in knownBitsLT()
275 return TypeSize::isKnownLE(getSizeInBits(), VT.getSizeInBits()); in knownBitsLE()
368 TypeSize getSizeInBits() const { in getSizeInBits() function
370 return V.getSizeInBits(); in getSizeInBits()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVRegisterBankInfo.cpp | 263 TypeSize Size = Ty.getSizeInBits(); in getInstrMapping()
281 assert(Size == OpTy.getSizeInBits() && "Operand has incompatible size"); in getInstrMapping()
294 unsigned DstMinSize = DstTy.getSizeInBits().getKnownMinValue(); in getInstrMapping()
316 TypeSize Size = Ty.getSizeInBits(); in getInstrMapping()
350 TypeSize Size = Ty.getSizeInBits(); in getInstrMapping()
364 OpdsMapping[0] = getFPValueMapping(Ty.getSizeInBits()); in getInstrMapping()
370 OpdsMapping[0] = getFPValueMapping(Ty.getSizeInBits()); in getInstrMapping()
381 getVRBValueMapping(Ty.getSizeInBits().getKnownMinValue()); in getInstrMapping()
383 getVRBValueMapping(TestTy.getSizeInBits().getKnownMinValue()); in getInstrMapping()
393 if (GPRSize == 32 && Ty.getSizeInBits() == 64) { in getInstrMapping()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterBankInfo.cpp | |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalityPredicates.cpp | 122 return QueryTy.isScalar() && QueryTy.getSizeInBits() < Size; in scalarNarrowerThan()
130 return QueryTy.isScalar() && QueryTy.getSizeInBits() > Size; in scalarWiderThan()
137 return Query.Types[TypeIdx0].getSizeInBits() < in smallerThan()
138 Query.Types[TypeIdx1].getSizeInBits(); in smallerThan()
145 return Query.Types[TypeIdx0].getSizeInBits() > in largerThan()
146 Query.Types[TypeIdx1].getSizeInBits(); in largerThan()
177 return QueryTy.isScalar() && QueryTy.getSizeInBits() % Size != 0; in sizeNotMultipleOf()
185 !llvm::has_single_bit<uint32_t>(QueryTy.getSizeInBits()); in sizeNotPow2()
191 return Query.Types[TypeIdx].getSizeInBits() == Size; in sizeIs()
198 return Query.Types[TypeIdx0].getSizeInBits() == in sameSize()
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| H A D | CallLowering.cpp | 354 int NumDst = LCMTy.getSizeInBits() / LLTy.getSizeInBits(); in mergeVectorRegsToResultRegs()
384 if (PartLLT.getSizeInBits() == LLTy.getSizeInBits() && OrigRegs.size() == 1 && in buildCopyFromRegs()
412 LLT IntPtrTy = LLT::scalar(OrigTy.getSizeInBits()); in buildCopyFromRegs()
425 unsigned SrcSize = PartLLT.getSizeInBits().getFixedValue() * Regs.size(); in buildCopyFromRegs()
426 if (SrcSize == OrigTy.getSizeInBits()) in buildCopyFromRegs()
444 if (TypeSize::isKnownGT(PartLLT.getSizeInBits(), LLTy.getSizeInBits()) && in buildCopyFromRegs()
478 assert(DstEltTy.getSizeInBits() == RealDstEltTy.getSizeInBits()); in buildCopyFromRegs()
489 } else if (DstEltTy.getSizeInBits() > PartLLT.getSizeInBits()) { in buildCopyFromRegs()
494 divideCeil(DstEltTy.getSizeInBits(), PartLLT.getSizeInBits()); in buildCopyFromRegs()
495 LLT ExtendedPartTy = LLT::scalar(PartLLT.getSizeInBits() * PartsPerElt); in buildCopyFromRegs()
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| H A D | MachineIRBuilder.cpp | 231 LLT MaskTy = LLT::scalar(PtrTy.getSizeInBits()); in buildMaskLowPtrBits()
256 assert((ResTy.getSizeInBits() > Op0Ty.getSizeInBits()) && in buildPadVectorWithUndefElements()
356 assert(APFloat::getSizeInBits(Val.getValueAPF().getSemantics()) in buildFConstant()
357 == EltTy.getSizeInBits() && in buildFConstant()
464 LLT OffsetTy = LLT::scalar(PtrTy.getSizeInBits()); in buildLoadFromOffset()
561 if (Res.getLLTTy(*getMRI()).getSizeInBits() > in buildExtOrTrunc()
562 Op.getLLTTy(*getMRI()).getSizeInBits()) in buildExtOrTrunc()
564 else if (Res.getLLTTy(*getMRI()).getSizeInBits() < in buildExtOrTrunc()
565 Op.getLLTTy(*getMRI()).getSizeInBits()) in buildExtOrTrunc()
627 assert(Index + DstTy.getSizeInBits() <= SrcTy.getSizeInBits() && in buildExtract()
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| H A D | LoadStoreOpt.cpp | 321 unsigned MaxSizeBits = NumPow2 * OrigTy.getSizeInBits().getFixedValue(); in mergeStores()
333 if (MergeSizeBits <= OrigTy.getSizeInBits()) in mergeStores()
336 unsigned NumStoresToMerge = MergeSizeBits / OrigTy.getSizeInBits(); in mergeStores()
367 LLT::scalar(NumStores * SmallTy.getSizeInBits().getFixedValue()); in doSingleStoreMerge()
405 APInt WideConst(WideValueTy.getSizeInBits(), 0); in doSingleStoreMerge()
409 WideConst.insertBits(ConstantVals[Idx], Idx * SmallTy.getSizeInBits()); in doSingleStoreMerge()
521 if (StoreMI.getMemSizeInBits() != ValueTy.getSizeInBits()) in addStoreToCandidate()
553 if (MRI->getType(C.Stores[0]->getValueReg()).getSizeInBits() != in addStoreToCandidate()
554 ValueTy.getSizeInBits()) in addStoreToCandidate()
715 switch (MemTy.getSizeInBits()) { in mergeTruncStore()
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| H A D | LegalizerHelper.cpp | 60 unsigned Size = OrigTy.getSizeInBits(); in getNarrowTypeBreakDown()
61 unsigned NarrowSize = NarrowTy.getSizeInBits(); in getNarrowTypeBreakDown()
80 int NumLeftover = LeftoverSize / LeftoverTy.getSizeInBits(); in getNarrowTypeBreakDown()
89 switch (Ty.getSizeInBits()) { in getFloatTypeForLLT()
263 int NumParts = LCMTy.getSizeInBits() / NarrowTy.getSizeInBits(); in buildLCMMergePieces()
264 int NumSubParts = NarrowTy.getSizeInBits() / GCDTy.getSizeInBits(); in buildLCMMergePieces()
281 MIRBuilder.buildConstant(LLT::scalar(64), GCDTy.getSizeInBits() - 1); in buildLCMMergePieces()
368 unsigned NumDefs = LCMTy.getSizeInBits() / DstTy.getSizeInBits(); in buildWidenedRemergeToDst()
717 OpTy = IntegerType::get(Ctx, OpLLT.getSizeInBits()); in createMemLibcall()
857 RetTy = IntegerType::get(Ctx, RetLLT.getSizeInBits()); in createAtomicLibcall()
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| H A D | Utils.cpp | 354 MRI.getType(MI->getOperand(0).getReg()).getSizeInBits())); in getConstantVRegValWithLookThrough()
516 unsigned RegSize = RegTy.getSizeInBits(); in extractParts()
517 unsigned MainSize = MainTy.getSizeInBits(); in extractParts()
1184 if (OrigTy.getSizeInBits() == TargetTy.getSizeInBits()) in getLCMType()
1201 if (OrigElt.getSizeInBits() == TargetElt.getSizeInBits()) { in getLCMType()
1210 unsigned LCM = std::lcm(OrigTy.getSizeInBits().getKnownMinValue(), in getLCMType()
1211 TargetTy.getSizeInBits().getKnownMinValue()); in getLCMType()
1213 ElementCount::get(LCM / OrigElt.getSizeInBits(), OrigTy.isScalable()), in getLCMType()
1225 if (EltTy.getSizeInBits() == ScalarTy.getSizeInBits()) in getLCMType()
1230 unsigned LCM = std::lcm(EltTy.getSizeInBits().getFixedValue() * in getLCMType()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LowLevelTypeUtils.cpp | 50 return MVT::getIntegerVT(Ty.getSizeInBits()); in getMVTForLLT()
53 MVT::getIntegerVT(Ty.getElementType().getSizeInBits()), in getMVTForLLT()
63 return EVT::getIntegerVT(Ctx, Ty.getSizeInBits()); in getApproximateEVTForLLT()
68 return LLT::scalar(Ty.getSizeInBits()); in getLLTForMVT()
71 Ty.getVectorElementType().getSizeInBits()); in getLLTForMVT()
76 switch (Ty.getSizeInBits()) { in getFltSemanticForLLT()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/ |
| H A D | MachineValueType.h | 199 MVT IntTy = MVT::getIntegerVT(EltTy.getSizeInBits()); in changeVectorElementTypeToInteger()
221 return MVT::getIntegerVT(getSizeInBits()); in changeTypeToInteger()
309 TypeSize getSizeInBits() const { in getSizeInBits() function
345 return getSizeInBits().getFixedValue(); in getFixedSizeInBits()
349 return getScalarType().getSizeInBits().getFixedValue(); in getScalarSizeInBits()
359 TypeSize BaseSize = getSizeInBits(); in getStoreSize()
381 bool isByteSized() const { return getSizeInBits().isKnownMultipleOf(8); } in isByteSized()
385 return TypeSize::isKnownGT(getSizeInBits(), VT.getSizeInBits()); in knownBitsGT()
391 return TypeSize::isKnownGE(getSizeInBits(), VT.getSizeInBits()); in knownBitsGE()
396 return TypeSize::isKnownLT(getSizeInBits(), VT.getSizeInBits()); in knownBitsLT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86RegisterBankInfo.cpp | 149 if (Ty.getSizeInBits() == 80) in getPartialMappingIdx()
152 switch (Ty.getSizeInBits()) { in getPartialMappingIdx()
169 switch (Ty.getSizeInBits()) { in getPartialMappingIdx()
182 switch (Ty.getSizeInBits()) { in getPartialMappingIdx()
332 assert(Ty1.getSizeInBits() == Ty2.getSizeInBits() && in getInstrMapping()
335 unsigned Size = Ty1.getSizeInBits(); in getInstrMapping()
352 bool isFPTrunc = (Ty0.getSizeInBits() == 32 || Ty0.getSizeInBits() == 64) && in getInstrMapping()
353 Ty1.getSizeInBits() == 128 && Opc == TargetOpcode::G_TRUNC; in getInstrMapping()
355 Ty0.getSizeInBits() == 128 && in getInstrMapping()
356 (Ty1.getSizeInBits() == 32 || Ty1.getSizeInBits() == 64) && in getInstrMapping()
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| H A D | X86InstructionSelector.cpp | 178 if (Ty.getSizeInBits() <= 8) in getRegClass()
180 if (Ty.getSizeInBits() == 16) in getRegClass()
182 if (Ty.getSizeInBits() == 32) in getRegClass()
184 if (Ty.getSizeInBits() == 64) in getRegClass()
188 if (Ty.getSizeInBits() == 16) in getRegClass()
190 if (Ty.getSizeInBits() == 32) in getRegClass()
192 if (Ty.getSizeInBits() == 64) in getRegClass()
194 if (Ty.getSizeInBits() == 128) in getRegClass()
196 if (Ty.getSizeInBits() == 256) in getRegClass()
198 if (Ty.getSizeInBits() == 512) in getRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBankInfo.cpp | 88 unsigned Size = Ty.getSizeInBits(); in getInstrMapping()
104 unsigned Size = getSizeInBits(SrcReg, MRI, TRI); in getInstrMapping()
122 unsigned CmpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
139 unsigned Size = getSizeInBits(SrcReg, MRI, TRI); in getInstrMapping()
149 unsigned Size = getSizeInBits(SrcReg, MRI, TRI); in getInstrMapping()
157 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
182 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
203 unsigned DstSize = DstTy.getSizeInBits(); in getInstrMapping()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 264 TypeSize Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
285 TypeSize Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
325 TypeSize Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
384 assert(MRI.getType(MI.getOperand(1).getReg()).getSizeInBits() < 32 && in applyMappingImpl()
419 TypeSize Size = Ty.getSizeInBits(); in getSameKindOfOperandsMapping()
437 RBIdx, OpTy.getSizeInBits()) == in getSameKindOfOperandsMapping()
487 return SrcTy.getElementType().getSizeInBits() >= 16 && in isFPIntrinsic()
703 getFPExtMapping(DstTy.getSizeInBits(), SrcTy.getSizeInBits()), in getInstrMapping()
712 if (ShiftAmtTy.getSizeInBits() == 64 && SrcTy.getSizeInBits() == 32) in getInstrMapping()
732 TypeSize Size = getSizeInBits(DstReg, MRI, TRI); in getInstrMapping()
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| H A D | AArch64InstructionSelector.cpp | 574 if (Ty.getSizeInBits() <= 32) in getRegClassForTypeOnBank()
577 if (Ty.getSizeInBits() == 64) in getRegClassForTypeOnBank()
580 if (Ty.getSizeInBits() == 128) in getRegClassForTypeOnBank()
586 switch (Ty.getSizeInBits()) { in getRegClassForTypeOnBank()
963 TypeSize DstSize = RBI.getSizeInBits(DstReg, MRI, TRI); in getRegClassesForCopy()
964 TypeSize SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); in getRegClassesForCopy()
1029 << RBI.getSizeInBits(DstReg, MRI, TRI) << '\n'); in selectCopy()
1109 const unsigned DstSize = DstTy.getSizeInBits(); in selectFPConvOpc()
1110 const unsigned SrcSize = SrcTy.getSizeInBits(); in selectFPConvOpc()
1192 const unsigned Size = Ty.getSizeInBits(); in emitSelect()
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| H A D | AArch64LegalizerInfo.cpp | 201 return !SrcTy.isVector() && SrcTy.getSizeInBits() == 32 && in AArch64LegalizerInfo()
202 AmtTy.getSizeInBits() == 32; in AArch64LegalizerInfo()
275 return SrcTy.isScalar() && SrcTy.getSizeInBits() < 128; in AArch64LegalizerInfo()
539 Query.Types[0].getSizeInBits() > 32; in AArch64LegalizerInfo()
546 return std::pair(0, LLT::scalar(VecTy.getSizeInBits())); in AArch64LegalizerInfo()
598 return Query.Types[0].getSizeInBits() == in AArch64LegalizerInfo()
599 Query.MMODescrs[0].MemoryTy.getSizeInBits(); in AArch64LegalizerInfo()
603 return std::pair(0, LLT::scalar(VecTy.getSizeInBits())); in AArch64LegalizerInfo()
737 unsigned DstSize = Query.Types[0].getSizeInBits(); in AArch64LegalizerInfo()
751 unsigned SrcSize = SrcTy.getSizeInBits(); in AArch64LegalizerInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 321 Sizes[I] = getSizeInBits(Reg, MRI, *TRI); in addMappingFromTable()
325 unsigned SizeI = getSizeInBits(MI.getOperand(I).getReg(), MRI, *TRI); in addMappingFromTable()
481 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
507 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
552 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
554 unsigned PtrSize = PtrTy.getSizeInBits(); in getInstrAlternativeMappings()
586 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
609 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
631 assert(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits() == 1); in getInstrAlternativeMappings()
664 assert(HalfTy.getSizeInBits() == 32); in split64BitValueForMapping()
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| H A D | AMDGPURegBankLegalizeRules.cpp | 30 return Ty.isPointer() && Ty.getSizeInBits() == Width; in isAnyPtr()
80 return MRI.getType(Reg).getSizeInBits() == 32; in matchUniformityAndLLT()
82 return MRI.getType(Reg).getSizeInBits() == 64; in matchUniformityAndLLT()
84 return MRI.getType(Reg).getSizeInBits() == 96; in matchUniformityAndLLT()
86 return MRI.getType(Reg).getSizeInBits() == 128; in matchUniformityAndLLT()
88 return MRI.getType(Reg).getSizeInBits() == 256; in matchUniformityAndLLT()
90 return MRI.getType(Reg).getSizeInBits() == 512; in matchUniformityAndLLT()
120 return MRI.getType(Reg).getSizeInBits() == 32 && MUI.isUniform(Reg); in matchUniformityAndLLT()
122 return MRI.getType(Reg).getSizeInBits() == 64 && MUI.isUniform(Reg); in matchUniformityAndLLT()
124 return MRI.getType(Reg).getSizeInBits() == 96 && MUI.isUniform(Reg); in matchUniformityAndLLT()
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| H A D | AMDGPULegalizerInfo.cpp | 64 unsigned Bits = Ty.getSizeInBits(); in getPow2ScalarType()
79 const unsigned EltSize = EltTy.getSizeInBits(); in isSmallOddVector()
82 Ty.getSizeInBits() % 32 != 0; in isSmallOddVector()
89 return Ty.getSizeInBits() % 32 == 0; in sizeIsMultipleOf32()
97 return EltTy.getSizeInBits() == 16 && Ty.getNumElements() > 2; in isWideVec16()
114 unsigned Size = Ty.getSizeInBits(); in fewerEltsToSize64Vector()
129 const int Size = Ty.getSizeInBits(); in moreEltsToNext32Bit()
130 const int EltSize = EltTy.getSizeInBits(); in moreEltsToNext32Bit()
145 const unsigned EltSize = Ty.getElementType().getSizeInBits(); in moreElementsToNextExistingRegClass()
149 assert(Ty.getSizeInBits() < MaxRegisterSize); in moreElementsToNextExistingRegClass()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 109 DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits())); in tryCombineAnyExt()
184 DstReg, CstVal.getCImm()->getValue().zext(DstTy.getSizeInBits())); in tryCombineZExt()
248 DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits())); in tryCombineSExt()
276 DstReg, CstVal.getCImm()->getValue().trunc(DstTy.getSizeInBits())); in tryCombineTrunc()
290 const unsigned DstSize = DstTy.getSizeInBits(); in tryCombineTrunc()
291 const unsigned MergeSrcSize = MergeSrcTy.getSizeInBits(); in tryCombineTrunc()
359 Finder.findValueFromDef(DstReg, 0, DstTy.getSizeInBits())) { in tryCombineTrunc()
436 const unsigned CastSrcSize = CastSrcTy.getSizeInBits(); in tryFoldUnmergeCast()
437 const unsigned DestSize = DestTy.getSizeInBits(); in tryFoldUnmergeCast()
556 const unsigned OpEltSize = OpTy.getElementType().getSizeInBits(); in canFoldMergeOpcode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 342 if (CurDAG->ComputeNumSignBits(N) > (VT.getSizeInBits() - 32)) { in selectSExti32()
359 APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(), 32); in selectZExti32()
399 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatImm()
400 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatImm()
424 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmInvPow2()
425 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmInvPow2()
445 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmPow2()
446 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmPow2()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGenTypes/ |
| H A D | LowLevelType.cpp | 23 VT.getVectorElementCount(), VT.getVectorElementType().getSizeInBits(), in LLT()
29 ElementCount::getFixed(0), VT.getSizeInBits(), /*AddressSpace=*/0); in LLT()
|