| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepOperands.td | 18 defm s6_0ImmPred : ImmOpPred<[{ return isShiftedInt<6, 0>(N->getSExtValue());}]>;
21 defm s32_0ImmPred : ImmOpPred<[{ return isShiftedInt<32, 0>(N->getSExtValue());}]>;
24 defm u10_0ImmPred : ImmOpPred<[{ return isShiftedUInt<10, 0>(N->getSExtValue());}]>;
27 defm u32_0ImmPred : ImmOpPred<[{ return isShiftedUInt<32, 0>(N->getSExtValue());}]>;
30 defm m32_0ImmPred : ImmOpPred<[{ return isShiftedInt<32, 0>(N->getSExtValue());}]>;
33 defm b13_2ImmPred : ImmOpPred<[{ return isShiftedInt<13, 2>(N->getSExtValue());}]>;
36 defm b15_2ImmPred : ImmOpPred<[{ return isShiftedInt<15, 2>(N->getSExtValue());}]>;
39 defm a30_2ImmPred : ImmOpPred<[{ return isShiftedInt<32, 2>(N->getSExtValue());}]>;
42 defm b30_2ImmPred : ImmOpPred<[{ return isShiftedInt<32, 2>(N->getSExtValue());}]>;
45 defm s31_1ImmPred : ImmOpPred<[{ return isShiftedInt<32, 1>(N->getSExtValue());}]>;
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| H A D | HexagonOperands.td | 13 def s8_0Imm64Pred : PatLeaf<(i64 imm), [{ return isInt<8>(N->getSExtValue()); }]>;
19 int64_t v = (int64_t)N->getSExtValue();
23 int64_t v = (int64_t)N->getSExtValue();
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| H A D | HexagonOptimizeSZextends.cpp | 109 if (!(C && C->getSExtValue() == 16)) in runOnFunction()
120 if (!(C && C->getSExtValue() == 16)) in runOnFunction()
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| H A D | HexagonIntrinsics.td | 112 int64_t V = N->getSExtValue();
150 int32_t V = N->getSExtValue();
155 int32_t V = N->getSExtValue();
245 int64_t v = (int64_t)(64 - N->getSExtValue());
250 int64_t v = (int64_t)(128 - N->getSExtValue());
255 int32_t Imm = N->getSExtValue();
260 int32_t Imm = N->getSExtValue();
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| H A D | HexagonISelDAGToDAG.cpp | 80 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in INITIALIZE_PASS()
216 SDValue I = CurDAG->getTargetConstant(Inc->getSExtValue(), dl, MVT::i32); in LoadInstrForLoadIntrinsic()
401 SDValue I = CurDAG->getTargetConstant(Inc->getSExtValue(), DL, MVT::i32); in SelectNewCircIntrinsic()
436 SDValue I = CurDAG->getTargetConstant(Inc->getSExtValue(), DL, MVT::i32); in SelectNewCircIntrinsic()
479 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in SelectIndexedStore()
589 int32_t ShlConst = cast<ConstantSDNode>(Shl_1)->getSExtValue(); in SelectSHL()
596 int32_t ValConst = C->getSExtValue() << ShlConst; in SelectSHL()
612 if (C1->getSExtValue() != 0 || Sub_1.getOpcode() != ISD::SHL) in SelectSHL()
617 int32_t ValConst = 1 << (ShlConst + C2->getSExtValue()); in SelectSHL()
751 unsigned Opc = (cast<ConstantSDNode>(N)->getSExtValue() != 0) in SelectConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelDAGToDAG.cpp | 91 return isInt<21>(CN.getSExtValue()) && ((CN.getSExtValue() & 0x3) == 0); in canBeRepresentedAsSls()
114 int32_t Imm = CN->getSExtValue(); in INITIALIZE_PASS()
135 if (isInt<16>(CN->getSExtValue())) { in selectAddrRiSpls()
136 int16_t Imm = CN->getSExtValue(); in selectAddrRiSpls()
148 if (isInt<10>(CN->getSExtValue())) { in selectAddrRiSpls()
149 int16_t Imm = CN->getSExtValue(); in selectAddrRiSpls()
179 if ((RiMode && isInt<16>(CN->getSExtValue())) || in selectAddrRiSpls()
180 (!RiMode && isInt<10>(CN->getSExtValue()))) { in selectAddrRiSpls()
191 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i32); in selectAddrRiSpls()
265 if (isInt<16>(CN->getSExtValue())) in selectAddrRr()
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| H A D | LanaiTargetTransformInfo.h | 67 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
71 if (isInt<32>(Imm.getSExtValue())) { in getIntImmCost()
72 if ((Imm.getSExtValue() & 0xFFFF) == 0) in getIntImmCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelDAGToDAG.cpp | 113 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeS9()
142 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeFar()
165 (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) { in SelectFrameADDR_ri()
169 CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr), MVT::i32); in SelectFrameADDR_ri()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGAddressAnalysis.cpp | 211 Offset += C->getSExtValue(); in matchLSNode()
216 Offset -= C->getSExtValue(); in matchLSNode()
228 Offset += C->getSExtValue(); in matchLSNode()
235 Offset += C->getSExtValue(); in matchLSNode()
246 auto Off = C->getSExtValue(); in matchLSNode()
289 Offset += cast<ConstantSDNode>(Index->getOperand(1))->getSExtValue(); in matchLSNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 30 return RegOrConstant(ValAndVReg->Value.getSExtValue()); in getAArch64VectorSplat()
73 if (!Zero || Zero->Value.getSExtValue() != 0) in tryEmitBZero()
84 if (Size->Value.getSExtValue() <= 256) in tryEmitBZero()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 53 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue(); in INITIALIZE_PASS()
166 if (isIntN(12, CN->getSExtValue())) { in SelectInlineAsmMemoryOperand()
180 if (isIntN(16, CN->getSExtValue()) && in SelectInlineAsmMemoryOperand()
216 int64_t CVal = cast<ConstantSDNode>(Addr)->getSExtValue(); in SelectAddrConstant()
363 SplatVal = CurDAG->getTargetConstant(ImmValue.getSExtValue(), SDLoc(N), in selectVSplatImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelDAGToDAG.cpp | 156 if (isInt<32>(CN->getSExtValue())) { in selectADDRzii()
187 if (isInt<32>(CN->getSExtValue())) { in selectADDRzi()
239 if (isInt<32>(CN->getSExtValue())) { in matchADDRri()
279 bool BCTrueMask = (BConst->getSExtValue() != 0); in Select()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaSystemZ.cpp | 30 if (AbortCode->getSExtValue() >= 0 && AbortCode->getSExtValue() < 256) in CheckSystemZBuiltinFunctionCall()
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| H A D | SemaM68k.cpp | 47 << AL << (int)MaybeNumParams->getSExtValue() in handleInterruptAttr()
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/ |
| H A D | NativeSymbolEnumerator.cpp | 84 int64_t N = Record.Value.getSExtValue(); in getValue()
123 return Variant{Record.Value.getSExtValue()}; in getValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | |
| H A D | SystemZTargetTransformInfo.cpp | 91 if (isInt<32>(Imm.getSExtValue())) in getIntImmCost()
138 if (isInt<16>(Imm.getSExtValue())) in getIntImmCostInst()
145 if (isInt<32>(Imm.getSExtValue())) in getIntImmCostInst()
159 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCostInst()
166 if (isInt<32>(Imm.getSExtValue())) in getIntImmCostInst()
253 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCostIntrin()
261 if (isInt<32>(Imm.getSExtValue())) in getIntImmCostIntrin()
266 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCostIntrin()
271 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCostIntrin()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelDAGToDAG.cpp | 114 && (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) { in SelectADDRspii()
117 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr), in SelectADDRspii()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelDAGToDAG.cpp | 125 if (isInt<16>(CN->getSExtValue())) { in INITIALIZE_PASS()
132 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in INITIALIZE_PASS()
152 if (isInt<16>(CN->getSExtValue())) { in SelectFIAddr()
159 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); in SelectFIAddr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 656 int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15 in getFP16Imm()
694 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 in getFP32Imm()
722 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023 in getFP64Imm()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoadStoreVectorizer.cpp | 1129 cast<ConstantInt>(OtherInstrB->getOperand(1))->getSExtValue(); in checkIfSafeAddSequence()
1131 IdxDiff.getSExtValue() == CstVal) in checkIfSafeAddSequence()
1139 cast<ConstantInt>(OtherInstrA->getOperand(1))->getSExtValue(); in checkIfSafeAddSequence()
1141 IdxDiff.getSExtValue() == -CstVal) in checkIfSafeAddSequence()
1154 cast<ConstantInt>(OtherInstrA->getOperand(1))->getSExtValue(); in checkIfSafeAddSequence()
1156 cast<ConstantInt>(OtherInstrB->getOperand(1))->getSExtValue(); in checkIfSafeAddSequence()
1158 IdxDiff.getSExtValue() == (CstValB - CstValA)) in checkIfSafeAddSequence()
1230 IdxDiff.sle(cast<ConstantInt>(OpB->getOperand(1))->getSExtValue()) && in getConstantOffsetComplexAddrs()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GIMatchTableExecutor.cpp | 35 return VRegVal->Value.getSExtValue() == Value; in isOperandImmEqual()
39 return VRegVal->getSExtValue() == Value; in isBaseWithConstantOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 620 int64_t Val = Cst->getSExtValue(); in tryShrinkShlLogicImm()
768 int64_t Offset = C->getSExtValue(); in tryIndexedLoad()
842 switch (LMulSDNode->getSExtValue()) { in selectSF_VC_X_SE()
904 int64_t Imm = ConstNode->getSExtValue(); in Select()
964 Imm = selectImm(CurDAG, DL, XLenVT, APF.bitcastToAPInt().getSExtValue(), in Select()
1253 bool IsCANDI = isInt<6>(N1C->getSExtValue()); in Select()
1489 if (IsANDIOrZExt && (isInt<12>(N1C->getSExtValue()) || !N0.hasOneUse())) in Select()
1496 if (IsZExtW && (isInt<32>(N1C->getSExtValue()) || !N0.hasOneUse())) in Select()
1545 int ConstantVal = ConstantOffset->getSExtValue(); in Select()
1610 int64_t CVal = C->getSExtValue(); in Select()
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| H A D | RISCVInstrInfoZb.td | 104 if (isInt<12>(N->getSExtValue()))
122 if (isInt<12>(N->getSExtValue()))
139 if (isInt<12>(N->getSExtValue()))
151 uint64_t I = N->getSExtValue();
164 if (isInt<12>(N->getSExtValue()))
179 int64_t C = N->getSExtValue();
187 int64_t C = N->getSExtValue();
194 return CurDAG->getTargetConstant(N->getSExtValue() >> 2, SDLoc(N),
199 return CurDAG->getTargetConstant(N->getSExtValue() >> 3, SDLoc(N),
210 return !C || !isInt<12>(C->getSExtValue());
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaAsmPrinter.cpp | 121 CFP->getValueAPF().bitcastToAPInt().getSExtValue(), OutContext); in emitMachineConstantPoolEntry()
123 Value = MCConstantExpr::create(CI->getValue().getSExtValue(), OutContext); in emitMachineConstantPoolEntry()
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