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Searched refs:getParent (Results 1 – 25 of 1207) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyDebugValueManager.cpp37 ME = Def->getParent()->end(); in WebAssemblyDebugValueManager()
70 if (Def->getParent() == Insert->getParent()) { in getSinkableDebugValues()
75 ME = Def->getParent()->end(); in getSinkableDebugValues()
90 if (!Def->getParent()->isSuccessor(Insert->getParent())) in getSinkableDebugValues()
96 ME = Def->getParent()->end(); in getSinkableDebugValues()
101 for (MachineBasicBlock::iterator MI = Insert->getParent()->begin(), in getSinkableDebugValues()
131 MachineRegisterInfo &MRI = Def->getParent()->getParent()->getRegInfo(); in getSinkableDebugValues()
222 if (Def->getParent() != Insert->getParent()) in isInsertSamePlace()
271 MachineBasicBlock *MBB = Insert->getParent(); in sink()
272 MachineFunction *MF = MBB->getParent(); in sink()
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H A DWebAssemblyMCInstLower.cpp55 const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); in GetGlobalAddressSymbol()
68 const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); in GetGlobalAddressSymbol()
188 *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>(); in lower()
202 MI->getParent()->getParent()->getRegInfo(); in lower()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DAliasAnalysisEvaluator.cpp137 PrintResults(AR, PrintNoAlias, *I1, *I2, F.getParent()); in runInternal()
141 PrintResults(AR, PrintMayAlias, *I1, *I2, F.getParent()); in runInternal()
145 PrintResults(AR, PrintPartialAlias, *I1, *I2, F.getParent()); in runInternal()
149 PrintResults(AR, PrintMustAlias, *I1, *I2, F.getParent()); in runInternal()
164 PrintLoadStoreResults(AR, PrintNoAlias, Load, Store, F.getParent()); in runInternal()
168 PrintLoadStoreResults(AR, PrintMayAlias, Load, Store, F.getParent()); in runInternal()
172 PrintLoadStoreResults(AR, PrintPartialAlias, Load, Store, F.getParent()); in runInternal()
176 PrintLoadStoreResults(AR, PrintMustAlias, Load, Store, F.getParent()); in runInternal()
191 PrintLoadStoreResults(AR, PrintNoAlias, *I1, *I2, F.getParent()); in runInternal()
195 PrintLoadStoreResults(AR, PrintMayAlias, *I1, *I2, F.getParent()); in runInternal()
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H A DCFG.cpp106 assert(is_contained(predecessors(Dest), TI->getParent()) && in isCriticalEdge()
261 assert(A->getParent() == B->getParent() && in isPotentiallyReachable()
285 assert(A->getParent()->getParent() == B->getParent()->getParent() && in isPotentiallyReachable()
288 if (A->getParent() == B->getParent()) { in isPotentiallyReachable()
294 BasicBlock *BB = const_cast<BasicBlock *>(A->getParent()); in isPotentiallyReachable()
318 return isPotentiallyReachableFromMany(Worklist, B->getParent(), in isPotentiallyReachable()
323 A->getParent(), B->getParent(), ExclusionSet, DT, LI); in isPotentiallyReachable()
H A DPHITransAddr.cpp142 if (Inst->getParent() != CurBB) { in translateSubExpr()
194 (!DT || DT->dominates(CastI->getParent(), PredBB))) in translateSubExpr()
232 GEPI->getParent()->getParent() == CurBB->getParent() && in translateSubExpr()
233 (!DT || DT->dominates(GEPI->getParent(), PredBB))) { in translateSubExpr()
284 BO->getParent()->getParent() == CurBB->getParent() && in translateSubExpr()
285 (!DT || DT->dominates(BO->getParent(), PredBB))) in translateSubExpr()
313 if (!DT->dominates(Inst->getParent(), PredBB)) in translateValue()
382 BasicBlock *CurBB = GEP->getParent(); in insertTranslatedSubExpr()
H A DMustExecute.cpp107 Function *Fn = CurLoop->getHeader()->getParent(); in computeBlockColors()
140 if (!LHS || LHS->getParent() != CurLoop->getHeader()) in CanProveNotTakenFirstIteration()
264 if (Inst.getParent() == CurLoop->getHeader()) in isGuaranteedToExecute()
270 Inst.getParent()->getFirstNonPHIOrDbg() == &Inst; in isGuaranteedToExecute()
274 return allLoopPathsLeadToBlock(CurLoop, Inst.getParent(), DT); in isGuaranteedToExecute()
281 allLoopPathsLeadToBlock(CurLoop, Inst.getParent(), DT); in isGuaranteedToExecute()
306 auto *BB = I.getParent(); in doesNotWriteMemoryBefore()
332 Loop *L = LI.getLoopFor(I.getParent()); in MustExecuteAnnotatedWriter()
345 Loop *L = LI.getLoopFor(I.getParent()); in MustExecuteAnnotatedWriter()
377 if (L.getHeader()->getParent()->hasFnAttribute(Attribute::WillReturn)) in maybeEndlessLoop()
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/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DIRBuilder.cpp50 M = BB->getParent()->getParent(); in CreateGlobalString()
60 assert(BB && BB->getParent() && "No current function!"); in getCurrentFunctionReturnType()
61 return BB->getParent()->getReturnType(); in getCurrentFunctionReturnType()
93 Module *M = GetInsertBlock()->getParent()->getParent(); in CreateVScale()
144 Module *M = BB->getParent()->getParent(); in CreateMemSet()
172 Module *M = BB->getParent()->getParent(); in CreateMemSetInline()
199 Module *M = BB->getParent()->getParent(); in CreateElementUnorderedAtomicMemSet()
229 Module *M = BB->getParent()->getParent(); in CreateMemTransferInst()
267 Module *M = BB->getParent()->getParent(); in CreateElementUnorderedAtomicMemCpy()
326 Module *M = BB->getParent()->getParent(); in CreateMalloc()
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H A DInstruction.cpp47 assert(!getParent() && "Instruction still linked in the program!"); in ~Instruction()
67 return getParent()->getModule(); in getModule()
71 return getParent()->getParent(); in getFunction()
82 getParent()->getInstList().remove(getIterator()); in removeFromParent()
86 if (!getParent()->IsNewDbgInfoFormat || !DebugMarker) in handleMarkerRemoval()
94 return getParent()->getInstList().erase(getIterator()); in eraseFromParent()
104 insertBefore(*InsertPos->getParent(), InsertPos); in insertBefore()
110 BasicBlock *DestParent = InsertPos->getParent(); in insertAfter()
117 assert(getParent() == nullptr && "Expected detached instruction"); in insertInto()
118 assert((It == ParentBB->end() || It->getParent() == ParentBB) && in insertInto()
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H A DDiagnosticInfo.cpp258 *cast<BasicBlock>(CodeRegion)->getParent(), Loc, CodeRegion) {} in OptimizationRemark()
264 RemarkName, *Inst->getParent()->getParent(), in OptimizationRemark()
265 Inst->getDebugLoc(), Inst->getParent()) {} in OptimizationRemark()
289 *cast<BasicBlock>(CodeRegion)->getParent(), Loc, CodeRegion) {} in OptimizationRemarkMissed()
296 *Inst->getParent()->getParent(), in OptimizationRemarkMissed()
297 Inst->getDebugLoc(), Inst->getParent()) {} in OptimizationRemarkMissed()
317 *cast<BasicBlock>(CodeRegion)->getParent(), Loc, CodeRegion) {} in OptimizationRemarkAnalysis()
324 *Inst->getParent()->getParent(), in OptimizationRemarkAnalysis()
325 Inst->getDebugLoc(), Inst->getParent()) {} in OptimizationRemarkAnalysis()
331 *cast<BasicBlock>(CodeRegion)->getParent(), in OptimizationRemarkAnalysis()
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H A DDominators.cpp129 return properlyDominates(BB, UserInst->getParent()); in dominates()
144 const BasicBlock *UseBB = User->getParent(); in dominates()
145 const BasicBlock *DefBB = Def->getParent(); in dominates()
173 // note that dominates(Def, Def->getParent()) is false.
176 const BasicBlock *DefBB = Def->getParent(); in dominates()
254 if (PN && PN->getParent() == BBE.getEnd() && in dominates()
264 UseBB = UserInst->getParent(); in dominates()
277 const BasicBlock *DefBB = Def->getParent(); in dominates()
286 UseBB = UserInst->getParent(); in dominates()
333 return isReachableFromEntry(I->getParent()); in isReachableFromEntry()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSERegisterInfo.cpp107 const MipsSubtarget &Subtarget = MO.getParent() in getLoadStoreOffsetSizeInBits()
108 ->getParent() in getLoadStoreOffsetSizeInBits()
109 ->getParent() in getLoadStoreOffsetSizeInBits()
150 MachineFunction &MF = *MI.getParent()->getParent(); in eliminateFI()
220 MachineBasicBlock &MBB = *MI.getParent(); in eliminateFI()
224 MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo(); in eliminateFI()
228 MBB.getParent()->getSubtarget().getInstrInfo()); in eliminateFI()
239 MachineBasicBlock &MBB = *MI.getParent(); in eliminateFI()
244 MBB.getParent() in eliminateFI()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp226 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); in tryChangeVGPRtoSGPRinCopy()
234 const auto *UseMI = MO.getParent(); in tryChangeVGPRtoSGPRinCopy()
237 if (MO.isDef() || UseMI->getParent() != MI.getParent() || in tryChangeVGPRtoSGPRinCopy()
321 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY), in foldVGPRCopyIntoRegSequence()
330 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(Opc), in foldVGPRCopyIntoRegSequence()
413 const MachineBasicBlock *MBBFrom = From->getParent(); in isReachable()
414 const MachineBasicBlock *MBBTo = To->getParent(); in isReachable()
485 const MachineBasicBlock *MBBFrom = From->getParent(); in hoistAndMergeSGPRInits()
486 const MachineBasicBlock *MBBTo = To->getParent(); in hoistAndMergeSGPRInits()
501 MDT.properlyDominates(Clobber->getParent(), MBBTo)); in hoistAndMergeSGPRInits()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineBasicBlock.cpp63 const MachineFunction *MF = getParent(); in getSymbol()
95 const MachineFunction *MF = getParent(); in getEHCatchretSymbol()
106 const MachineFunction *MF = getParent(); in getEndSymbol()
133 MachineFunction &MF = *N->getParent(); in addNodeToList()
144 N->getParent()->removeFromMBBNumbering(N->Number); in removeNodeFromList()
151 assert(!N->getParent() && "machine instruction already in a basic block"); in addNodeToList()
156 MachineFunction *MF = Parent->getParent(); in addNodeToList()
164 assert(N->getParent() && "machine instruction not in a basic block"); in removeNodeFromList()
180 assert(Parent->getParent() == FromList.Parent->getParent() && in transferNodesFromList()
196 assert(!MI->getParent() && "MI is still in a block!"); in deleteNode()
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H A DReachingDefAnalysis.cpp124 unsigned MBBNumber = MI->getParent()->getNumber(); in processDefs()
267 unsigned MBBNumber = MI->getParent()->getNumber(); in getReachingDef()
286 ? getInstFromId(MI->getParent(), getReachingDef(MI, PhysReg)) in getReachingLocalMIDef()
292 MachineBasicBlock *ParentA = A->getParent(); in hasSameReachingDef()
293 MachineBasicBlock *ParentB = B->getParent(); in hasSameReachingDef()
333 MachineBasicBlock *MBB = Def->getParent(); in getReachingLocalUses()
376 MachineBasicBlock *MBB = MI->getParent(); in getGlobalUses()
382 if (auto *LiveOut = getLocalLiveOutMIDef(MI->getParent(), PhysReg)) { in getGlobalUses()
407 for (auto *MBB : MI->getParent()->predecessors()) in getGlobalReachingDefs()
445 MachineBasicBlock *Parent = MI->getParent(); in getUniqueReachingMIDef()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanVerifier.cpp67 const VPRegionBlock *ParentR = VPBB->getParent(); in verifyPhiRecipes()
139 if (UI->getParent() == VPBB) { in verifyVPBasicBlock()
147 if (!VPDT.dominates(VPBB, UI->getParent())) { in verifyVPBasicBlock()
191 (VPBB && VPBB->getParent() && VPBB->isExiting() && in verifyBlock()
192 !VPBB->getParent()->isReplicator())) { in verifyBlock()
235 if (Pred->getParent() != VPB->getParent()) { in verifyBlock()
253 if (VPB->getParent() != Region) { in verifyBlocksInRegion()
300 if (TopRegion->getParent()) { in verify()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CleanupLocalDynamicTLSPass.cpp100 MachineFunction *MF = I.getParent()->getParent(); in replaceTLSBaseAddrCall()
105 MachineInstr *Copy = BuildMI(*I.getParent(), I, I.getDebugLoc(), in replaceTLSBaseAddrCall()
122 MachineFunction *MF = I.getParent()->getParent(); in setRegister()
131 BuildMI(*I.getParent(), ++I.getIterator(), I.getDebugLoc(), in setRegister()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeMoverUtils.cpp99 if (InstA->getParent() == InstB->getParent()) in domTreeLevelBefore()
102 DomTreeNode *DA = DT->getNode(InstA->getParent()); in domTreeLevelBefore()
103 DomTreeNode *DB = DT->getNode(InstB->getParent()); in domTreeLevelBefore()
234 return isControlFlowEquivalent(*I0.getParent(), *I1.getParent(), DT, PDT); in isControlFlowEquivalent()
342 if (I.getParent() == InsertPoint.getParent() && in isSafeToMoveBefore()
343 UserInst == I.getParent()->getTerminator()) in isSafeToMoveBefore()
349 if (CheckForEntireBlock && I.getParent() == UserInst->getParent() && in isSafeToMoveBefore()
362 if (CheckForEntireBlock && I.getParent() == OpInst->getParent() && in isSafeToMoveBefore()
485 const BasicBlock *BB0 = I0->getParent(); in isReachedBefore()
486 const BasicBlock *BB1 = I1->getParent(); in isReachedBefore()
H A DMemoryTaggingSupport.cpp59 EndBlocks.insert(End->getParent()); in forAllReachableExits()
71 if (EndBlocks.contains(RI->getParent()) || in forAllReachableExits()
104 if (CallInst *CI = Inst.getParent()->getTerminatingMustTailCall()) in getUntagLocationIfFunctionExit()
250 Module *M = IRB.GetInsertBlock()->getParent()->getParent(); in readRegister()
260 Module *M = IRB.GetInsertBlock()->getParent()->getParent(); in getPC()
263 return IRB.CreatePtrToInt(IRB.GetInsertBlock()->getParent(), in getPC()
268 Function *F = IRB.GetInsertBlock()->getParent(); in getFP()
269 Module *M = F->getParent(); in getFP()
280 Module *M = IRB.GetInsertBlock()->getParent()->getParent(); in getAndroidSlotPtr()
H A DSimplifyCFG.cpp349 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators()
350 BasicBlock *SI2BB = SI2->getParent(); in SafeToMergeTerminators()
431 BasicBlock *PBB = I->getParent(); in dominatesMergePoint()
780 if (!SI->getParent()->hasNPredecessorsOrMore(128 / SI->getNumSuccessors())) in isValueEqualityComparison()
870 N = MDBuilder(SI->getParent()->getContext()) in setBranchWeights()
884 N = MDBuilder(I->getParent()->getContext()) in setBranchWeights()
921 if (PredDef == TI->getParent()) { in SimplifyEqualityComparisonWithOnlyPredecessor()
990 BasicBlock *TIBB = TI->getParent(); in SimplifyEqualityComparisonWithOnlyPredecessor()
1146 assert(UI->getParent() == BB && BonusInst.comesBefore(UI) && in CloneInstructionsIntoPredecessorBlockAndUpdateSSAUses()
1165 BasicBlock *BB = TI->getParent(); in PerformValueComparisonIntoPredecessorFolding()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCReduceCRLogicals.cpp69 if (DefMI->getParent() == NewMBB || in updatePHIs()
99 MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI); in addIncomingValuesToPHIs()
120 MachineBasicBlock *MBB = OrigBranch->getParent(); in allInstrsInSameMBB()
121 if (SplitBefore->getParent() != MBB || SplitCond->getParent() != MBB) in allInstrsInSameMBB()
123 if (MIToDelete && MIToDelete->getParent() != MBB) in allInstrsInSameMBB()
125 if (NewCond && NewCond->getParent() != MBB) in allInstrsInSameMBB()
144 MachineBasicBlock *ThisMBB = BSI.OrigBranch->getParent(); in splitMBB()
145 MachineFunction *MF = ThisMBB->getParent(); in splitMBB()
508 if (UseMI.getParent() != MIParam.getParent()) in createCRLogicalOpInfo()
516 (MIParam.getParent() == Ret.TrueDefs.first->getParent()); in createCRLogicalOpInfo()
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H A DPPCCTRLoops.cpp243 Start->getParent()->getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in expandNormalLoops()
245 MachineBasicBlock *Preheader = Start->getParent(); in expandNormalLoops()
246 MachineBasicBlock *Exiting = Dec->getParent(); in expandNormalLoops()
260 Start->getParent()->getParent()->getProperties().reset( in expandNormalLoops()
320 Start->getParent()->getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in expandCTRLoops()
322 MachineBasicBlock *Preheader = Start->getParent(); in expandCTRLoops()
323 MachineBasicBlock *Exiting = Dec->getParent(); in expandCTRLoops()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVISelLowering.cpp155 MachineFunction *MF = I.getParent()->getParent(); in validatePtrTypes()
167 bool IsSameMF = MF == ResType->getParent()->getParent(); in validatePtrTypes()
189 MachineFunction *MF = I.getParent()->getParent(); in validateGroupWaitEventsPtr()
210 MachineFunction *MF = I.getParent()->getParent(); in validateGroupAsyncCopyPtr()
263 DefPtrType->getParent()->getParent()) in validateFunCallMachineDef()
272 GR.setCurrentFunc(*FunCall.getParent()->getParent()); in validateFunCallMachineDef()
293 MachineRegisterInfo *DefMRI = &FunDef->getParent()->getParent()->getRegInfo(); in validateFunCall()
307 &FunCall->getParent()->getParent()->getRegInfo(); in validateForwardCalls()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.cpp142 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1) in replaceFI()
147 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1) in replaceFI()
160 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1) in replaceFI()
162 BuildMI(*MI.getParent(), II, dl, TII.get(SP::XORri), SP::G1)
165 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1) in eliminateFrameIndex()
182 MachineFunction &MF = *MI.getParent()->getParent(); in eliminateFrameIndex()
199 BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri)) in eliminateFrameIndex()
211 BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg) in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp68 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg) in expandStore()
71 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), in expandStore()
93 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::FLS_f_rr), Ra) in expandCTLZ()
95 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::MOV_cc_ru6), Rb) in expandCTLZ()
99 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::RSUB_cc_rru6)) in expandCTLZ()
120 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::FFS_f_rr), R) in expandCTTZ()
122 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::MOV_cc_ru6)) in expandCTTZ()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMachObjectWriter.cpp162 uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent()); in recordARMScatteredHalfRelocation()
178 FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent()); in recordARMScatteredHalfRelocation()
229 Writer->addRelocation(nullptr, Fragment->getParent(), MRE); in recordARMScatteredHalfRelocation()
240 Writer->addRelocation(nullptr, Fragment->getParent(), MRE); in recordARMScatteredHalfRelocation()
270 uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent()); in recordARMScatteredRelocation()
288 FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent()); in recordARMScatteredRelocation()
301 Writer->addRelocation(nullptr, Fragment->getParent(), MRE); in recordARMScatteredRelocation()
311 Writer->addRelocation(nullptr, Fragment->getParent(), MRE); in recordARMScatteredRelocation()
352 Value -= Writer->getSectionAddress(Fragment.getParent()); in requiresExternRelocation()
446 FixedValue -= Writer->getSectionAddress(Fragment->getParent()); in recordRelocation()
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