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Searched refs:getNode (Results 1 – 25 of 205) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp633 const auto Flags = Op.getNode()->getFlags(); in mayIgnoreSignedZero()
916 if (!allUsesHaveSourceMods(Op.getNode())) in getNegatedExpression()
928 return DAG.getNode(AMDGPUISD::RCP, SL, VT, NegSrc, Op->getFlags()); in getNegatedExpression()
1273 return DAG.getNode(AMDGPUISD::ENDPGM, DL, MVT::Other, Chain); in LowerReturn()
1305 for (SDNode *U : DAG.getEntryNode().getNode()->uses()) { in addTokenForArgument()
1322 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains); in addTokenForArgument()
1487 SDValue Trap = DAG.getNode(ISD::TRAP, DL, MVT::Other, DAG.getEntryNode()); in LowerGlobalAddress()
1488 SDValue OutputChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, in LowerGlobalAddress()
1522 SDValue NewIn = DAG.getNode(ISD::BITCAST, SL, NewEltVT, In); in LowerCONCAT_VECTORS()
1532 return DAG.getNode(ISD::BITCAST, SL, VT, BV); in LowerCONCAT_VECTORS()
[all …]
H A DAMDGPUHSAMetadataStreamer.cpp183 Dims.push_back(Dims.getDocument()->getNode( in getWorkGroupDimensions()
190 Version.push_back(Version.getDocument()->getNode(VersionMajorV4)); in emitVersion()
191 Version.push_back(Version.getDocument()->getNode(VersionMinorV4)); in emitVersion()
198 HSAMetadataDoc->getNode(TargetID.toString(), /*Copy=*/true); in emitTargetID()
209 Printf.push_back(Printf.getDocument()->getNode( in emitPrintf()
224 Kern[".language"] = Kern.getDocument()->getNode("OpenCL C"); in emitKernelLanguage()
226 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
228 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
241 Kern[".vec_type_hint"] = Kern.getDocument()->getNode( in emitKernelAttrs()
248 Kern[".device_enqueue_symbol"] = Kern.getDocument()->getNode( in emitKernelAttrs()
[all …]
H A DR600ISelLowering.cpp414 assert((!Result.getNode() || in LowerOperation()
415 Result.getNode()->getNumValues() == 2) && in LowerOperation()
441 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); in LowerOperation()
490 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs); in LowerOperation()
494 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
496 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
498 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
500 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
502 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
504 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECustomDAG.cpp219 if (MemSDNode *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getNodeChain()
231 if (auto *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getMemoryPtr()
300 if (auto *StoreN = dyn_cast<VPStridedStoreSDNode>(Op.getNode())) in getLoadStoreStride()
302 if (auto *StoreN = dyn_cast<VPStridedLoadSDNode>(Op.getNode())) in getLoadStoreStride()
305 if (isa<MemSDNode>(Op.getNode())) { in getLoadStoreStride()
308 uint64_t ElemStride = getIdiomaticVectorType(Op.getNode()) in getLoadStoreStride()
317 if (auto *N = dyn_cast<MaskedGatherScatterSDNode>(Op.getNode())) in getGatherScatterIndex()
319 if (auto *N = dyn_cast<VPGatherScatterSDNode>(Op.getNode())) in getGatherScatterIndex()
325 if (auto *N = dyn_cast<MaskedGatherScatterSDNode>(Op.getNode())) in getGatherScatterScale()
327 if (auto *N = dyn_cast<VPGatherScatterSDNode>(Op.getNode())) in getGatherScatterScale()
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H A DVVPISelLowering.cpp33 auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB}); in splitMaskArithmetic()
34 auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB}); in splitMaskArithmetic()
59 EVT OpVecVT = *getIdiomaticVectorType(Op.getNode()); in lowerToVVP()
84 return CDAG.getNode(VVPOpcode, LegalVecVT, {Op->getOperand(0), Mask, AVL}); in lowerToVVP()
86 return CDAG.getNode(VVPOpcode, LegalVecVT, in lowerToVVP()
105 return CDAG.getNode(VVPOpcode, LegalVecVT, {X, Y, Z, Mask, AVL}); in lowerToVVP()
111 return CDAG.getNode(VVPOpcode, LegalVecVT, {OnTrue, OnFalse, Mask, AVL}); in lowerToVVP()
118 return CDAG.getNode(VVPOpcode, LegalResVT, {LHS, RHS, Pred, Mask, AVL}); in lowerToVVP()
140 auto DataVT = *getIdiomaticVectorType(Op.getNode()); in lowerVVP_LOAD_STORE()
155 auto NewLoadV = CDAG.getNode(VEIS in lowerVVP_LOAD_STORE()
[all...]
/freebsd/contrib/llvm-project/llvm/lib/BinaryFormat/
H A DMsgPackDocument.cpp31 return find(getDocument()->getNode(S)); in find()
37 return (*this)[getDocument()->getNode(S)]; in operator []()
53 return (*this)[getDocument()->getNode(Key)]; in operator []()
56 return (*this)[getDocument()->getNode(Key)]; in operator []()
59 return (*this)[getDocument()->getNode(Key)]; in operator []()
62 return (*this)[getDocument()->getNode(Key)]; in operator []()
80 *this = getDocument()->getNode(Val); in operator =()
84 *this = getDocument()->getNode(Val); in operator =()
88 *this = getDocument()->getNode(Val); in operator =()
92 *this = getDocument()->getNode(Va in operator =()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp433 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Call.second, in softenSetCCOperands()
435 NewLHS = DAG.getNode(ShouldInvertCC ? ISD::AND : ISD::OR, dl, in softenSetCCOperands()
485 return DAG.getNode(ISD::BRIND, dl, MVT::Other, Chain, Addr); in expandIndirectJTBranch()
527 return TLO.New.getNode(); in ShrinkDemandedConstant()
548 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC, in ShrinkDemandedConstant()
579 assert(Op.getNode()->getNumValues() == 1 && in ShrinkDemandedOp()
596 if (!Op.getNode()->hasOneUse()) in ShrinkDemandedOp()
608 SDValue X = DAG.getNode( in ShrinkDemandedOp()
610 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), in ShrinkDemandedOp()
611 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1))); in ShrinkDemandedOp()
[all …]
H A DLegalizeIntegerTypes.cpp343 if (Res.getNode()) in PromoteIntegerResult()
356 return DAG.getNode(ISD::AssertSext, SDLoc(N), in PromoteIntRes_AssertSext()
363 return DAG.getNode(ISD::AssertZext, SDLoc(N), in PromoteIntRes_AssertZext()
476 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
480 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
483 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftPromotedHalf(InOp)); in PromoteIntRes_BITCAST()
487 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp)); in PromoteIntRes_BITCAST()
496 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
513 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
517 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
[all …]
H A DLegalizeDAG.cpp232 UpdatedNodes->insert(New.getNode()); in ReplaceNode()
233 ReplacedNode(Old.getNode()); in ReplaceNode()
244 UpdatedNodes->insert(New[i].getNode()); in ReplaceNode()
255 UpdatedNodes->insert(New.getNode()); in ReplaceNodeWithValue()
256 ReplacedNode(Old.getNode()); in ReplaceNodeWithValue()
394 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, in ExpandINSERT_VECTOR_ELT()
470 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); in OptimizeFloatStore()
488 if (SDNode *OptStore = OptimizeFloatStore(ST).getNode()) { in LegalizeStoreOps()
522 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value); in LegalizeStoreOps()
576 Hi = DAG.getNode( in LegalizeStoreOps()
[all …]
H A DDAGCombiner.cpp724 if (ISD::isBuildVectorOfConstantSDNodes(StoreVal.getNode()) || in getStoreSource()
725 ISD::isBuildVectorOfConstantFPSDNodes(StoreVal.getNode())) in getStoreSource()
948 AddToWorklist(Op.getNode()); in deleteAndRecombine()
1062 ISD::isBuildVectorOfConstantFPSDNodes(V.getNode()); in isAnyConstantBuildVector()
1108 LoadStore && LoadStore->getBasePtr().getNode() == N) { in reassociationCanBreakAddressingModePattern()
1213 return DAG.getNode(Opc, DL, VT, N00, OpNode, NewFlags); in reassociateOpsCommutative()
1219 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N00, N1, NewFlags); in reassociateOpsCommutative()
1220 return DAG.getNode(Opc, DL, VT, OpNode, N01, NewFlags); in reassociateOpsCommutative()
1249 return DAG.getNode(Opc, DL, VT, SDValue(NE, 0), N01); in reassociateOpsCommutative()
1259 return DAG.getNode(Opc, DL, VT, SDValue(NE, 0), N00); in reassociateOpsCommutative()
[all …]
H A DResourcePriorityQueue.cpp74 const SDNode *ScegN = PredSU->getNode(); in numberRCValPredInSU()
112 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
131 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in numberRCValSuccInSU()
239 if (!SU || !SU->getNode()) in isResourceAvailable()
244 if (SU->getNode()->getGluedNode()) in isResourceAvailable()
249 if (SU->getNode()->isMachineOpcode()) in isResourceAvailable()
250 switch (SU->getNode()->getMachineOpcode()) { in isResourceAvailable()
253 SU->getNode()->getMachineOpcode()))) in isResourceAvailable()
284 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { in reserveResources()
289 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { in reserveResources()
[all …]
H A DLegalizeTypesGeneric.cpp58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
96 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
97 Hi = DAG.getNode(IS in ExpandRes_BITCAST()
[all...]
H A DMatchContext.h37 template <typename... ArgT> SDValue getNode(ArgT &&...Args) { in getNode() function
38 return DAG.getNode(std::forward<ArgT>(Args)...); in getNode()
96 !ISD::isConstantSplatVectorAllOnes(MaskOp.getNode())) in match()
111 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand) { in getNode() function
115 return DAG.getNode(VPOpcode, DL, VT, in getNode()
119 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode() function
124 return DAG.getNode(VPOpcode, DL, VT, {N1, N2, RootMaskOp, RootVectorLenOp}); in getNode()
127 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode() function
132 return DAG.getNode(VPOpcode, DL, VT, in getNode()
136 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand, in getNode() function
[all …]
H A DLegalizeVectorTypes.cpp230 if (R.getNode()) in ScalarizeVecRes_BinOp()
237 return DAG.getNode(N->getOpcode(), SDLoc(N), in ScalarizeVecRes_CMP()
252 LHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS, in ScalarizeVecRes_CMP()
254 RHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS, in ScalarizeVecRes_CMP()
258 return DAG.getNode(N->getOpcode(), SDLoc(N), in ScalarizeVecRes_TernaryOp()
266 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1, in ScalarizeVecRes_FIX()
274 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1, in ScalarizeVecRes_FFREXP()
288 DAG.getNode(N->getOpcode(), dl, in ScalarizeVecRes_FFREXP()
290 .getNode(); in ScalarizeVecRes_FFREXP()
298 SDValue OtherVal = DAG.getNode(IS in ScalarizeVecRes_FFREXP()
[all...]
H A DSelectionDAGBuilder.cpp208 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
209 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
215 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); in getCopyFromParts()
229 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); in getCopyFromParts()
230 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi, in getCopyFromParts()
234 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); in getCopyFromParts()
235 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); in getCopyFromParts()
242 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); in getCopyFromParts()
243 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); in getCopyFromParts()
246 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); in getCopyFromParts()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp209 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG); in LowerOperation()
249 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
254 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
256 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
287 GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining); in LowerGlobalAddress()
310 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, PtrVT, Result); in LowerBlockAddress()
328 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); in LowerConstantPool()
350 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
353 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
355 return DAG.getNode(XCoreISD::BR_JT32, dl, MVT::Other, Chain, TargetJT, in LowerBR_JT()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp503 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
550 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), in opJoin()
728 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
744 SDValue SubIdx = DAG.getNode(ISD::AND, dl, MVT::i32, {Idx, Mask}); in getIndexInWord32()
815 if (!SplatV.getNode()) in buildHvxVectorReg()
831 assert(SplatV.getNode()); in buildHvxVectorReg()
835 SDValue S = DAG.getNode(ISD::SPLAT_VECTOR, dl, WordTy, SplatV); in buildHvxVectorReg()
873 if (Vec.getNode() != nullptr && T.getNode() != Vec.getNode()) in buildHvxVectorReg()
[all...]
H A DHexagonISelDAGToDAG.cpp80 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in INITIALIZE_PASS()
251 SelectStore(TS.getNode()); in StoreInstrForLoadIntrinsic()
252 StoreN = Handle.getValue().getNode(); in StoreInstrForLoadIntrinsic()
282 SDNode *C = Ch.getNode(); in tryLoadOfLoadIntrinsic()
310 if (C->getNumOperands() < 4 || Loc.getNode() != C->getOperand(3).getNode()) in tryLoadOfLoadIntrinsic()
479 int32_t Inc = cast<ConstantSDNode>(Offset.getNode())->getSExtValue(); in SelectIndexedStore()
697 SDValue R = CurDAG->getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), in SelectIntrinsicWOChain()
699 ReplaceNode(N, R.getNode()); in SelectIntrinsicWOChain()
700 SelectCode(R.getNode()); in SelectIntrinsicWOChain()
721 ReplaceNode(N, Ext.getNode()); in SelectExtractSubvector()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp2164 isIntImmediate(N->getOperand(1).getNode(), Imm); in isOpcWithIntImmediate()
2248 New = TLO.DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in optimizeLogicalImm()
3238 N = N->getOperand(0).getNode(); in isZerosVector()
3443 LHS = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {MVT::f32, MVT::Other}, in emitStrictFPComparison()
3445 RHS = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {MVT::f32, MVT::Other}, in emitStrictFPComparison()
3452 return DAG.getNode(Opcode, dl, {VT, MVT::Other}, {Chain, LHS, RHS}); in emitStrictFPComparison()
3463 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in emitComparison()
3464 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in emitComparison()
3467 return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS); in emitComparison()
3491 const SDValue ANDSNode = DAG.getNode(AArch64ISD::ANDS, dl, in emitComparison()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp163 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, Arg.ArgVT, Value); in handleCMSEValue()
165 DAG.getNode(Arg.Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, DL, in handleCMSEValue()
2174 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2177 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2179 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2181 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2190 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2193 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2195 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2198 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2406 LHS = DAG.getNode(ISD::SHL, DL, LHS.getValueType(), LHS, in translateSetCCForBranch()
2736 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, DAG.getUNDEF(VT), V, Zero); in convertToScalableVector()
2748 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, V, Zero); in convertFromScalableVector()
2765 return DAG.getNode(RISCVISD::VMSET_VL, DL, MaskVT, VL); in getAllOnesMask()
2922 Src = DAG.getNode(ISD::FP_EXTEND, SDLoc(Op), MVT::f32, Src); in lowerFP_TO_INT_SAT()
2935 SDValue FpToInt = DAG.getNode( in lowerFP_TO_INT_SAT()
2978 SDValue IsNan = DAG.getNode(RISCVISD::SETCC_VL, DL, Mask.getValueType(), in lowerFP_TO_INT_SAT()
2987 Src = DAG.getNode(RISCVISD::FP_EXTEND_VL, DL, InterVT, Src, Mask, VL); in lowerFP_TO_INT_SAT()
2992 SDValue Res = DAG.getNode(RVVOpc, DL, DstContainerVT, Src, Mask, VL); in lowerFP_TO_INT_SAT()
2994 SDValue SplatZero = DAG.getNode( in lowerFP_TO_INT_SAT()
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp352 if (Result.getNode()) { in LowerAsmOperandForConstraint()
468 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
471 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
475 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
517 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain); in LowerCCCArguments()
592 if (Glue.getNode()) in LowerReturn()
596 return DAG.getNode(Opc, DL, MVT::Other, in LowerReturn()
673 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
676 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
679 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp408 return SDValue(OutRetAddr.getNode(), 1); in EmitTailCallLoadRetAddr()
494 return VA.isExtInLoc() ? DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val) in LowerMemArgument()
506 PtrOff = DAG.getNode(ISD::ADD, DL, getPointerTy(DAG.getDataLayout()), in LowerMemOpCallTo()
657 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, RegVT, Arg); in LowerCall()
660 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, RegVT, Arg); in LowerCall()
663 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, RegVT, Arg); in LowerCall()
684 if (!StackPtr.getNode()) { in LowerCall()
694 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); in LowerCall()
742 if (!StackPtr.getNode()) { in LowerCall()
746 Source = DAG.getNode(ISD::ADD, DL, getPointerTy(DAG.getDataLayout()), in LowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2644 if (!ISD::isNormalLoad(Op.getNode())) in mayFoldLoad()
2648 auto *Ld = cast<LoadSDNode>(Op.getNode()); in mayFoldLoad()
2668 auto *Ld = cast<LoadSDNode>(Op.getNode()); in mayFoldLoadIntoBroadcastFromMem()
2674 return Op.hasOneUse() && ISD::isNormalStore(*Op.getNode()->use_begin()); in mayFoldIntoStore()
2679 unsigned Opcode = Op.getNode()->use_begin()->getOpcode(); in mayFoldIntoZeroExtend()
2869 if (ISD::isNON_EXTLoad(LHS.getNode()) && in TranslateX86CC()
2870 !ISD::isNON_EXTLoad(RHS.getNode())) { in TranslateX86CC()
3168 if (!ISD::isConstantSplatVector(C.getNode(), MulC)) in decomposeMulByConstant()
3942 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); in extractSubVector()
3986 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp292 SDValue Part0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
295 SDValue Part1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
332 if (Glue.getNode()) in LowerReturn_32()
335 return DAG.getNode(SPISD::RET_GLUE, DL, MVT::Other, RetOps); in LowerReturn_32()
373 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
376 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
379 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
388 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
394 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]); in LowerReturn_64()
395 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
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