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Searched refs:getMBB (Results 1 – 25 of 192) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp98 TBB = LastInst.getOperand(0).getMBB(); in analyzeBranch()
102 TBB = LastInst.getOperand(1).getMBB(); in analyzeBranch()
120 TBB = SecondLastInst.getOperand(1).getMBB(); in analyzeBranch()
122 FBB = LastInst.getOperand(0).getMBB(); in analyzeBranch()
130 TBB = SecondLastInst.getOperand(0).getMBB(); in analyzeBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMCInstLower.cpp132 Symbol = MO.getMBB()->getSymbol(); in LowerSymbolOperand()
250 MCSymbolRefExpr::create(MI->getOperand(1).getMBB()->getSymbol(), *Ctx); in lowerLongBranchLUi()
255 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), in lowerLongBranchLUi()
256 MI->getOperand(2).getMBB(), Spec)); in lowerLongBranchLUi()
292 MCSymbolRefExpr::create(MI->getOperand(2).getMBB()->getSymbol(), *Ctx); in lowerLongBranchADDiu()
297 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), in lowerLongBranchADDiu()
298 MI->getOperand(3).getMBB(), Spec)); in lowerLongBranchADDiu()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCEarlyReturn.cpp65 if (J->getOperand(0).getMBB() == &ReturnMBB) { in processBlock()
78 if (J->getOperand(2).getMBB() == &ReturnMBB) { in processBlock()
95 if (J->getOperand(1).getMBB() == &ReturnMBB) { in processBlock()
118 J->getOperand(i).getMBB() == &ReturnMBB) in processBlock()
H A DPPCCTRLoops.cpp335 assert(ML->contains(BrInstr->getOperand(1).getMBB()) && in expandCTRLoops()
340 assert(!ML->contains(BrInstr->getOperand(1).getMBB()) && in expandCTRLoops()
349 .addMBB(BrInstr->getOperand(1).getMBB()); in expandCTRLoops()
H A DPPCBranchSelector.cpp326 Dest = I->getOperand(2).getMBB(); in runOnMachineFunction()
329 Dest = I->getOperand(1).getMBB(); in runOnMachineFunction()
333 Dest = I->getOperand(0).getMBB(); in runOnMachineFunction()
H A DPPCPreEmitPeephole.cpp551 MBB.removeSuccessor(Br->getOperand(1).getMBB()); in runOnMachineFunction()
562 if (!MBB.isLayoutSuccessor(Br->getOperand(1).getMBB())) { in runOnMachineFunction()
564 TII->insertBranch(MBB, Br->getOperand(1).getMBB(), nullptr, in runOnMachineFunction()
568 if (Succ != Br->getOperand(1).getMBB()) { in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp295 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
306 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { in analyzeBranch()
315 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
327 MachineBasicBlock *TargetBB = I->getOperand(0).getMBB(); in analyzeBranch()
352 .addMBB(UnCondBrIter->getOperand(0).getMBB()); in analyzeBranch()
366 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
378 if (TBB != I->getOperand(0).getMBB()) { in analyzeBranch()
519 return MI.getOperand(0).getMBB(); in getBranchDestBlock()
522 return MI.getOperand(1).getMBB(); in getBranchDestBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrInfo.cpp114 TBB = MI.getOperand(0).getMBB(); in analyzeBranch()
122 TBB = MI.getOperand(0).getMBB(); in analyzeBranch()
127 TBB = MI.getOperand(0).getMBB(); in analyzeBranch()
129 FBB = MI.getOperand(0).getMBB(); in analyzeBranch()
H A DWebAssemblyLateEHPrepare.cpp246 MachineBasicBlock *TBB = TI->getOperand(0).getMBB(); in replaceFuncletReturns()
286 .addMBB(TI->getOperand(0).getMBB()); in replaceFuncletReturns()
307 EHPadToRethrows[MI.getOperand(0).getMBB()].push_back(&MI); in addCatchRefsAndThrowRefs()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp190 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
200 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { in analyzeBranch()
208 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
222 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
234 if (TBB != I->getOperand(0).getMBB()) in analyzeBranch()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp320 H.Handler = getMBB(cast<const BasicBlock *>(H.Handler)); in set()
325 UME.Cleanup = getMBB(cast<const BasicBlock *>(UME.Cleanup)); in set()
327 UME.Handler = getMBB(cast<const BasicBlock *>(UME.Handler)); in set()
329 CME.Handler = getMBB(cast<const BasicBlock *>(CME.Handler)); in set()
339 SrcToUnwindDest[getMBB(Src)] = getMBB(Dest); in set()
345 MachineBasicBlock *DestMBB = getMBB(Dest); in set()
348 Srcs.insert(getMBB(cast<const BasicBlock *>(P))); in set()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.cpp283 return MI.getOperand(0).getMBB(); in getBranchDestBlock()
290 return MI.getOperand(2).getMBB(); in getBranchDestBlock()
297 return MI.getOperand(2).getMBB(); in getBranchDestBlock()
302 return MI.getOperand(1).getMBB(); in getBranchDestBlock()
305 return MI.getOperand(1).getMBB(); in getBranchDestBlock()
385 TBB = ThisTarget->getMBB(); in analyzeBranch()
397 TBB = ThisTarget->getMBB(); in analyzeBranch()
405 TBB = ThisTarget->getMBB(); in analyzeBranch()
421 if (TBB != ThisTarget->getMBB()) in analyzeBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp204 TBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
215 TBB = LastInst->getOperand(1).getMBB(); in analyzeBranch()
236 TBB = SecondLastInst->getOperand(1).getMBB(); in analyzeBranch()
240 FBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
248 TBB = SecondLastInst->getOperand(0).getMBB(); in analyzeBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETPAndVPTOptimisationsPass.cpp123 if (T.getOpcode() == ARM::t2LoopEnd && T.getOperand(1).getMBB() == Header) { in findLoopComponents()
128 T.getOperand(2).getMBB() == Header) { in findLoopComponents()
164 (LoopPhi->getOperand(2).getMBB() != Latch && in findLoopComponents()
165 LoopPhi->getOperand(4).getMBB() != Latch)) { in findLoopComponents()
171 Register StartReg = LoopPhi->getOperand(2).getMBB() == Latch in findLoopComponents()
397 if (LoopPhi->getOperand(2).getMBB() == ML->getLoopLatch()) { in MergeLoopEnd()
494 (Phi->getOperand(2).getMBB() != ML->getLoopLatch() && in ConvertTailPredLoop()
495 Phi->getOperand(4).getMBB() != ML->getLoopLatch())) { in ConvertTailPredLoop()
499 CountReg = Phi->getOperand(2).getMBB() == ML->getLoopLatch() in ConvertTailPredLoop()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeVGPRLiveRange.cpp185 return BR.getOperand(2).getMBB(); in getElseTarget()
278 auto *Pred = MI.getOperand(Idx + 1).getMBB(); in collectCandidateRegisters()
318 auto *IncomingMBB = UseMI->getOperand(I.getOperandNo() + 1).getMBB(); in collectCandidateRegisters()
438 PHIIncoming.insert(UseMI->getOperand(I.getOperandNo() + 1).getMBB()); in updateLiveRangeInThenRegion()
683 MachineBasicBlock *IfTarget = MI.getOperand(2).getMBB(); in run()
711 auto *LoopHeader = MI.getOperand(0).getMBB(); in run()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp192 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
202 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { in analyzeBranch()
210 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
H A DBPFMIPeephole.cpp466 JmpBB = UncondJmp->getOperand(0).getMBB(); in adjustBranch()
482 CondTargetBB = CondJmp->getOperand(2).getMBB(); in adjustBranch()
542 CondTargetBB = CondJmp->getOperand(2).getMBB(); in adjustBranch()
543 JmpBB = UncondJmp->getOperand(0).getMBB(); in adjustBranch()
719 if (!MO.isMBB() || MO.getMBB() != Prev_MBB) in removeMayGotoZero()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCBranchFinalize.cpp120 .addMBB(MI->getOperand(0).getMBB()) in replaceWithBRcc()
138 .addMBB(MI->getOperand(0).getMBB()) in replaceWithCmpBcc()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineSSAUpdater.cpp98 MachineBasicBlock *SrcBB = I->getOperand(i+1).getMBB(); in LookForIdenticalPHI()
221 return MI->getOperand(i+1).getMBB(); in findCorrespondingPred()
292 return PHI->getOperand(idx+1).getMBB(); in getIncomingBlock()
H A DUnreachableBlockElim.cpp163 Phi.getOperand(i).getMBB() == &BB) { in run()
192 if (!preds.count(Phi.getOperand(i).getMBB())) { in run()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCFGOptimizer.cpp166 CondBranchTarget = MI.getOperand(1).getMBB(); in runOnMachineFunction()
179 LayoutSucc->front().getOperand(0).getMBB(); in runOnMachineFunction()
H A DHexagonEarlyIfConv.cpp252 MachineBasicBlock *T1B = T1I->getOperand(1).getMBB(); in matchFlowPattern()
257 : T2I->getOperand(0).getMBB(); in matchFlowPattern()
457 const MachineBasicBlock *BB = MI.getOperand(i+1).getMBB(); in computePhiCost()
732 MachineBasicBlock *TB = MI->getOperand(0).getMBB(); in predicateInstr()
812 if (BO.getMBB() == FP.SplitB) in updatePhiNodes()
814 else if (BO.getMBB() == FP.TrueB) in updatePhiNodes()
816 else if (BO.getMBB() == FP.FalseB) in updatePhiNodes()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp207 Target = LastInst->getOperand(0).getMBB(); in parseCondBranch()
238 return MI.getOperand(0).getMBB(); in getBranchDestBlock()
261 TBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
285 TBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
301 FBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
308 TBB = SecondLastInst->getOperand(0).getMBB(); in analyzeBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RedundantCopyElimination.cpp127 MBB == CondBr.getOperand(1).getMBB()) || in knownRegValInBlock()
129 MBB != CondBr.getOperand(1).getMBB())) { in knownRegValInBlock()
144 MachineBasicBlock *BrTarget = CondBr.getOperand(1).getMBB(); in knownRegValInBlock()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp287 MachineBasicBlock &IRTranslator::getMBB(const BasicBlock &BB) { in getMBB() function in IRTranslator
288 MachineBasicBlock *MBB = FuncInfo.getMBB(&BB); in getMBB()
388 &RI, &MIRBuilder.getMBB(), SwiftError.getFunctionArg()); in translateRet()
593 auto &CurMBB = MIRBuilder.getMBB(); in translateBr()
594 auto *Succ0MBB = &getMBB(*BrInst.getSuccessor(0)); in translateBr()
604 CurMBB.addSuccessor(&getMBB(*Succ)); in translateBr()
611 MachineBasicBlock *Succ1MBB = &getMBB(*BrInst.getSuccessor(1)); in translateBr()
713 MachineBasicBlock *Succ = &getMBB(*I.getCaseSuccessor()); in translateSwitch()
722 MachineBasicBlock *DefaultMBB = &getMBB(*SI.getDefaultDest()); in translateSwitch()
729 MachineBasicBlock *SwitchMBB = &getMBB(*SI.getParent()); in translateSwitch()
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