/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.h | 66 KnownBits getKnownBits(Register R); 67 KnownBits getKnownBits(Register R, const APInt &DemandedElts, 70 // Calls getKnownBits for first operand def of MI. 71 KnownBits getKnownBits(MachineInstr &MI); 79 return Mask.isSubsetOf(getKnownBits(Val).Zero); in maskedValueIsZero()
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H A D | LegalizerHelper.h | 79 GISelKnownBits *getKnownBits() const { return KB; } in getKnownBits() function
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H A D | CombinerHelper.h | 122 GISelKnownBits *getKnownBits() const { in getKnownBits() function
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 61 KnownBits GISelKnownBits::getKnownBits(MachineInstr &MI) { in getKnownBits() function in GISelKnownBits 64 return getKnownBits(MI.getOperand(0).getReg()); in getKnownBits() 67 KnownBits GISelKnownBits::getKnownBits(Register R) { in getKnownBits() function in GISelKnownBits 74 return getKnownBits(R, DemandedElts); in getKnownBits() 77 KnownBits GISelKnownBits::getKnownBits(Register R, const APInt &DemandedElts, in getKnownBits() function in GISelKnownBits 95 return getKnownBits(R).Zero; in getKnownZeroes() 98 APInt GISelKnownBits::getKnownOnes(Register R) { return getKnownBits(R).One; } in getKnownOnes() 823 KnownBits Known = getKnownBits(R, DemandedElts, Depth); in computeNumSignBits()
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H A D | CombinerHelper.cpp | 2526 return KB->getKnownBits(Reg).countMinLeadingZeros() >= DstSize - SrcSize; in matchCombineZextTrunc() 2659 KnownBits Known = KB->getKnownBits(SrcMI->getOperand(2).getReg()); in matchCombineTruncOfShift() 2680 KnownBits Known = KB->getKnownBits(SrcMI->getOperand(2).getReg()); in matchCombineTruncOfShift() 3310 KnownBits RHSBits = KB->getKnownBits(RHS); in matchRedundantAnd() 3314 KnownBits LHSBits = KB->getKnownBits(LHS); in matchRedundantAnd() 3354 KnownBits LHSBits = KB->getKnownBits(LHS); in matchRedundantOr() 3355 KnownBits RHSBits = KB->getKnownBits(RHS); in matchRedundantOr() 4356 auto KnownRHS = KB->getKnownBits(MI.getOperand(3).getReg()); in matchICmpToTrueFalseKnownBits() 4371 auto KnownLHS = KB->getKnownBits(MI.getOperand(2).getReg()); in matchICmpToTrueFalseKnownBits() 4446 auto KnownLHS = KB->getKnownBits(LHS); in matchICmpToLHSKnownBits() [all …]
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H A D | Utils.cpp | 1157 KnownBits Known = KB->getKnownBits(Reg); in isKnownToBeAPowerOfTwo()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUPostLegalizerCombiner.cpp | 221 return Helper.getKnownBits()->maskedValueIsZero(SrcReg, Mask); in matchUCharToFloat() 424 if (KB->getKnownBits(Src1).countMinLeadingZeros() >= 32 && in matchCombine_s_mul_u64() 425 KB->getKnownBits(Src0).countMinLeadingZeros() >= 32) { in matchCombine_s_mul_u64()
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H A D | AMDGPULegalizerInfo.cpp | 3878 GISelKnownBits &KB = *Helper.getKnownBits(); in buildMultiply() 3900 Src0KnownZeros.push_back(KB.getKnownBits(Src0[i]).isZero()); in buildMultiply() 3901 Src1KnownZeros.push_back(KB.getKnownBits(Src1[i]).isZero()); in buildMultiply() 3973 if (!LocalAccum[0] || KB.getKnownBits(LocalAccum[0]).isZero()) { in buildMultiply()
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H A D | AMDGPUInstructionSelector.cpp | 4205 auto SKnown = KB->getKnownBits(*SOffset); in selectSmrdOffset() 4539 auto VKnown = KB->getKnownBits(VAddr); in checkFlatScratchSVSSwizzleBug() 4541 /*Add=*/true, /*NSW=*/false, /*NUW=*/false, KB->getKnownBits(SAddr), in checkFlatScratchSVSSwizzleBug()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64Combine.td | 24 [{ return matchICmpRedundantTrunc(*${root}, MRI, Helper.getKnownBits(), ${matchinfo}); }]),
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVectorCombine.cpp | 156 KnownBits getKnownBits(const Value *V, 1625 KnownBits Known = HVC.getKnownBits(V, In); in getNumSignificantBits() 2795 KnownBits Known0 = getKnownBits(Idx0, Gep0); in calculatePointerDifference() 2796 KnownBits Known1 = getKnownBits(Idx1, Gep1); in calculatePointerDifference() 2834 auto HexagonVectorCombine::getKnownBits(const Value *V, in getKnownBits() function in HexagonVectorCombine
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVInstructionSelector.cpp | 201 KnownBits Known = KB->getKnownBits(AndSrcReg); in selectShiftMask()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstructionCombining.cpp | 1459 OpsKnown[OpNo].getKnownBits(SQ).isNonZero()) in foldFBinOpOfIntCastsFromSign() 1468 return OpsKnown[OpNo].getKnownBits(SQ).isNonNegative(); in foldFBinOpOfIntCastsFromSign() 1494 IntSz - OpsKnown[OpNo].getKnownBits(SQ).countMinLeadingZeros(); in foldFBinOpOfIntCastsFromSign()
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 251 return KnownBits::haveNoCommonBitsSet(LHSCache.getKnownBits(SQ), in haveNoCommonBitsSet() 252 RHSCache.getKnownBits(SQ)); in haveNoCommonBitsSet() 6962 ConstantRange::fromKnownBits(V.getKnownBits(SQ), ForSigned); in computeConstantRangeIncludingKnownBits()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/ |
H A D | Combine.td | 264 return Helper.getKnownBits()->maskedValueIsZero(${src}.getReg(),
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