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Searched refs:getEncodingValue (Results 1 – 25 of 64) sorted by relevance

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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.cpp1182 dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_ADDiu()
1183 src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_ADDiu()
1233 src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_SW()
1234 base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_SW()
1293 src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LW()
1294 base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_LW()
1341 dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_SUBU_ADDU()
1342 src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_SUBU_ADDU()
1346 rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg()); in Emulate_SUBU_ADDU()
1378 rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg()); in Emulate_SUBU_ADDU()
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.cpp1072 dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_DADDiu()
1073 src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_DADDiu()
1135 src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_SD()
1136 base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_SD()
1189 src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LD()
1190 base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_LD()
1235 rt = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_LUI()
1253 dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg()); in Emulate_DSUBU_DADDU()
1254 src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg()); in Emulate_DSUBU_DADDU()
1258 rt = m_reg_info->getEncodingValue(insn.getOperand(2).getReg()); in Emulate_DSUBU_DADDU()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp547 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in VFPThumb2PostEncoder()
587 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
922 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
923 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg());
981 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue()
987 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1058 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg());
1059 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg());
1078 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg());
1112 Reg = CTX.getRegisterInfo()->getEncodingValue(AR
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp239 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in encodeInstruction()
258 unsigned Imm = Ctx.getRegisterInfo()->getEncodingValue(Rz) -
259 Ctx.getRegisterInfo()->getEncodingValue(Ry); in getRegSeqImmOpValue()
261 return ((Ctx.getRegisterInfo()->getEncodingValue(Ry) << 5) | Imm); in getRegSeqImmOpValue()
269 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op).getReg()); in getRegSeqImmOpValue()
271 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op + 1).getReg()); in getRegSeqImmOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp127 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
154 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction()
155 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction()
231 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
H A DR600RegisterInfo.cpp78 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan()
82 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.cpp102 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand()
131 MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn in tryAddingSymbolicOperand()
132 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd in tryAddingSymbolicOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp388 Encoding |= MRI.getEncodingValue(AMDGPU::EXEC_LO) & in encodeInstruction()
493 RegEnc |= MRI.getEncodingValue(Reg); in getSDWASrcEncoding()
523 RegEnc |= MRI.getEncodingValue(Reg); in getSDWAVopcDstEncoding()
534 unsigned Enc = MRI.getEncodingValue(Reg); in getAVOperandEncoding()
589 unsigned Enc = MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
604 unsigned Enc = MRI.getEncodingValue(MO.getReg()); in getMachineOpValueT16()
651 uint16_t Encoding = MRI.getEncodingValue(MO.getReg()); in getMachineOpValueT16Lo128()
H A DR600MCCodeEmitter.cpp149 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg()
158 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp84 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
164 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp108 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
127 unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getMemOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp379 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
390 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
402 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
414 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction()
599 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp227 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
571 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in EncodeZPR4StridedRegisterClass()
587 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in encodeMatrixIndexGPR32()
597 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in getImm8OptLsl()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp442 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getInstSizeInBytes()
465 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
495 return CTX.getRegisterInfo()->getEncodingValue(Reg);
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsOptionRecord.cpp75 unsigned EncVal = MCRegInfo->getEncodingValue(SubReg); in SetPhysRegUsed()
H A DMipsMCCodeEmitter.cpp97 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch()
98 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1); in LowerCompactBranch()
728 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg);
1037 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCCodeEmitter.cpp369 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
569 unsigned Op = Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getRegReg()
570 unsigned Op1 = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getRegReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1362 const unsigned Lower = RI->getEncodingValue(RegPair); in processInstruction()
1421 if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg())) in processInstruction()
1809 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
1833 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction()
1850 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction()
1867 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1887 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1910 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction()
1953 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/
H A DVEMCCodeEmitter.cpp95 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h34 return getEncodingValue(i); in getSEHRegNum()
H A DAArch64FalkorHWPFFix.cpp659 unsigned Dest = LI.DestReg ? TRI->getEncodingValue(LI.DestReg) : 0; in getTag()
660 unsigned Base = TRI->getEncodingValue(LI.BaseReg); in getTag()
668 Off = (1 << 5) | TRI->getEncodingValue(LI.OffsetOpnd->getReg()); in getTag()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp166 return MRI.getEncodingValue(MI.getOperand(OpNum).getReg()); in getRegEncoding()
197 unsigned Encoding = MRI.getEncodingValue(Reg); in setX()
224 unsigned Encoding = MRI.getEncodingValue(Reg); in setXX2()
232 unsigned Encoding = MRI.getEncodingValue(Reg); in setBB2()
248 setV2(MRI.getEncodingValue(Reg)); in setV2()
508 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()) & 0x7; in getX86RegNum()
513 return Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(OpNum).getReg()); in getX86RegEncoding()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCCodeEmitter.cpp207 Value |= RI->getEncodingValue(RegNum); in encodeInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h242 int getSEHRegNum(unsigned i) const { return getEncodingValue(i); } in getSEHRegNum()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp126 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()

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