| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.cpp | 621 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in adjustCopiesBackFrom()
623 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in adjustCopiesBackFrom()
810 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in removeCopyByCommutingDef()
812 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in removeCopyByCommutingDef()
1104 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in removePartialRedundancy()
1106 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in removePartialRedundancy()
1291 Register SrcReg = CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg(); in reMaterializeTrivialDef()
1293 Register DstReg = CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg(); in reMaterializeTrivialDef()
1911 if (!MRI->isReserved(CP.getDstReg())) { in canJoinPhys()
1982 auto DstRC = MRI->getRegClass(CP.getDstReg()); in joinCopy()
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| H A D | RegisterCoalescer.h | 97 Register getDstReg() const { return DstReg; } in getDstReg() function
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| H A D | PrologEpilogInserter.cpp | 586 MCPhysReg DstReg = I.getDstReg(); in updateLiveness()
610 TII.get(TargetOpcode::COPY), CS.getDstReg()) in insertCSRSaves()
638 .addReg(CI.getDstReg(), getKillRegState(true)); in insertCSRRestores()
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| H A D | RegAllocPBQP.cpp | 447 if (!CP.setRegisters(&MI) || CP.getSrcReg() == CP.getDstReg()) in apply()
450 Register DstReg = CP.getDstReg(); in apply()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaFrameLowering.cpp | 85 IsStoreInst = (Info.getDstReg() == DstReg) && (Info.getReg() == Reg); in emitPrologue()
170 IsRestoreInst = (Info.getDstReg() == DstReg) && (Info.getReg() == Reg); in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 105 Register getDstReg() const { return getOperand(0).getReg(); } in getDstReg() function
185 Register getDstReg() const { return getOperand(0).getReg(); } in getDstReg() function
396 Register getDstReg() const { return getReg(0); } in getDstReg() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86RegisterBankInfo.cpp | 378 bool IsFP = any_of(MRI.use_nodbg_instructions(cast<GLoad>(MI).getDstReg()), in getInstrMapping()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineFrameInfo.h | 63 unsigned getDstReg() const { return DstReg; } in getDstReg() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 1212 unsigned SpilledReg = I.getDstReg(); in emitPrologue()
2428 VSRContainingGPRs.FindAndConstruct(Info.getDstReg()).second; in spillCalleeSavedRegisters()
2486 unsigned Dst = I.getDstReg(); in spillCalleeSavedRegisters()
2659 unsigned Dst = CSI[i].getDstReg(); in restoreCalleeSavedRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 753 LoadValsSinceLastStore.push_back(Ld->getDstReg()); in optimizeConsecutiveMemOpAddressing()
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| H A D | AArch64InstructionSelector.cpp | 4620 auto OpAndCC = emitOverflowOp(I.getOpcode(), CarryMI.getDstReg(), in selectOverflowOp()
5410 Register Dst = ExtLd.getDstReg(); in selectIndexedExtLoad()
5497 Register Dst = Ld.getDstReg(); in selectIndexedLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 716 Register LoadReg = LoadMI->getDstReg(); in matchCombineExtendingLoads()
916 if (!LoadMI || !MRI.hasOneNonDBGUse(LoadMI->getDstReg())) in matchCombineLoadWithAndMask()
919 Register LoadReg = LoadMI->getDstReg(); in matchCombineLoadWithAndMask()
1072 {MRI.getType(LoadDef->getDstReg()), in matchSextInRegOfLoad()
1077 MatchInfo = std::make_tuple(LoadDef->getDstReg(), NewSizeBits); in matchSextInRegOfLoad()
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| H A D | LegalizerHelper.cpp | 1357 Register DstReg = LoadMI.getDstReg(); in narrowScalar()
1375 Register DstReg = LoadMI.getDstReg(); in narrowScalar()
3471 Register DstReg = LoadMI.getDstReg(); in lowerLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 139 unsigned getDstReg() const { return Dst; } in getDstReg() function in __anon730428320111::AArch64AsmParser::PrefixInfo
5276 if (Inst.getOperand(0).getReg() != Prefix.getDstReg()) in validateInstruction()
5284 isMatchingOrAlias(Prefix.getDstReg(), Inst.getOperand(i).getReg())) in validateInstruction()
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