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Searched refs:getDefIgnoringCopies (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperCasts.cpp30 GSext *Sext = cast<GSext>(getDefIgnoringCopies(MO.getReg(), MRI)); in matchSextOfTrunc()
31 GTrunc *Trunc = cast<GTrunc>(getDefIgnoringCopies(Sext->getSrcReg(), MRI)); in matchSextOfTrunc()
83 GZext *Zext = cast<GZext>(getDefIgnoringCopies(MO.getReg(), MRI)); in matchZextOfTrunc()
84 GTrunc *Trunc = cast<GTrunc>(getDefIgnoringCopies(Zext->getSrcReg(), MRI)); in matchZextOfTrunc()
H A DCombinerHelperVectorOps.cpp93 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in matchExtractVectorElementWithDifferentIndices()
190 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in matchExtractVectorElementWithBuildVectorTrunc()
H A DUtils.cpp486 MachineInstr *llvm::getDefIgnoringCopies(Register Reg, in getDefIgnoringCopies() function in llvm
647 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef()
1356 MachineInstr *MI = getDefIgnoringCopies(VReg, MRI); in getAnyConstantSplat()
1596 const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in matchUnaryPredicate()
1609 const MachineInstr *SrcDef = getDefIgnoringCopies(SrcElt, MRI); in matchUnaryPredicate()
2025 MachineInstr *Constant = getDefIgnoringCopies(Const, MRI); in getConstant()
2065 MachineInstr *Constant = getDefIgnoringCopies(Const, MRI); in getConstant()
H A DLoadStoreOpt.cpp149 auto *Base0Def = getDefIgnoringCopies(BasePtr0.getBase(), MRI); in aliasIsKnownForLoadStore()
150 auto *Base1Def = getDefIgnoringCopies(BasePtr1.getBase(), MRI); in aliasIsKnownForLoadStore()
H A DCombinerHelper.cpp1256 MachineInstr *StoredValDef = getDefIgnoringCopies(LdSt.getReg(0), MRI); in findPostIndexCandidate()
1349 MachineInstr *BaseDef = getDefIgnoringCopies(Base, MRI); in findPreIndexCandidate()
2668 MachineInstr *SrcMI = getDefIgnoringCopies(SrcReg, MRI); in matchCombineTruncOfShift()
3161 MachineInstr *LeftHandInst = getDefIgnoringCopies(LHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
3162 MachineInstr *RightHandInst = getDefIgnoringCopies(RHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
4206 auto *DefMI = getDefIgnoringCopies(PHI.getIncomingValue(I), MRI); in matchExtendThroughPhis()
5132 MachineInstr *LHSInst = getDefIgnoringCopies(AndLHS, MRI); in matchNarrowBinopFeedingAnd()
5320 auto *RHSDefInstr = cast<GenericMachineInstr>(getDefIgnoringCopies(RHS, MRI)); in buildUDivorURemUsingMul()
5589 auto *RHSDefInstr = cast<GenericMachineInstr>(getDefIgnoringCopies(RHS, MRI)); in buildSDivUsingMul()
7746 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in applyBuildFnMO()
H A DCallLowering.cpp1171 MachineInstr *RegDef = getDefIgnoringCopies(OutInfo.Regs[0], MRI); in parametersInCSRMatch()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankCombiner.cpp316 MachineInstr *Src0 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchFPMed3ToClamp()
317 MachineInstr *Src1 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in matchFPMed3ToClamp()
318 MachineInstr *Src2 = getDefIgnoringCopies(MI.getOperand(3).getReg(), MRI); in matchFPMed3ToClamp()
332 MachineInstr *Op3 = getDefIgnoringCopies(MI.getOperand(4).getReg(), MRI); in matchFPMed3ToClamp()
H A DAMDGPUGlobalISelUtils.cpp29 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset()
H A DAMDGPUInstructionSelector.cpp787 MachineInstr *Src1Def = getDefIgnoringCopies(Src1, *MRI); in selectG_BUILD_VECTOR()
1867 MachineInstr *OffsetDef = getDefIgnoringCopies(BaseOffset, *MRI); in selectDSGWSIntrinsic()
1881 OffsetDef = getDefIgnoringCopies(BaseOffset, *MRI); in selectDSGWSIntrinsic()
3503 const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in matchZeroExtendFromS32()
4173 MachineInstr *MI = getDefIgnoringCopies(Src, *MRI); in selectVOP3ModsImpl()
4178 MI = getDefIgnoringCopies(Src, *MRI); in selectVOP3ModsImpl()
4322 const MachineInstr *Def = getDefIgnoringCopies(Reg, *MRI); in selectVOP3NoMods()
5112 getDefIgnoringCopies(Root.getReg(), *MRI)->getOperand(0).getReg(); in selectSWMMACIndex8()
5134 getDefIgnoringCopies(Root.getReg(), *MRI)->getOperand(0).getReg(); in selectSWMMACIndex16()
5761 MachineInstr *AddrMI = getDefIgnoringCopies(Addr, *MRI); in isFlatScratchBaseLegal()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PreLegalizerCombiner.cpp241 MachineInstr *I1 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchExtAddvToUdotAddv()
258 getDefIgnoringCopies(I1->getOperand(1).getReg(), MRI); in matchExtAddvToUdotAddv()
260 getDefIgnoringCopies(I1->getOperand(2).getReg(), MRI); in matchExtAddvToUdotAddv()
422 MachineInstr *ExtMI = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchExtUaddvToUaddlv()
H A DAArch64PostLegalizerCombiner.cpp396 auto AndMI = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchCombineMulCMLT()
399 auto LShrMI = getDefIgnoringCopies(AndMI->getOperand(1).getReg(), MRI); in matchCombineMulCMLT()
447 MachineInstr *I1 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchExtMulToMULL()
448 MachineInstr *I2 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in matchExtMulToMULL()
H A DAArch64PostLegalizerLowering.cpp849 MachineInstr *Def = getDefIgnoringCopies(CmpOp, MRI); in getCmpOperandFoldingProfit()
864 getDefIgnoringCopies(Def->getOperand(1).getReg(), MRI); in getCmpOperandFoldingProfit()
905 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in trySwapICmpOperands()
H A DAArch64InstructionSelector.cpp1468 while (MachineInstr *MI = getDefIgnoringCopies(Reg, MRI)) { in getTestBitReg()
5148 MachineInstr *LHSDef = getDefIgnoringCopies(LHS.getReg(), MRI); in tryFoldIntegerCompare()
5149 MachineInstr *RHSDef = getDefIgnoringCopies(RHS.getReg(), MRI); in tryFoldIntegerCompare()
7211 getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in isWorthFoldingIntoExtendedReg()
7318 MachineInstr *ExtInst = getDefIgnoringCopies(OffsetReg, MRI); in selectExtendedSHL()
7382 getDefIgnoringCopies(PtrAdd->getOperand(2).getReg(), MRI); in selectAddrModeShiftedExtendXReg()
7515 MachineInstr *OffsetInst = getDefIgnoringCopies(RHS.getReg(), MRI); in selectAddrModeWRO()
7851 MachineInstr *RootDef = getDefIgnoringCopies(Root.getReg(), MRI); in selectArithExtendedRegister()
7870 MachineInstr *ExtDef = getDefIgnoringCopies(LHS.getReg(), MRI); in selectArithExtendedRegister()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h250 LLVM_ABI MachineInstr *getDefIgnoringCopies(Register Reg,
289 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef()
H A DLegalizationArtifactCombiner.h1070 MachineInstr *SrcDef = getDefIgnoringCopies(SrcReg, MRI); in tryCombineUnmergeValues()
1140 MergeI = getDefIgnoringCopies(SrcDef->getOperand(1).getReg(), MRI); in tryCombineUnmergeValues()
H A DGIMatchTableExecutorImpl.h180 NewMI = getDefIgnoringCopies(MO.getReg(), MRI); in executeMatchTable()