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Searched refs:getDefIgnoringCopies (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperVectorOps.cpp93 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in matchExtractVectorElementWithDifferentIndices()
150 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in matchExtractVectorElementWithBuildVector()
211 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in matchExtractVectorElementWithBuildVectorTrunc()
279 cast<GExtractVectorElement>(getDefIgnoringCopies(MO.getReg(), MRI)); in matchExtractVectorElementWithShuffleVector()
326 cast<GShuffleVector>(getDefIgnoringCopies(Extract->getVectorReg(), MRI)); in matchExtractVectorElementWithShuffleVector()
H A DUtils.cpp479 MachineInstr *llvm::getDefIgnoringCopies(Register Reg, in getDefIgnoringCopies() function in llvm
641 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef()
1338 MachineInstr *MI = getDefIgnoringCopies(VReg, MRI); in getAnyConstantSplat()
1565 const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in matchUnaryPredicate()
1578 const MachineInstr *SrcDef = getDefIgnoringCopies(SrcElt, MRI); in matchUnaryPredicate()
H A DLoadStoreOpt.cpp152 auto *Base0Def = getDefIgnoringCopies(BasePtr0.getBase(), MRI); in aliasIsKnownForLoadStore()
153 auto *Base1Def = getDefIgnoringCopies(BasePtr1.getBase(), MRI); in aliasIsKnownForLoadStore()
H A DCombinerHelper.cpp1188 MachineInstr *StoredValDef = getDefIgnoringCopies(LdSt.getReg(0), MRI); in findPostIndexCandidate()
1280 MachineInstr *BaseDef = getDefIgnoringCopies(Base, MRI); in findPreIndexCandidate()
2648 MachineInstr *SrcMI = getDefIgnoringCopies(SrcReg, MRI); in matchCombineTruncOfShift()
3126 MachineInstr *LeftHandInst = getDefIgnoringCopies(LHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
3127 MachineInstr *RightHandInst = getDefIgnoringCopies(RHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
4054 auto *DefMI = getDefIgnoringCopies(PHI.getIncomingValue(I), MRI); in matchExtendThroughPhis()
5001 MachineInstr *LHSInst = getDefIgnoringCopies(AndLHS, MRI); in matchNarrowBinopFeedingAnd()
5186 auto *RHSDefInstr = cast<GenericMachineInstr>(getDefIgnoringCopies(RHS, MRI)); in buildUDivUsingMul()
5430 auto *RHSDef = cast<GenericMachineInstr>(getDefIgnoringCopies(RHS, MRI)); in buildSDivUsingMul()
7408 MachineInstr *Root = getDefIgnoringCopies(MO.getReg(), MRI); in applyBuildFnMO()
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H A DCallLowering.cpp1172 MachineInstr *RegDef = getDefIgnoringCopies(OutInfo.Regs[0], MRI); in parametersInCSRMatch()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankCombiner.cpp316 MachineInstr *Src0 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchFPMed3ToClamp()
317 MachineInstr *Src1 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in matchFPMed3ToClamp()
318 MachineInstr *Src2 = getDefIgnoringCopies(MI.getOperand(3).getReg(), MRI); in matchFPMed3ToClamp()
332 MachineInstr *Op3 = getDefIgnoringCopies(MI.getOperand(4).getReg(), MRI); in matchFPMed3ToClamp()
H A DAMDGPUGlobalISelUtils.cpp22 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset()
H A DAMDGPUInstructionSelector.cpp689 MachineInstr *Src1Def = getDefIgnoringCopies(Src1, *MRI); in selectG_BUILD_VECTOR()
1652 MachineInstr *OffsetDef = getDefIgnoringCopies(BaseOffset, *MRI); in selectDSGWSIntrinsic()
1666 OffsetDef = getDefIgnoringCopies(BaseOffset, *MRI); in selectDSGWSIntrinsic()
3285 const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in matchZeroExtendFromS32()
3663 MachineInstr *MI = getDefIgnoringCopies(Src, *MRI); in selectVOP3ModsImpl()
3668 MI = getDefIgnoringCopies(Src, *MRI); in selectVOP3ModsImpl()
3810 const MachineInstr *Def = getDefIgnoringCopies(Reg, *MRI); in selectVOP3NoMods()
4079 getDefIgnoringCopies(Root.getReg(), *MRI)->getOperand(0).getReg(); in selectSWMMACIndex8()
4101 getDefIgnoringCopies(Root.getReg(), *MRI)->getOperand(0).getReg(); in selectSWMMACIndex16()
4727 MachineInstr *AddrMI = getDefIgnoringCopies(Addr, *MRI); in isFlatScratchBaseLegal()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp833 MachineInstr *Def = getDefIgnoringCopies(CmpOp, MRI); in getCmpOperandFoldingProfit()
848 getDefIgnoringCopies(Def->getOperand(1).getReg(), MRI); in getCmpOperandFoldingProfit()
889 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in trySwapICmpOperands()
1143 MachineInstr *I1 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchExtMulToMULL()
1144 MachineInstr *I2 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in matchExtMulToMULL()
1173 MachineInstr *I1 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in applyExtMulToMULL()
1174 MachineInstr *I2 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in applyExtMulToMULL()
H A DAArch64PreLegalizerCombiner.cpp242 MachineInstr *I1 = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchExtAddvToUdotAddv()
259 getDefIgnoringCopies(I1->getOperand(1).getReg(), MRI); in matchExtAddvToUdotAddv()
261 getDefIgnoringCopies(I1->getOperand(2).getReg(), MRI); in matchExtAddvToUdotAddv()
421 MachineInstr *ExtMI = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchExtUaddvToUaddlv()
H A DAArch64PostLegalizerCombiner.cpp396 auto AndMI = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI); in matchCombineMulCMLT()
399 auto LShrMI = getDefIgnoringCopies(AndMI->getOperand(1).getReg(), MRI); in matchCombineMulCMLT()
H A DAArch64InstructionSelector.cpp1460 while (MachineInstr *MI = getDefIgnoringCopies(Reg, MRI)) { in getTestBitReg()
5013 MachineInstr *LHSDef = getDefIgnoringCopies(LHS.getReg(), MRI); in tryFoldIntegerCompare()
5014 MachineInstr *RHSDef = getDefIgnoringCopies(RHS.getReg(), MRI); in tryFoldIntegerCompare()
7038 getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in isWorthFoldingIntoExtendedReg()
7145 MachineInstr *ExtInst = getDefIgnoringCopies(OffsetReg, MRI); in selectExtendedSHL()
7209 getDefIgnoringCopies(PtrAdd->getOperand(2).getReg(), MRI); in selectAddrModeShiftedExtendXReg()
7342 MachineInstr *OffsetInst = getDefIgnoringCopies(RHS.getReg(), MRI); in selectAddrModeWRO()
7673 MachineInstr *RootDef = getDefIgnoringCopies(Root.getReg(), MRI); in selectArithExtendedRegister()
7692 MachineInstr *ExtDef = getDefIgnoringCopies(LHS.getReg(), MRI); in selectArithExtendedRegister()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h240 MachineInstr *getDefIgnoringCopies(Register Reg,
275 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef()
H A DLegalizationArtifactCombiner.h1062 MachineInstr *SrcDef = getDefIgnoringCopies(SrcReg, MRI); in tryCombineUnmergeValues()
1127 MergeI = getDefIgnoringCopies(SrcDef->getOperand(1).getReg(), MRI); in tryCombineUnmergeValues()
H A DGIMatchTableExecutorImpl.h180 NewMI = getDefIgnoringCopies(MO.getReg(), MRI); in executeMatchTable()