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Searched refs:getBitcast (Results 1 – 25 of 26) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4008 ConstsNode = DAG.getBitcast(VT, ConstsNode); in getConstVector()
4040 Ops.push_back(DAG.getBitcast(EltVT, DAG.getConstant(V, dl, EltIntVT))); in getConstVector()
4045 return DAG.getBitcast(VT, ConstsNode); in getConstVector()
4079 return DAG.getBitcast(VT, Vec); in getZeroVector()
4742 return DAG.getBitcast(VT, Vec); in getOnesVector()
4888 return DAG.getVectorShuffle(VT, dl, DAG.getBitcast(VT, LHS), in getPack()
4889 DAG.getBitcast(VT, RHS), PackMask); in getPack()
5399 Not = DAG.getBitcast(V.getOperand(0).getValueType(), Not); in IsNOT()
5438 CatOp = DAG.getBitcast(CatOp.getValueType(), NotCat); in IsNOT()
5449 return DAG.getNode(ISD::AND, SDLoc(V), VT, DAG.getBitcast(VT, Op0), in IsNOT()
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H A DX86ISelLoweringCall.cpp713 SDValue ValToCopy = DAG.getBitcast(TempValLoc, ValArg); in lowerMasksToReg()
723 return DAG.getBitcast(ValLoc, ValArg); in lowerMasksToReg()
741 Arg = DAG.getBitcast(MVT::i64, Arg); in Passv64i1ArgInRegs()
800 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
837 ValToCopy = DAG.getBitcast(MVT::i64, ValToCopy); in LowerReturn()
843 ValToCopy = DAG.getBitcast(MVT::v4f32, ValToCopy); in LowerReturn()
1063 Lo = DAG.getBitcast(MVT::v32i1, ArgValueLo); in getv64i1Argument()
1066 Hi = DAG.getBitcast(MVT::v32i1, ArgValueHi); in getv64i1Argument()
1105 return DAG.getBitcast(ValVT, ValReturned); in lowerRegToMasks()
1209 Val = DAG.getBitcast(VA.getValVT(), Val); in LowerCallResult()
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H A DX86ISelDAGToDAG.cpp1030 AllOnes = CurDAG->getBitcast(VT, AllOnes); in PreprocessISelDAG()
1130 SDValue Res = CurDAG->getBitcast(VT, Extract); in PreprocessISelDAG()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp307 Val = DAG.getBitcast(VA.getLocVT(), Val); in LowerReturn()
553 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
2343 SDValue T0 = DAG.getBitcast(MVT::i32, Op0); in LowerVECTOR_SHUFFLE()
2345 return DAG.getBitcast(VecTy, T1); in LowerVECTOR_SHUFFLE()
2370 SDValue T0 = DAG.getBitcast(MVT::i64, Op0); in LowerVECTOR_SHUFFLE()
2372 return DAG.getBitcast(VecTy, T1); in LowerVECTOR_SHUFFLE()
2501 SDValue Sc = DAG.getBitcast(tyScalar(InpTy), InpV); in LowerBITCAST()
2569 return DAG.getBitcast(VecTy, DAG.getConstant(V, dl, MVT::i32)); in buildVector32()
2573 E0 = DAG.getZExtOrTrunc(DAG.getBitcast(MVT::i16, Elem[0]), dl, MVT::i32); in buildVector32()
2574 E1 = DAG.getZExtOrTrunc(DAG.getBitcast(MVT::i16, Elem[1]), dl, MVT::i32); in buildVector32()
[all …]
H A DHexagonISelLoweringHVX.cpp554 return DAG.getBitcast(CastTy, Vec); in opCastElem()
730 ElemIdx = DAG.getBitcast(MVT::i32, ElemIdx); in convertToByteIndex()
751 Idx = DAG.getBitcast(MVT::i32, Idx); in getIndexInWord32()
811 Words.push_back(DAG.getBitcast(MVT::i32, W)); in buildHvxVectorReg()
815 Words.push_back(DAG.getBitcast(MVT::i32, V)); in buildHvxVectorReg()
846 return DAG.getBitcast(VecTy, S); in buildHvxVectorReg()
992 SDValue T0 = DAG.getBitcast(tyVector(VecTy, MVT::i32), HalfV0); in buildHvxVectorReg()
993 SDValue T1 = DAG.getBitcast(tyVector(VecTy, MVT::i32), HalfV1); in buildHvxVectorReg()
998 DAG.getBitcast(tyVector(ty(DstV), VecTy.getVectorElementType()), DstV); in buildHvxVectorReg()
1180 SDValue ExVec = DAG.getBitcast(tyVector(ty(ExWord), ElemTy), ExWord); in extractHvxElementReg()
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H A DHexagonISelDAGToDAG.cpp1349 DAG.getBitcast(SVT, If1), in ppHoistZextI1()
1350 DAG.getBitcast(SVT, If0)); in ppHoistZextI1()
1351 SDValue Ret = DAG.getBitcast(UVT, Sel); in ppHoistZextI1()
H A DHexagonISelDAGToDAGHVX.cpp2798 DAG.getVectorShuffle(PairTy, dl, DAG.getBitcast(PairTy, Inp), in ppHvxShuffleOfShuffle()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp938 SDValue NewV1 = DAG.getBitcast(NewVT, V1); in widenShuffleMask()
939 SDValue NewV2 = DAG.getBitcast(NewVT, V2); in widenShuffleMask()
940 return DAG.getBitcast( in widenShuffleMask()
1057 V = DAG.getBitcast(ShiftVT, V); in lowerVECTOR_SHUFFLEAsShift()
1060 return DAG.getBitcast(VT, V); in lowerVECTOR_SHUFFLEAsShift()
1239 Lo = DAG.getBitcast(ByteVT, Lo); in lowerVECTOR_SHUFFLEAsByteRotate()
1240 Hi = DAG.getBitcast(ByteVT, Hi); in lowerVECTOR_SHUFFLEAsByteRotate()
1249 return DAG.getBitcast(VT, DAG.getNode(ISD::OR, DL, ByteVT, LoShift, HiShift)); in lowerVECTOR_SHUFFLEAsByteRotate()
1325 InputV = DAG.getBitcast(InputVT, InputV); in lowerVECTOR_SHUFFLEAsZeroOrAnyExtend()
1331 return DAG.getBitcast(VT, InputV); in lowerVECTOR_SHUFFLEAsZeroOrAnyExtend()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2297 DAG.getBitcast(ExtractedVecT, Extract.getOperand(0)), NewIndex); in LowerSIGN_EXTEND_INREG()
2450 NewOps.push_back(DAG.getBitcast(MVT::i16, Op.getOperand(I))); in LowerBUILD_VECTOR()
2452 return DAG.getBitcast(VT, Res); in LowerBUILD_VECTOR()
2617 Src1 = DAG.getBitcast(VecT, Src1); in LowerBUILD_VECTOR()
2624 Src2 = DAG.getBitcast(VecT, Src2); in LowerBUILD_VECTOR()
2908 return DAG.getBitcast(DstType, NewShuffle); in performVECTOR_SHUFFLECombine()
3170 Lo = DAG.getBitcast(InVT, Lo); in truncateVectorWithNARROW()
3171 Hi = DAG.getBitcast(InVT, Hi); in truncateVectorWithNARROW()
3173 return DAG.getBitcast(DstVT, Res); in truncateVectorWithNARROW()
3259 VectorsToShuffle.push_back(DAG.getBitcast( in performBitcastCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp4011 Vec = DAG.getBitcast(MVT::v8i1, Vec); in lowerBuildVectorOfConstants()
4017 Vec = DAG.getBitcast(VT, Vec); in lowerBuildVectorOfConstants()
4075 return DAG.getBitcast(VT, Vec); in lowerBuildVectorOfConstants()
4144 return DAG.getBitcast(VT, Splat); in lowerBuildVectorOfConstants()
4284 NewOps[I] = DAG.getBitcast(MVT::i16, Op.getOperand(I)); in lowerBUILD_VECTOR()
4288 return DAG.getBitcast(VT, Res); in lowerBUILD_VECTOR()
4853 Src = DAG.getBitcast(WideSrcVT, Src); in getDeinterleaveShiftAndTrunc()
4860 Res = DAG.getBitcast(CastVT, Res); in getDeinterleaveShiftAndTrunc()
5085 V2 = DAG.getBitcast( in lowerVECTOR_SHUFFLEAsVSlide1()
5090 Vec = DAG.getBitcast(ContainerVT, Vec); in lowerVECTOR_SHUFFLEAsVSlide1()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp13150 return DAG.getBitcast(VT, Cond); in combineVSelectWithAllOnesOrZeros()
13154 SDValue X = DAG.getBitcast(CondVT, FVal); in combineVSelectWithAllOnesOrZeros()
13156 return DAG.getBitcast(VT, Or); in combineVSelectWithAllOnesOrZeros()
13161 SDValue X = DAG.getBitcast(CondVT, TVal); in combineVSelectWithAllOnesOrZeros()
13163 return DAG.getBitcast(VT, And); in combineVSelectWithAllOnesOrZeros()
13169 SDValue X = DAG.getBitcast(CondVT, FVal); in combineVSelectWithAllOnesOrZeros()
13172 return DAG.getBitcast(VT, And); in combineVSelectWithAllOnesOrZeros()
16049 DAG.getBitcast(NVT, Src.getOperand(0)), in visitTRUNCATE()
16453 SDValue C = DAG.getBitcast(VT, N0); in visitBITCAST()
16461 return DAG.getBitcast(VT, N0.getOperand(0)); in visitBITCAST()
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H A DTargetLowering.cpp734 return DAG.getBitcast(DstVT, V); in SimplifyMultipleUseDemandedBits()
755 return DAG.getBitcast(DstVT, V); in SimplifyMultipleUseDemandedBits()
773 return DAG.getBitcast(DstVT, V); in SimplifyMultipleUseDemandedBits()
915 return DAG.getBitcast(DstVT, Src); in SimplifyMultipleUseDemandedBits()
2504 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits()
2552 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits()
2606 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits()
2835 SDValue NewOp = TLO.DAG.getBitcast(VT, DemandedSrc); in SimplifyDemandedBits()
3692 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedVectorElts()
3716 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Fold)); in SimplifyDemandedVectorElts()
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H A DLegalizeFloatTypes.cpp292 DAG.getBitcast(MVT::i128, Src), N->getOperand(1)); in SoftenFloatRes_EXTRACT_ELEMENT()
1444 RHS = DAG.getBitcast(LVT, RHS); in SoftenFloatOp_FCOPYSIGN()
2662 return DAG.getBitcast(N->getValueType(0), Convert); in PromoteFloatOp_BITCAST()
2937 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0)); in PromoteFloatRes_BITCAST()
2948 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0)); in PromoteFloatRes_FREEZE()
H A DSelectionDAG.cpp1517 DestOp = getBitcast(EVT::getIntegerVT(*Context, Size), Op); in getBitcastedAnyExtOrTrunc()
1532 DestOp = getBitcast(MVT::getIntegerVT(Size), Op); in getBitcastedSExtOrTrunc()
1547 DestOp = getBitcast(MVT::getIntegerVT(Size), Op); in getBitcastedZExtOrTrunc()
2429 SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) { in getBitcast() function in SelectionDAG
7091 return getBitcast(VT, getBuildVector(BVVT, DL, Ops)); in FoldConstantArithmetic()
7314 Ops.push_back(getBitcast(DstEltVT, Op)); in FoldConstantBuildVector()
8256 Value = DAG.getBitcast(VT.getScalarType(), Value); in getMemsetValue()
H A DSelectionDAGBuilder.cpp463 return DAG.getBitcast(ValueVT, Val); in getCopyFromPartsVector()
484 Val = DAG.getBitcast(ValueSVT, Val); in getCopyFromPartsVector()
736 Val = DAG.getBitcast(ValueVT.getScalarType(), Val); in getCopyToPartsVector()
746 Val = DAG.getBitcast(IntermediateType, Val); in getCopyToPartsVector()
9140 LoadL = DAG.getBitcast(CmpVT, LoadL); in visitMemCmpBCmpCall()
9141 LoadR = DAG.getBitcast(CmpVT, LoadR); in visitMemCmpBCmpCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp3127 NewArg = DAG.getBitcast(MemVT, NewArg); in LowerFormalArguments()
6534 Src0 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src0) : Src0, in lowerLaneOp()
6538 Src1 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src1) : Src1, in lowerLaneOp()
6543 Src2 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src2) : Src2, in lowerLaneOp()
6549 return IsFloat ? DAG.getBitcast(VT, Trunc) : Trunc; in lowerLaneOp()
6642 Src0 = DAG.getBitcast(VecVT, Src0); in lowerLaneOp()
6645 Src1 = DAG.getBitcast(VecVT, Src1); in lowerLaneOp()
6648 Src2 = DAG.getBitcast(VecVT, Src2); in lowerLaneOp()
6652 return DAG.getBitcast(VT, UnrolledLaneOp); in lowerLaneOp()
7843 SDValue V2 = DAG.getBitcast(MVT::v2i64, Vec); in lowerEXTRACT_VECTOR_ELT()
[all …]
H A DAMDGPUISelLowering.cpp2143 SDValue Rcp64 = DAG.getBitcast(VT, in LowerUDIVREM64()
2162 SDValue Add1 = DAG.getBitcast(VT, in LowerUDIVREM64()
2175 SDValue Add2 = DAG.getBitcast(VT, in LowerUDIVREM64()
2189 SDValue Sub1 = DAG.getBitcast(VT, in LowerUDIVREM64()
2210 SDValue Sub2 = DAG.getBitcast(VT, in LowerUDIVREM64()
2230 SDValue Sub3 = DAG.getBitcast(VT, in LowerUDIVREM64()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1911 Parts[0] = lowerI128ToGR128(DAG, DAG.getBitcast(MVT::i128, Val)); in splitValueIntoRegisterParts()
1924 return DAG.getBitcast(ValueVT, Res); in joinRegisterPartsIntoValue()
6721 SDValue Op0 = DAG.getBitcast(MVT::v16i8, Op.getOperand(0)); in lowerFSHL()
6722 SDValue Op1 = DAG.getBitcast(MVT::v16i8, Op.getOperand(1)); in lowerFSHL()
6728 return DAG.getBitcast(MVT::i128, Shuf1); in lowerFSHL()
6733 return DAG.getBitcast(MVT::i128, Val); in lowerFSHL()
6751 SDValue Op0 = DAG.getBitcast(MVT::v16i8, Op.getOperand(0)); in lowerFSHR()
6752 SDValue Op1 = DAG.getBitcast(MVT::v16i8, Op.getOperand(1)); in lowerFSHR()
6758 return DAG.getBitcast(MVT::i128, Shuf1); in lowerFSHR()
6763 return DAG.getBitcast(MVT::i128, Val); in lowerFSHR()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3781 return DAG.getBitcast(MVT::v2i64, in LowerSETCC()
7800 DAG.getBitcast(MVT::getIntegerVT(ValVT.getSizeInBits()), Arg); in LowerCall_AIX()
8796 Arrange = DAG.getBitcast(IntermediateVT, Arrange); in LowerINT_TO_FPVector()
9383 return DAG.getBitcast( in getCanonicalConstSplat()
9683 return DAG.getBitcast(Op.getValueType(), SplatNode); in LowerBUILD_VECTOR()
9707 return DAG.getBitcast(Op.getValueType(), SplatNode); in LowerBUILD_VECTOR()
9881 return DAG.getBitcast(Op->getValueType(0), Extend); in LowerBUILD_VECTOR()
10354 PPCISD::XXSPLTI32DX, DL, MVT::v2i64, DAG.getBitcast(MVT::v2i64, LHS), in lowerToXXSPLTI32DX()
10376 DAG.getVectorShuffle(MVT::v16i8, dl, DAG.getBitcast(MVT::v16i8, N0), in LowerROTL()
10380 SDValue ArgVal = DAG.getBitcast(MVT::i128, N0); in LowerROTL()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp5750 Op2 = DAG.getBitcast(MVT::getVectorVT(Op2IntVT, 1), Op2); in LowerVectorMatch()
5754 Op2 = DAG.getBitcast(OpContainerVT, Op2); in LowerVectorMatch()
6975 Vec = DAG.getBitcast(CastVT, Vec); in LowerVECTOR_COMPRESS()
7011 Compressed = DAG.getBitcast(VecVT, Compressed); in LowerVECTOR_COMPRESS()
9138 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
10637 return DAG.getBitcast(VT, Op); in LowerFCOPYSIGN()
10787 Val = DAG.getBitcast(VT8Bit, Val); in LowerCTPOP_PARITY()
13012 Src = DAG.getBitcast(SrcVT.is64BitVector() ? MVT::v8i8 : MVT::v16i8, Src); in ReconstructShuffle()
13032 return DAG.getBitcast(VT, Shuffle); in ReconstructShuffle()
13619 Input = DAG.getBitcast(MVT::v2f32, Input); in GeneratePerfectShuffle()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2084 return DAG.getBitcast(ToVT, AsInt); in LowerBITCAST()
2181 {DAG.getBitcast(MVT::i32, Vector), DAG.getConstant(0, DL, MVT::i32), in LowerEXTRACT_VECTOR_ELT()
3240 SDValue V = DAG.getBitcast(MVT::getVectorVT(EltVT, NumElts), Val); in LowerSTOREVector()
3296 SDValue Cast = DAG.getBitcast(MVT::v2i64, Op->getOperand(2)); in LowerCopyToReg_128()
5847 SDValue AsInt = DAG.getBitcast(MVT::i16, Op->getOperand(0)); in ReplaceBITCAST()
5949 SDValue LoadValue = DAG.getBitcast(ResVT, BuildVec); in replaceLoadVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp668 Arg = DAG.getBitcast(RegVT, Arg); in LowerCall()
968 ArgValue = DAG.getBitcast(VA.getValVT(), ArgValue); in LowerFormalArguments()
1111 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp3139 Result = DAG.getBitcast(MVT::f32, Result); in lowerEXTRACT_VECTOR_ELT()
3172 Val = DAG.getBitcast(MVT::i32, Val); in lowerINSERT_VECTOR_ELT()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1683 LLVM_ABI SDValue getBitcast(EVT VT, SDValue V);
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6333 Op = DAG.getBitcast(MVT::f16, Op); in ExpandBITCAST()
6652 SDValue Res = DAG.getBitcast(VT8Bit, N->getOperand(0)); in LowerCTPOP()
8781 SDValue BitCast = DAG.getBitcast(MVT::v4f32, Input); in LowerVECTOR_SHUFFLEUsingMovs()
8801 SDValue BitCast = DAG.getBitcast(MVT::v4f32, NewShuffle); in LowerVECTOR_SHUFFLEUsingMovs()
8811 return DAG.getBitcast(VT, NewVec); in LowerVECTOR_SHUFFLEUsingMovs()
10625 return DAG.getBitcast(MVT::i32, Res); in LowerFP_TO_BF16()

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