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Searched refs:fused (Results 1 – 25 of 39) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedule.td51 def WriteFMA16 : SchedWrite; // 16-bit floating point fused multiply-add
52 def WriteFMA32 : SchedWrite; // 32-bit floating point fused multiply-add
53 def WriteFMA64 : SchedWrite; // 64-bit floating point fused multiply-add
54 def WriteFMA128 : SchedWrite; // 128-bit floating point fused multiply-add
185 def ReadFMA16 : SchedRead; // 16-bit floating point fused multiply-add
186 def ReadFMA16Addend : SchedRead; // 16-bit floating point fused multiply-add (addend)
187 def ReadFMA32 : SchedRead; // 32-bit floating point fused multiply-add
188 def ReadFMA32Addend : SchedRead; // 32-bit floating point fused multiply-add (addend)
189 def ReadFMA64 : SchedRead; // 64-bit floating point fused multiply-add
190 def ReadFMA64Addend : SchedRead; // 64-bit floating point fused multiply-add (addend)
[all …]
/freebsd/sys/dev/e1000/
H A De1000_82541.c1159 u16 fused, fine, coarse; in e1000_phy_init_script_82541() local
1163 &fused); in e1000_phy_init_script_82541()
1165 if (!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) { in e1000_phy_init_script_82541()
1167 &fused); in e1000_phy_init_script_82541()
1169 fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK; in e1000_phy_init_script_82541()
1170 coarse = fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK; in e1000_phy_init_script_82541()
1179 fused = (fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) | in e1000_phy_init_script_82541()
1185 fused); in e1000_phy_init_script_82541()
/freebsd/contrib/googletest/
H A D.gitignore46 googlemock/fused-src/
47 googletest/fused-src/
/freebsd/contrib/one-true-awk/testdir/
H A Dchem.awk209 fused = other = ""
236 fused = joinring(typeint, dir, last)
239 printf "] %s %s\n", fused, other
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8370.dtsi67 * of the cores fused out in this lower-binned SoC.
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUFeatures.td18 "Enable single precision FMA (not as fast as mul+add, but fused)"
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mn-vhip4-evalboard-common.dtsi135 /* SoC has GPU fused off. */
361 /* SoC has GPU fused off. */
/freebsd/crypto/openssl/doc/internal/man3/
H A DOSSL_TIME.pod132 B<ossl_time_muldiv> performs a fused multiplication and division operation.
182 B<ossl_time_muldiv> returns the fused multiplication and division of the given
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_fp16.td137 // Vector fused multiply-add operations
H A Darm_neon.td743 // Vector fused multiply-add operations
838 // Vector fused multiply-add operations
1615 // Scalar Floating Point fused multiply-add (scalar, by element)
1621 // Scalar Floating Point fused multiply-subtract (scalar, by element)
1761 // Vector fused multiply-add operations
1820 // Scalar floating point fused multiply-add (scalar, by element)
1831 // Scalar floating foint fused multiply-subtract (scalar, by element)
1881 // v8.2-A FP16 fused multiply-add long instructions.
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM7.td476 // Single-precision fused MACs look like latency 5 with advance of 2.
488 // Double-precision fused MAC stalls the pipeline behind it for 2 cycles, making
H A DARMPredicates.td202 // Prefer fused MAC for fp mul + add over fp VMLA / VMLS if they are available.
H A DARMScheduleM85.td681 // Single-precision fused MACs look like latency 4 with advance of 2.
689 // Double-precision fused MAC looks like latency 4.
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86.td111 "Enable three-operand fused multiple-add",
190 "Enable four-operand fused multiple-add",
680 "CMP/TEST can be fused with conditional branches">;
683 // fused with conditional branches and pass through the CPU as a single
687 "Various instructions can be fused with conditional branches">;
H A DX86ScheduleSLM.td58 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86SchedSandyBridge.td21 // FIXME: Identify instructions that aren't a single fused micro-op.
82 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86ScheduleBdVer2.td156 def PdBranch : ProcResource<1>; // PdEX1; JMP, fused branches
186 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86ScheduleBtVer2.td117 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86ScheduleZnver1.td127 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86ScheduleZnver2.td126 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86SchedSkylakeClient.td86 // Instructions with folded loads are usually micro-fused, so they only appear
H A DX86SchedBroadwell.td87 // Instructions with folded loads are usually micro-fused, so they only appear
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td271 // LDP high register write is fused with the load, but a nop micro-op remains.
645 // Register writes from the load's high half are fused micro-ops.
/freebsd/crypto/openssl/doc/designs/quic-design/
H A Dglossary.md208 `QUIC_STREAM` instances. The `QUIC_CHANNEL` code is fused tightly with the RXDP.
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td866 // Negative fused multiply-add and multiply-subtract.

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