/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSchedule.td | 49 def WriteFMA16 : SchedWrite; // 16-bit floating point fused multiply-add 50 def WriteFMA32 : SchedWrite; // 32-bit floating point fused multiply-add 51 def WriteFMA64 : SchedWrite; // 64-bit floating point fused multiply-add 162 def ReadFMA16 : SchedRead; // 16-bit floating point fused multiply-add 163 def ReadFMA16Addend : SchedRead; // 16-bit floating point fused multiply-add (addend) 164 def ReadFMA32 : SchedRead; // 32-bit floating point fused multiply-add 165 def ReadFMA32Addend : SchedRead; // 32-bit floating point fused multiply-add (addend) 166 def ReadFMA64 : SchedRead; // 64-bit floating point fused multiply-add 167 def ReadFMA64Addend : SchedRead; // 64-bit floating point fused multiply-add (addend)
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/freebsd/sys/dev/e1000/ |
H A D | e1000_82541.c | 1159 u16 fused, fine, coarse; in e1000_phy_init_script_82541() local 1163 &fused); in e1000_phy_init_script_82541() 1165 if (!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) { in e1000_phy_init_script_82541() 1167 &fused); in e1000_phy_init_script_82541() 1169 fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK; in e1000_phy_init_script_82541() 1170 coarse = fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK; in e1000_phy_init_script_82541() 1179 fused = (fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) | in e1000_phy_init_script_82541() 1185 fused); in e1000_phy_init_script_82541()
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/freebsd/contrib/googletest/ |
H A D | .gitignore | 45 googlemock/fused-src/ 46 googletest/fused-src/
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/freebsd/contrib/one-true-awk/testdir/ |
H A D | chem.awk | 209 fused = other = "" 236 fused = joinring(typeint, dir, last) 239 printf "] %s %s\n", fused, other
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUFeatures.td | 18 "Enable single precision FMA (not as fast as mul+add, but fused)"
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | arm_fp16.td | 131 // Vector fused multiply-add operations
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H A D | arm_neon.td | 694 // Vector fused multiply-add operations 781 // Vector fused multiply-add operations 1593 // Scalar Floating Point fused multiply-add (scalar, by element) 1599 // Scalar Floating Point fused multiply-subtract (scalar, by element) 1752 // Vector fused multiply-add operations 1811 // Scalar floating point fused multiply-add (scalar, by element) 1824 // Scalar floating foint fused multiply-subtract (scalar, by element) 1886 // v8.2-A FP16 fused multiply-add long instructions.
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleM7.td | 476 // Single-precision fused MACs look like latency 5 with advance of 2. 488 // Double-precision fused MAC stalls the pipeline behind it for 2 cycles, making
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H A D | ARMPredicates.td | 202 // Prefer fused MAC for fp mul + add over fp VMLA / VMLS if they are available.
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86.td | 111 "Enable three-operand fused multiple-add", 195 "Enable four-operand fused multiple-add", 661 "CMP/TEST can be fused with conditional branches">; 664 // fused with conditional branches and pass through the CPU as a single 668 "Various instructions can be fused with conditional branches">;
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H A D | X86ScheduleSLM.td | 58 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86SchedSandyBridge.td | 21 // FIXME: Identify instructions that aren't a single fused micro-op. 82 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86ScheduleBdVer2.td | 156 def PdBranch : ProcResource<1>; // PdEX1; JMP, fused branches 186 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86ScheduleBtVer2.td | 117 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86ScheduleZnver1.td | 127 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86ScheduleZnver2.td | 126 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86SchedBroadwell.td | 87 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86SchedSkylakeClient.td | 86 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86SchedHaswell.td | 92 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86ScheduleZnver3.td | 393 // Instructions with folded loads are usually micro-fused, so they only appear
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H A D | X86SchedAlderlakeP.td | 101 // Instructions with folded loads are usually micro-fused, so they only appear
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedCyclone.td | 271 // LDP high register write is fused with the load, but a nop micro-op remains. 645 // Register writes from the load's high half are fused micro-ops.
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZOperators.td | 823 // Negative fused multiply-add and multiply-subtract.
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGCall.cpp | 3519 if (llvm::Value *fused = tryEmitFusedAutoreleaseOfResult(CGF, result)) in emitAutoreleaseOfResult() local 3520 return fused; in emitAutoreleaseOfResult()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | GenericOpcodes.td | 888 // Generic fused multiply-add instruction.
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