Searched refs:emitStoreConditional (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 671 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | ARMISelLowering.cpp | 21501 Value *ARMTargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in ARMTargetLowering
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 370 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | HexagonISelLowering.cpp | 3916 Value *HexagonTargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in HexagonTargetLowering
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AtomicExpandPass.cpp | 1289 TLI->emitStoreConditional(Builder, NewVal, Addr, MemOpOrder); in insertRMWLLSCLoop()
1470 Value *StoreSuccess = TLI->emitStoreConditional(Builder, NewValueInsert, in expandAtomicCmpXchg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 307 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | AArch64ISelLowering.cpp | 28250 Value *AArch64TargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in AArch64TargetLowering
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 933 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | PPCISelLowering.cpp | 12796 Value *PPCTargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in PPCTargetLowering
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2241 virtual Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, in emitStoreConditional() function
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