Searched refs:emitStoreConditional (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 650 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | ARMISelLowering.cpp | 21573 Value *ARMTargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in ARMTargetLowering
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 354 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | HexagonISelLowering.cpp | 3877 Value *HexagonTargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in HexagonTargetLowering
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AtomicExpandPass.cpp | 1240 TLI->emitStoreConditional(Builder, NewVal, Addr, MemOpOrder); in insertRMWLLSCLoop()
1421 Value *StoreSuccess = TLI->emitStoreConditional(Builder, NewValueInsert, in expandAtomicCmpXchg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 786 Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, Value *Addr,
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| H A D | AArch64ISelLowering.cpp | 26689 Value *AArch64TargetLowering::emitStoreConditional(IRBuilderBase &Builder, in emitStoreConditional() function in AArch64TargetLowering
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2172 virtual Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val, in emitStoreConditional() function
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