/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrFormats.td | 32 class MSP430Inst<dag outs, dag ins, int size, string asmstr> : Instruction { 38 dag OutOperandList = outs; 39 dag InOperandList = ins; 47 dag outs, dag ins, string asmstr, list<dag> pattern> 64 dag outs, dag ins, string asmstr, list<dag> pattern> 68 dag outs, dag ins, string asmstr, list<dag> pattern> 74 dag outs, dag ins, string asmstr, list<dag> pattern> 83 dag outs, dag ins, string asmstr, list<dag> pattern> 100 dag outs, dag ins, string asmstr, list<dag> pattern> 109 dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreInstrFormats.td | 12 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern> 17 dag OutOperandList = outs; 18 dag InOperandList = ins; 26 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> 35 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 44 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 49 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 60 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr, 61 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> { 65 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrFormats.td | 13 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 89 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, 124 class IXFormMemOp<bits<6> opcode, dag OOL, dag IOL, string asmstr, 129 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 130 InstrItinClass itin, list<dag> pattern> 141 class BForm<bits<6> opcode, bit aa, bit lk, dag OO [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchLASXInstrFormats.td | 21 class Fmt1RI13_XI<bits<32> op, dag outs, dag ins, string opnstr, 22 list<dag> pattern = []> 34 class Fmt2R_XX<bits<32> op, dag outs, dag ins, string opnstr, 35 list<dag> pattern = []> 46 class Fmt2R_XR<bits<32> op, dag outs, dag ins, string opnstr, 47 list<dag> pattern = []> 58 class Fmt2R_CX<bits<32> op, dag outs, dag ins, string opnstr, 59 list<dag> pattern = []> 71 class Fmt2RI1_XXI<bits<32> op, dag outs, dag ins, string opnstr, 72 list<dag> pattern = []> [all …]
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H A D | LoongArchLSXInstrFormats.td | 21 class Fmt1RI13_VI<bits<32> op, dag outs, dag ins, string opnstr, 22 list<dag> pattern = []> 34 class Fmt2R_VV<bits<32> op, dag outs, dag ins, string opnstr, 35 list<dag> pattern = []> 46 class Fmt2R_VR<bits<32> op, dag outs, dag ins, string opnstr, 47 list<dag> pattern = []> 58 class Fmt2R_CV<bits<32> op, dag outs, dag ins, string opnstr, 59 list<dag> pattern = []> 71 class Fmt2RI1_VVI<bits<32> op, dag outs, dag ins, string opnstr, 72 list<dag> pattern = []> [all …]
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H A D | LoongArchInstrFormats.td | 19 class LAInst<dag outs, dag ins, string opcstr, string opnstr, 20 list<dag> pattern = []> 38 class Pseudo<dag outs, dag ins, list<dag> pattern = [], string opcstr = "", 51 class Fmt2R<bits<32> op, dag outs, dag ins, string opnstr, 52 list<dag> pattern = []> 64 class Fmt3R<bits<32> op, dag outs, dag ins, string opnstr, 65 list<dag> pattern = []> 79 class Fmt3RI2<bits<32> op, dag outs, dag ins, string opnstr, 80 list<dag> pattern = []> 96 class Fmt3RI3<bits<32> op, dag outs, dag ins, string opnstr, [all …]
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H A D | LoongArchFloatInstrFormats.td | 34 class FPFmt2R<bits<32> op, dag outs, dag ins, string opnstr, 35 list<dag> pattern = []> 47 class FPFmt3R<bits<32> op, dag outs, dag ins, string opnstr, 48 list<dag> pattern = []> 62 class FPFmt4R<bits<32> op, dag outs, dag ins, string opnstr, 63 list<dag> pattern = []> 79 class FPFmt2RI12<bits<32> op, dag outs, dag ins, string opnstr, 80 list<dag> pattern = []> 94 class FPFmtFCMP<bits<32> op, dag outs, dag ins, string opnstr, 95 list<dag> pattern = []> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRInstrFormats.td | 14 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> 18 dag OutOperandList = outs; 19 dag InOperandList = ins; 27 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern> 35 class AVRInst32<dag outs, dag in [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcInstrFormats.td | 9 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern, 20 dag OutOperandList = outs; 21 dag InOperandList = ins; 36 class F2<dag outs, dag ins, string asmstr, list<dag> pattern, 48 class F2_1<bits<3> op2Val, dag outs, dag in [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
H A D | XtensaInstrFormats.td | 12 class XtensaInst<int size, dag outs, dag ins, string asmstr, list<dag> pattern, 29 class XtensaInst24<dag outs, dag ins, string asmstr, list<dag> pattern, 37 class XtensaInst16<dag outs, dag ins, string asmstr, list<dag> pattern, 45 class RRR_Inst<bits<4> op0, bits<4> op1, bits<4> op2, dag outs, dag ins, 46 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary> 60 class RRI4_Inst<bits<4> op0, bits<4> op1, dag outs, dag ins, 61 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary> 76 class RRI8_Inst<bits<4> op0, dag outs, dag ins, 77 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary> 91 class RI16_Inst<bits<4> op0, dag outs, dag ins, [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips16InstrFormats.td | 35 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern, 54 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern, 71 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern, 81 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern, 91 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>: 102 class FI16<bits<5> op, dag outs, dag ins, string asmstr, list<dag> pattern, 117 class FRI16<bits<5> op, dag outs, dag ins, string asmstr, 118 list<dag> pattern, InstrItinClass itin>: 134 class FRR16<bits<5> _funct, dag outs, dag ins, string asmstr, 135 list<dag> pattern, InstrItinClass itin>: [all …]
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H A D | MipsEVAInstrInfo.td | 55 dag OutOperandList = (outs GPROpnd:$rt); 56 dag InOperandList = (ins mem_simm9:$addr); 58 list<dag> Pattern = []; 74 dag OutOperandList = (outs); 75 dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr); 77 list<dag> Pattern = []; 91 dag OutOperandList = (outs GPROpnd:$rt); 92 dag InOperandList = (ins mem_simm9:$addr, GPROpnd:$src); 94 list<dag> Pattern = []; 109 dag OutOperandList = (outs); [all …]
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H A D | Mips32r6InstrInfo.td | 216 dag OutOperandList = (outs FGRCCOpnd:$fd); 217 dag InOperandList = (ins FGROpnd:$fs, FGROpnd:$ft); 219 list<dag> Pattern = [(set FGRCCOpnd:$fd, (Op FGROpnd:$fs, FGROpnd:$ft))]; 320 dag OutOperandList = (outs GPROpnd:$rs); 321 dag InOperandList = (ins ImmOpnd:$imm); 323 list<dag> Pattern = []; 334 dag OutOperandList = (outs GPROpnd:$rd); 335 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp); 337 list<dag> Pattern = []; 346 dag OutOperandList = (outs GPROpnd:$rs); [all …]
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H A D | MicroMips32r6InstrInfo.td | 279 dag InOperandList = (ins GPROpnd:$rt, opnd:$offset); 280 dag OutOperandList = (outs); 327 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, opnd:$offset); 328 dag OutOperandList = (outs); 358 dag InOperandList = (ins opnd:$offset); 359 dag OutOperandList = (outs); 370 list<dag> Pattern = [(br bb:$offset)]; 401 dag OutOperandList = (outs GPROpnd:$rd); 402 dag InOperandList = (ins GPROpnd:$rt); 404 list<dag> Pattern = []; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrFormats.td | 265 class vpred_ops<dag extra_op, dag extra_mi> : OperandWithDefaultOps<OtherVT, 369 class ARMInstAlias<string Asm, dag Result, bit EmitPriority = 0> 371 class ARMInstSubst<string Asm, dag Result, bit EmitPriority = 0> 374 class tInstAlias<string Asm, dag Result, bit EmitPriority = 0> 376 class tInstSubst<string Asm, dag Result, bit EmitPriority = 0> 379 class t2InstAlias<string Asm, dag Result, bit EmitPriority = 0> 381 class t2InstSubst<string Asm, dag Result, bit EmitPriority = 0> 384 class VFP2InstAlias<string Asm, dag Result, bit EmitPriority = 0> 386 class VFP2DPInstAlias<string Asm, dag Result, bit EmitPriority = 0> 388 class VFP3InstAlias<string Asm, dag Result, bit EmitPriority = 0> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrUtils.td | 305 dag ImmAllZerosV = (VT immAllZerosV); 388 class PseudoI<dag oops, dag iops, list<dag> pattern> 393 class I<bits<8> o, Format f, dag outs, dag ins, string asm, 394 list<dag> pattern, Domain d = GenericDomain> 398 class Ii8<bits<8> o, Format f, dag outs, dag ins, string asm, 399 list<dag> pattern, Domain d = GenericDomain> 403 class Ii8Reg<bits<8> o, Format f, dag outs, dag ins, string asm, 404 list<dag> pattern, Domain d = GenericDomain> 408 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm, 409 list<dag> pattern> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrFormatsC.td | 13 class RVInst16<dag outs, dag ins, string opcodestr, string argstr, 14 list<dag> pattern, InstFormat format> 25 class RVInst16CR<bits<4> funct4, bits<2> opcode, dag outs, dag ins, 40 class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins, 55 class RVInst16CSS<bits<3> funct3, bits<2> opcode, dag outs, dag ins, 67 class RVInst16CIW<bits<3> funct3, bits<2> opcode, dag outs, dag ins, 81 class RVInst16CL<bits<3> funct3, bits<2> opcode, dag outs, dag ins, 96 class RVInst16CS<bits<3> funct3, bits<2> opcode, dag outs, dag ins, 108 class RVInst16CA<bits<6> funct6, bits<2> funct2, bits<2> opcode, dag outs, 109 dag ins, string opcodestr, string argstr> [all …]
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H A D | RISCVInstrFormats.td | 161 class RVInstCommon<dag outs, dag ins, string opcodestr, string argstr, 162 list<dag> pattern, InstFormat format> : Instruction { 165 dag OutOperandList = outs; 166 dag InOperandList = ins; 228 class RVInst<dag outs, dag ins, string opcodestr, string argstr, 229 list<dag> pattern, InstFormat format> 241 class Pseudo<dag outs, dag ins, list<dag> pattern, string opcodestr = "", string argstr = ""> 288 class RVInstRBase<bits<3> funct3, RISCVOpcode opcode, dag outs, 289 dag ins, string opcodestr, string argstr> 302 class RVInstR<bits<7> funct7, bits<3> funct3, RISCVOpcode opcode, dag outs, [all …]
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H A D | RISCVInstrFormatsV.td | 57 class RVInstSetiVLi<dag outs, dag ins, string opcodestr, string argstr> 74 class RVInstSetVLi<dag outs, dag ins, string opcodestr, string argstr> 90 class RVInstSetVL<dag outs, dag ins, string opcodestr, string argstr> 107 class RVInstVV<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins, 127 class RVInstVX<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins, 147 class RVInstV2<bits<6> funct6, bits<5> vs2, RISCVVFormat opv, dag outs, dag ins, 166 class RVInstIVI<bits<6> funct6, dag outs, dag ins, string opcodestr, 186 class RVInstV<bits<6> funct6, bits<5> vs1, RISCVVFormat opv, dag outs, 187 dag ins, string opcodestr, string argstr> 206 bits<3> width, dag outs, dag ins, string opcodestr, [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCInstrFormats.td | 96 class InstARC<int sz, dag outs, dag ins, string asmstr, list<dag> pattern> 100 dag OutOperandList = outs; 101 dag InOperandList = ins; 120 class PseudoInstARC<dag outs, dag ins, string asmstr, list<dag> pattern> 155 class F32_BR<bits<5> major, dag outs, dag ins, bit b16, string asmstr, 156 list<dag> pattern> : 165 class F32_BR_COND<bits<5> major, dag outs, dag ins, bit b16, string asmstr, 166 list<dag> pattern> : 175 class F32_BR_UCOND_FAR<bits<5> major, dag outs, dag ins, bit b16, string asmstr, 176 list<dag> pattern> : [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEInstrFormats.td | 23 class InstVE<dag outs, dag ins, string asmstr, list<dag> pattern> 33 dag OutOperandList = outs; 34 dag InOperandList = ins; 68 class RM<bits<8>opVal, dag outs, dag ins, string asmstr, list<dag> pattern = []> 94 class RRM<bits<8>opVal, dag outs, dag ins, string asmstr, 95 list<dag> pattern = []> 100 class RRMHM<bits<8>opVal, dag outs, dag ins, string asmstr, 101 list<dag> pattern = []> 115 class CF<bits<8>opVal, dag outs, dag ins, string asmstr, list<dag> pattern = []> 144 class RR<bits<8>opVal, dag outs, dag ins, string asmstr, list<dag> pattern = []> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYInstrFormatsF2.td | 13 class CSKYInstF2<AddrMode am, dag outs, dag ins, string opcodestr, 14 list<dag> pattern> 20 class F2_XYZ<bits<5> datatype, bits<6> sop, string opcodestr, dag outs, dag ins, 21 list<dag> pattern> 66 class F2_XZ_P<bits<5> datatype, bits<6> sop, string op, list<dag> pattern = [], 67 dag outs, dag ins> 71 multiclass F2_XZ_RM<bits<5> datatype, bits<4> sop, string op, dag outs, dag ins> { 117 class F2_LDST<bits<2> datatype, bits<1> sop, string op, dag outs, dag ins> 134 class F2_LDST_S<bits<1> sop, string op, dag outs, dag ins> 136 class F2_LDST_D<bits<1> sop, string op, dag outs, dag ins> [all …]
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H A D | CSKYInstrFormats.td | 22 class CSKYInst<AddrMode am, int sz, dag outs, dag ins, string asmstr, 23 list<dag> pattern> : Instruction { 36 class CSKYPseudo<dag outs, dag ins, string asmstr, list<dag> pattern> 42 class CSKY32Inst<AddrMode am, bits<6> opcode, dag outs, dag ins, string asmstr, 43 list<dag> pattern> 49 class CSKY16Inst<AddrMode am, dag outs, dag ins, string asmstr, list<dag> pattern> 57 class J<bits<6> opcode, dag outs, dag ins, string op, list<dag> pattern> 68 class I_18_Z_L<bits<3> sop, string asm, dag outs, dag ins, list<dag> pattern> 79 class I_16_ZX<string op, ImmLeaf ImmType, list<dag> pattern> 109 class I_16_Z_L<bits<5> sop, string op, dag ins, list<dag> pattern> [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyInstrFormats.td | 33 class NI<dag oops, dag iops, list<dag> pattern, bit stack, 36 dag OutOperandList = oops; 37 dag InOperandList = iops; 55 multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s, 56 list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "", 65 multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVInstrFormats.td | 13 class Op<bits<16> Opcode, dag outs, dag ins, string asmstr, list<dag> pattern = []> 22 dag OutOperandList = outs; 23 dag InOperandList = ins; 29 class Pseudo<dag outs, dag ins> : Op<0, outs, ins, ""> {
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