| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 580 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6() 582 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6() 594 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI() 596 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI() 632 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch() 635 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch() 652 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6() 654 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6() 659 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6() 661 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 114 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodeGPRRegisterClass() 124 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); in DecodeFPR32RegisterClass() 134 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); in DecodesFPR32RegisterClass() 144 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); in DecodesFPR64RegisterClass() 154 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); in DecodesFPR64_VRegisterClass() 164 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); in DecodeFPR64RegisterClass() 176 Inst.addOperand(MCOperand::createReg(FPR128DecoderTable[RegNo])); in DecodesFPR128RegisterClass() 186 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodesGPRRegisterClass() 196 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodemGPRRegisterClass() 208 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodeGPRSPRegisterClass() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 63 Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo)); in DecodeGPRRegisterClass() 80 Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo)); in DecodeFPR32RegisterClass() 89 Inst.addOperand(MCOperand::createReg(LoongArch::F0_64 + RegNo)); in DecodeFPR64RegisterClass() 98 Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo)); in DecodeCFRRegisterClass() 107 Inst.addOperand(MCOperand::createReg(LoongArch::FCSR0 + RegNo)); in DecodeFCSRRegisterClass() 116 Inst.addOperand(MCOperand::createReg(LoongArch::VR0 + RegNo)); in DecodeLSX128RegisterClass() 125 Inst.addOperand(MCOperand::createReg(LoongArch::XR0 + RegNo)); in DecodeLASX256RegisterClass() 134 Inst.addOperand(MCOperand::createReg(LoongArch::SCR0 + RegNo)); in DecodeSCRRegisterClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 77 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR8RegisterClass() 88 Inst.addOperand(MCOperand::createReg(Register)); in DecodeLD8RegisterClass() 199 Inst.addOperand(MCOperand::createReg(AVR::R31R30)); in decodeFLPMX() 271 MCOperand::createReg((Insn & 0x40) ? AVR::R29R28 : AVR::R31R30)); in decodeMemri() 343 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore() 344 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore() 348 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore() 350 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore() 396 Inst.addOperand(MCOperand::createReg(RegBase)); in decodeLoadStore() 397 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 86 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass() 99 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRF16RegisterClass() 112 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRF32RegisterClass() 123 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRX1X5RegisterClass() 134 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR16RegisterClass() 145 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass() 156 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass() 167 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass() 178 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64CRegisterClass() 189 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR128RegisterClass() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVMCInstLower.cpp | 44 MCOp = MCOperand::createReg(FuncReg); in lower() 48 MCOp = MCOperand::createReg(MAI->getOrCreateMBBRegister(*MO.getMBB())); in lower() 52 MCOp = MCOperand::createReg(NewReg.isValid() ? NewReg in lower() 59 MCOp = MCOperand::createReg(Reg); in lower()
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| H A D | SPIRVAsmPrinter.cpp | 185 LabelInst.addOperand(MCOperand::createReg(MAI->getOrCreateMBBRegister(MBB))); in emitOpLabel() 323 Inst.addOperand(MCOperand::createReg(Reg)); in outputOpExtInstImports() 369 TmpInst.addOperand(MCOperand::createReg(Reg)); in outputEntryPoints() 450 Inst.addOperand(MCOperand::createReg(FuncReg)); in addOpsFromMDNode() 461 Inst.addOperand(MCOperand::createReg(Reg)); in outputExecutionModeFromMDNode() 480 Inst.addOperand(MCOperand::createReg(Reg)); in outputExecutionModeFromNumthreadsAttribute() 523 Inst.addOperand(MCOperand::createReg(FReg)); in outputExecutionMode() 545 Inst.addOperand(MCOperand::createReg(FReg)); in outputExecutionMode() 556 Inst.addOperand(MCOperand::createReg(FReg)); in outputExecutionMode() 597 Inst.addOperand(MCOperand::createReg(Reg)); in outputAnnotations()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 37 NopInst.addOperand(MCOperand::createReg(0)); in getNop() 40 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop() 41 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop() 43 NopInst.addOperand(MCOperand::createReg(0)); in getNop() 44 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
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| H A D | ARMAsmPrinter.cpp | 1615 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 1639 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1641 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1650 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 1651 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(1).getReg())); in emitInstruction() 1674 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1676 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() 1979 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in emitInstruction() 1980 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction() 1983 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 189 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitR() 198 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRX() 212 emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI); in emitRR() 230 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRX() 231 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRX() 240 emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI); in emitRRR() 249 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRRX() 250 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRRX() 251 TmpInst.addOperand(MCOperand::createReg(Reg2)); in emitRRRX() 269 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRIII() [all …]
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| H A D | MipsNaClELFStreamer.cpp | 104 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask() 105 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask() 106 MaskInst.addOperand(MCOperand::createReg(MaskReg)); in emitMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 1937 mcInst.addOperand(MCOperand::createReg(llvmRegnum)); in translateRegister() 1965 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateSrcIndex() 1969 segmentReg = MCOperand::createReg(segmentRegnums[insn.segmentOverride]); in translateSrcIndex() 1990 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateDstIndex() 2075 mcInst.addOperand(MCOperand::createReg(X86::XMM0 + (immediate >> 4))); in translateImmediate() 2078 mcInst.addOperand(MCOperand::createReg(X86::YMM0 + (immediate >> 4))); in translateImmediate() 2081 mcInst.addOperand(MCOperand::createReg(X86::ZMM0 + (immediate >> 4))); in translateImmediate() 2095 segmentReg = MCOperand::createReg(segmentRegnums[insn.segmentOverride]); in translateImmediate() 2128 mcInst.addOperand(MCOperand::createReg(X86::x)); break; in translateRMRegister() 2175 baseReg = MCOperand::createReg(X86::x); break; in translateRMMemory() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 148 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeIntRegsRegisterClass() 172 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPRegsRegisterClass() 182 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeDFPRegsRegisterClass() 195 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeQFPRegsRegisterClass() 205 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeCoprocRegsRegisterClass() 214 Inst.addOperand(MCOperand::createReg(FCCRegDecoderTable[RegNo])); in DecodeFCCRegsRegisterClass() 223 Inst.addOperand(MCOperand::createReg(ASRRegDecoderTable[RegNo])); in DecodeASRRegsRegisterClass() 232 Inst.addOperand(MCOperand::createReg(PRRegDecoderTable[RegNo])); in DecodePRRegsRegisterClass() 248 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeIntPairRegisterClass() 259 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeCoprocPairRegisterClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 569 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands() 577 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR32orGR64Operands() 586 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR16orGR32orGR64Operands() 620 Inst.addOperand(MCOperand::createReg(Reg)); in addMaskPairOperands() 651 Inst.addOperand(MCOperand::createReg(Reg)); in addTILEPairOperands() 657 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addMemOperands() 659 Inst.addOperand(MCOperand::createReg(getMemDefaultBaseReg())); in addMemOperands() 661 Inst.addOperand(MCOperand::createReg(getMemIndexReg())); in addMemOperands() 663 Inst.addOperand(MCOperand::createReg(getMemSegReg())); in addMemOperands() 677 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addSrcIdxOperands() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2537 Inst.addOperand(MCOperand::createReg(RegNum)); in addCondCodeOperands() 2544 Inst.addOperand(MCOperand::createReg(RegNum)); in addVPTPredNOperands() 2545 Inst.addOperand(MCOperand::createReg(0)); in addVPTPredNOperands() 2562 Inst.addOperand(MCOperand::createReg(RegNum)); in addVPTPredROperands() 2597 Inst.addOperand(MCOperand::createReg(getReg())); in addCCOutOperands() 2602 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands() 2609 Inst.addOperand(MCOperand::createReg(RegShiftedReg.SrcReg)); in addRegShiftedRegOperands() 2610 Inst.addOperand(MCOperand::createReg(RegShiftedReg.ShiftReg)); in addRegShiftedRegOperands() 2619 Inst.addOperand(MCOperand::createReg(RegShiftedImm.SrcReg)); in addRegShiftedImmOperands() 2636 Inst.addOperand(MCOperand::createReg(Reg)); in addRegListOperands() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 175 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass() 185 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRiMemoryValue() 198 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue() 200 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue() 211 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeSplsValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 186 MCOperand MCRegOP = MCOperand::createReg(MO.getReg()); in lowerGETGOTAndEmitMCInsts() 203 MCOperand RegGOT = MCOperand::createReg(VE::SX15); // GOT in lowerGETGOTAndEmitMCInsts() 204 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT in lowerGETGOTAndEmitMCInsts() 223 MCOperand MCRegOP = MCOperand::createReg(MO.getReg()); in lowerGETFunPLTAndEmitMCInsts() 250 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT in lowerGETFunPLTAndEmitMCInsts() 289 MCOperand RegLR = MCOperand::createReg(VE::SX10); // LR in lowerGETTLSAddrAndEmitMCInsts() 290 MCOperand RegS0 = MCOperand::createReg(VE::SX0); // S0 in lowerGETTLSAddrAndEmitMCInsts() 291 MCOperand RegS12 = MCOperand::createReg(VE::SX12); // S12 in lowerGETTLSAddrAndEmitMCInsts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 1747 CallTargetMCOp = MCOperand::createReg(CallTarget.getReg()); in LowerSTATEPOINT() 1787 MI.addOperand(MCOperand::createReg(DefRegister)); in LowerFAULTING_OP() 1841 MOVI.addOperand(MCOperand::createReg(DestReg)); in emitFMov0() 1852 FMov.addOperand(MCOperand::createReg(DestReg)); in emitFMov0() 1853 FMov.addOperand(MCOperand::createReg(AArch64::WZR)); in emitFMov0() 1857 FMov.addOperand(MCOperand::createReg(DestReg)); in emitFMov0() 1858 FMov.addOperand(MCOperand::createReg(AArch64::WZR)); in emitFMov0() 1862 FMov.addOperand(MCOperand::createReg(DestReg)); in emitFMov0() 1863 FMov.addOperand(MCOperand::createReg(AArch64::XZR)); in emitFMov0() 2129 AUTInst.addOperand(MCOperand::createReg(AUTVal)); in emitPtrauthAuthResign() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 466 Inst.addOperand(MCOperand::createReg(RRegs[getRegNum()])); in addRegGPRCOperands() 471 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getRegNum()])); in addRegGPRCNoR0Operands() 476 Inst.addOperand(MCOperand::createReg(XRegs[getRegNum()])); in addRegG8RCOperands() 481 Inst.addOperand(MCOperand::createReg(XRegsNoX0[getRegNum()])); in addRegG8RCNoX0Operands() 486 Inst.addOperand(MCOperand::createReg(XRegs[getG8pReg()])); in addRegG8pRCOperands() 505 Inst.addOperand(MCOperand::createReg(FRegs[getRegNum()])); in addRegF4RCOperands() 510 Inst.addOperand(MCOperand::createReg(FRegs[getRegNum()])); in addRegF8RCOperands() 515 Inst.addOperand(MCOperand::createReg(FpRegs[getFpReg()])); in addRegFpRCOperands() 520 Inst.addOperand(MCOperand::createReg(VFRegs[getRegNum()])); in addRegVFRCOperands() 525 Inst.addOperand(MCOperand::createReg(VRegs[getRegNum()])); in addRegVRRCOperands() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 108 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass() 123 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass() 134 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeMemoryOpValue() 215 Instr.addOperand(MCOperand::createReg(BPF::R6)); in getInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 72 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeARRegisterClass() 83 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeMRRegisterClass() 94 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeMR01RegisterClass() 105 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeMR23RegisterClass() 116 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPRRegisterClass() 138 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeURRegisterClass() 208 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeSRRegisterClass() 223 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeBRRegisterClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 897 MCOperand::createReg(InITBlock ? ARM::NoRegister : ARM::CPSR)); in AddThumb1SBit() 902 MI.insert(I, MCOperand::createReg(InITBlock ? ARM::NoRegister : ARM::CPSR)); in AddThumb1SBit() 995 MI.insert(CCI, MCOperand::createReg(ARM::NoRegister)); in AddThumbPredicate() 997 MI.insert(CCI, MCOperand::createReg(ARM::CPSR)); in AddThumbPredicate() 1013 VCCI = MI.insert(VCCI, MCOperand::createReg(0)); in AddThumbPredicate() 1015 VCCI = MI.insert(VCCI, MCOperand::createReg(ARM::P0)); in AddThumbPredicate() 1017 VCCI = MI.insert(VCCI, MCOperand::createReg(0)); in AddThumbPredicate() 1304 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPRRegisterClass() 1318 Inst.addOperand(MCOperand::createReg(Register)); in DecodeCLRMGPRRegisterClass() 1355 Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV)); in DecodeGPRwithAPSRRegisterClass() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 179 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { in createReg() function in __anonde0c959e0111::SystemZOperand 307 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands() 316 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDAddrOperands() 322 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDXAddrOperands() 324 Inst.addOperand(MCOperand::createReg(Mem.Index)); in addBDXAddrOperands() 329 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDLAddrOperands() 336 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDRAddrOperands() 338 Inst.addOperand(MCOperand::createReg(Mem.Length.Reg)); in addBDRAddrOperands() 343 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDVAddrOperands() 345 Inst.addOperand(MCOperand::createReg(Mem.Index)); in addBDVAddrOperands() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 124 RDPCInst.addOperand(MCOperand::createReg(SP::ASR5)); in EmitRDPC() 188 MCOperand MCRegOP = MCOperand::createReg(MO.getReg()); in LowerGETPCXAndEmitMCInsts() 218 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts() 231 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts() 272 return MCOperand::createReg(MO.getReg()); in lowerOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/AsmParser/ |
| H A D | M68kAsmParser.cpp | 326 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands() 434 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIOperands() 444 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIDOperands() 455 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIIOperands() 456 Inst.addOperand(MCOperand::createReg(MemOp.InnerReg)); in addARIIOperands() 465 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIPDOperands() 474 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIPIOperands() 494 Inst.addOperand(MCOperand::createReg(MemOp.InnerReg)); in addPCIOperands()
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