Lines Matching refs:createReg
464 Inst.addOperand(MCOperand::createReg(RRegs[getRegNum()])); in addRegGPRCOperands()
469 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getRegNum()])); in addRegGPRCNoR0Operands()
474 Inst.addOperand(MCOperand::createReg(XRegs[getRegNum()])); in addRegG8RCOperands()
479 Inst.addOperand(MCOperand::createReg(XRegsNoX0[getRegNum()])); in addRegG8RCNoX0Operands()
484 Inst.addOperand(MCOperand::createReg(XRegs[getG8pReg()])); in addRegG8pRCOperands()
503 Inst.addOperand(MCOperand::createReg(FRegs[getRegNum()])); in addRegF4RCOperands()
508 Inst.addOperand(MCOperand::createReg(FRegs[getRegNum()])); in addRegF8RCOperands()
513 Inst.addOperand(MCOperand::createReg(FpRegs[getFpReg()])); in addRegFpRCOperands()
518 Inst.addOperand(MCOperand::createReg(VFRegs[getRegNum()])); in addRegVFRCOperands()
523 Inst.addOperand(MCOperand::createReg(VRegs[getRegNum()])); in addRegVRRCOperands()
528 Inst.addOperand(MCOperand::createReg(VSRegs[getVSReg()])); in addRegVSRCOperands()
533 Inst.addOperand(MCOperand::createReg(VSFRegs[getVSReg()])); in addRegVSFRCOperands()
538 Inst.addOperand(MCOperand::createReg(VSSRegs[getVSReg()])); in addRegVSSRCOperands()
543 Inst.addOperand(MCOperand::createReg(RRegs[getRegNum()])); in addRegSPE4RCOperands()
548 Inst.addOperand(MCOperand::createReg(SPERegs[getRegNum()])); in addRegSPERCOperands()
553 Inst.addOperand(MCOperand::createReg(ACCRegs[getACCReg()])); in addRegACCRCOperands()
558 Inst.addOperand(MCOperand::createReg(DMRROWRegs[getDMRROWReg()])); in addRegDMRROWRCOperands()
563 Inst.addOperand(MCOperand::createReg(DMRROWpRegs[getDMRROWpReg()])); in addRegDMRROWpRCOperands()
568 Inst.addOperand(MCOperand::createReg(DMRRegs[getDMRReg()])); in addRegDMRRCOperands()
573 Inst.addOperand(MCOperand::createReg(DMRpRegs[getDMRpReg()])); in addRegDMRpRCOperands()
578 Inst.addOperand(MCOperand::createReg(WACCRegs[getACCReg()])); in addRegWACCRCOperands()
583 Inst.addOperand(MCOperand::createReg(WACC_HIRegs[getACCReg()])); in addRegWACC_HIRCOperands()
588 Inst.addOperand(MCOperand::createReg(VSRpRegs[getVSRpEvenReg()])); in addRegVSRpRCOperands()
593 Inst.addOperand(MCOperand::createReg(VSRpRegs[getVSRpEvenReg()])); in addRegVSRpEvenRCOperands()
598 Inst.addOperand(MCOperand::createReg(CRBITRegs[getCRBit()])); in addRegCRBITRCOperands()
603 Inst.addOperand(MCOperand::createReg(CRRegs[getCCReg()])); in addRegCRRCOperands()
608 Inst.addOperand(MCOperand::createReg(CRRegs[getCRBitMask()])); in addCRBitMaskOperands()