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Searched refs:c10 (Results 1 – 25 of 77) sorted by relevance

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/freebsd/lib/libmp/tests/
H A Dlegacy_test.c33 MINT *c0, *c1, *c2, *c3, *c5, *c6, *c8, *c10, *c14, *c15, *c25, \ variable
79 mp_gcd(c10, c15, t0); in testgcd()
105 mp_mdiv(c10, c8, t0, t1); in testdiv()
115 mp_sdiv(c10, 8, t0, &ro); in testdiv()
127 testmcmp(t0, c10, "mmult0"); in testmult()
136 mp_pow(c2, c3, c10, t0); in testpow()
168 c10 = mp_itom(10); in main()
197 mp_mfree(c10); in main()
/freebsd/sys/arm/include/
H A Dsysreg.h175 #define CP15_DCCMVAC(rr) p15, 0, rr, c7, c10, 1 /* Data cache clean by MVA PoC */
176 #define CP15_DCCSW(rr) p15, 0, rr, c7, c10, 2 /* Data cache clean by set/way */
225 #define CP15_PRRR(rr) p15, 0, rr, c10, c2, 0 /* Primary Region Remap Register */
226 #define CP15_MAIR0(rr) p15, 0, rr, c10, c2, 0 /* Memory Attribute Indirection Register 0 */
228 #define CP15_NMRR(rr) p15, 0, rr, c10, c2, 1 /* Normal Memory Remap Register */
229 #define CP15_MAIR1(rr) p15, 0, rr, c10, c2, 1 /* Memory Attribute Indirection Register 1 */
231 #define CP15_AMAIR0(rr) p15, 0, rr, c10, c3, 0 /* Auxiliary Memory Attribute Indirection Register …
232 #define CP15_AMAIR1(rr) p15, 0, rr, c10, c3, 1 /* Auxiliary Memory Attribute Indirection Register …
234 #define CP15_HMAIR0(rr) p15, 4, rr, c10, c2, 0 /* Hyp Memory Attribute Indirection Register 0 */
235 #define CP15_HMAIR1(rr) p15, 4, rr, c10, c2, 1 /* Hyp Memory Attribute Indirection Register 1 */
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Dtanpi.c14 float64x2_t c0, c2, c4, c6, c8, c10, c12; member
26 .c9 = 0x1.3a6d958cdefaep19, .c10 = V2 (0x1.927896baee627p21),
60 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, r2, c_9_11, 1); in V_NAME_D1()
H A Dasin.c14 float64x2_t c0, c2, c4, c6, c8, c10; member
26 .c10 = V2 (-0x1.6602748120927p-7), .c11 = 0x1.cfa0dd1f9478p-6,
105 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, z2, c911, 1); in V_NAME_D1()
H A Dv_log1p_inline.h15 float64x2_t c0, c2, c4, c6, c8, c10, c12, c14, c16; member
30 .c10 = V2 (-0x1.554d2680a3ff2p-4), .c11 = 0x1.3b4c54d487455p-4, \
55 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, m, c911, 1); in eval_poly()
H A Datan.c14 float64x2_t c0, c2, c4, c6, c8, c10, c12, c14, c16, c18; member
25 .c10 = V2 (-0x1.5d30140ae5e99p-5), .c11 = 0x1.338e31eb2fbbcp-5,
102 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, z2, c911, 1); in V_NAME_D1()
H A Dv_expm1_inline.h19 double c1, c3, c5, c7, c9, c10; member
30 .c9 = 0x1.af5eedae67435p-26, .c10 = 0x1.1f143d060a28ap-29, \
H A Datan2.c14 float64x2_t c0, c2, c4, c6, c8, c10, c12, c14, c16, c18; member
31 .c10 = V2 (-0x1.5d30140ae5e99p-5),
132 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, z2, c911, 1); in V_NAME_D2()
H A Dasinh.c21 float64x2_t c0, c2, c4, c6, c8, c10, c12, c14, c16, c17; member
43 .c10 = V2 (-0x1.b90c7099dd397p-8),
199 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, x2, c911, 1); in V_NAME_D1()
/freebsd/contrib/arm-optimized-routines/math/aarch64/sve/
H A Dtanpi.c14 double c0, c2, c4, c6, c8, c10, c12; member
26 .c9 = 0x1.3a6d958cdefaep19, .c10 = 0x1.927896baee627p21,
60 svfloat64_t p1011 = svmla_lane (sv_f64 (d->c10), r2, c_9_11, 1); in SV_NAME_D1()
/freebsd/usr.bin/mkimg/tests/
H A Dimg-63x255-4096-apm.vhd.hex21 00000c10 41 70 70 6c 65 00 00 00 00 00 00 00 00 00 00 00 |Apple...........|
52 00628c10 00 00 00 00 00 00 02 00 01 23 45 67 2a 69 6d 67 |.........#Eg*img|
H A Dimg-63x255-512-apm.vhd.hex21 00000c10 41 70 70 6c 65 00 00 00 00 00 00 00 00 00 00 00 |Apple...........|
52 00628c10 00 00 00 00 00 00 02 00 01 23 45 67 2a 69 6d 67 |.........#Eg*img|
H A Dimg-63x255-512-bsd.vhd.hex20 00000c10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
48 00628c10 00 00 00 00 00 00 02 00 01 23 45 67 2a 69 6d 67 |.........#Eg*img|
H A Dimg-63x255-4096-bsd.vhd.hex20 00000c10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
48 00628c10 00 00 00 00 00 00 02 00 01 23 45 67 2a 69 6d 67 |.........#Eg*img|
H A Dimg-1x1-4096-apm.vhd.hex21 00000c10 41 70 70 6c 65 00 00 00 00 00 00 00 00 00 00 00 |Apple...........|
H A Dimg-1x1-512-apm.vhd.hex21 00000c10 41 70 70 6c 65 00 00 00 00 00 00 00 00 00 00 00 |Apple...........|
H A Dimg-1x1-4096-bsd.vhd.hex20 00000c10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
H A Dimg-1x1-512-bsd.vhd.hex20 00000c10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
H A Dimg-1x1-512-gpt.vhd.hex25 00000c10 9e bd 19 f8 00 00 00 00 01 00 00 00 00 00 00 00 |................|
H A Dimg-63x255-512-gpt.vhd.hex25 00000c10 41 28 3e 1b 00 00 00 00 01 00 00 00 00 00 00 00 |A(>.............|
H A Dimg-1x1-4096-gpt.vhd.hex25 00000c10 11 1d d2 4b 00 00 00 00 01 00 00 00 00 00 00 00 |...K............|
H A Dimg-63x255-4096-gpt.vhd.hex25 00000c10 ce 88 f5 a8 00 00 00 00 01 00 00 00 00 00 00 00 |................|
/freebsd/sys/arm/arm/
H A Dcpufunc_asm_arm11x6.S79 mcreq p15, 0, r0, c7, c10, 4 /* data sync barrier */
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/
H A Dsync-ops.h20 #define DMB mcr p15, #0, r0, c7, c10, #5
/freebsd/crypto/openssl/test/
H A Dsanitytest.c40 a10, b10, c10, d10, e10, f10, g10, h10, i10, j10, in test_sanity_enum_size() enumerator

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