/freebsd/sys/arm64/coresight/ |
H A D | coresight_etm4x.c | 87 bus_write_4(sc->res, TRCCONFIGR, reg); in etm_prepare() 90 bus_write_4(sc->res, TRCEVENTCTL0R, 0); in etm_prepare() 91 bus_write_4(sc->res, TRCEVENTCTL1R, 0); in etm_prepare() 94 bus_write_4(sc->res, TRCSTALLCTLR, 0); in etm_prepare() 97 bus_write_4(sc->res, TRCSYNCPR, TRCSYNCPR_4K); in etm_prepare() 100 bus_write_4(sc->res, TRCTRACEIDR, event->etm.trace_id); in etm_prepare() 106 bus_write_4(sc->res, TRCTSCTLR, 0); in etm_prepare() 124 bus_write_4(sc->res, TRCVICTLR, reg); in etm_prepare() 138 bus_write_4(sc->res, TRCACATR(i), reg); in etm_prepare() 143 bus_write_4(sc->res, TRCVIIECTLR, reg); in etm_prepare() [all …]
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H A D | coresight_tmc.c | 70 bus_write_4(sc->res, TMC_CTL, CTL_TRACECAPTEN); in tmc_start() 94 bus_write_4(sc->res, TMC_CTL, reg); in tmc_stop() 115 bus_write_4(sc->res, TMC_MODE, MODE_HW_FIFO); in tmc_configure_etf() 116 bus_write_4(sc->res, TMC_FFCR, FFCR_EN_FMT | FFCR_EN_TI); in tmc_configure_etf() 149 bus_write_4(sc->res, TMC_MODE, MODE_CIRCULAR_BUFFER); in tmc_configure_etr() 160 bus_write_4(sc->res, TMC_AXICTL, reg); in tmc_configure_etr() 164 bus_write_4(sc->res, TMC_FFCR, reg); in tmc_configure_etr() 166 bus_write_4(sc->res, TMC_TRG, 8); in tmc_configure_etr() 168 bus_write_4(sc->res, TMC_DBALO, event->etr.low); in tmc_configure_etr() 169 bus_write_4(sc->res, TMC_DBAHI, event->etr.high); in tmc_configure_etr() [all …]
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H A D | coresight_replicator.c | 58 bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK); in replicator_init() 73 bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0x00); in replicator_enable() 74 bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0xff); in replicator_enable() 76 bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0xff); in replicator_enable() 77 bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0x00); in replicator_enable() 91 bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0xff); in replicator_disable() 92 bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0xff); in replicator_disable()
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H A D | coresight_cpu_debug.c | 83 bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK); in debug_init() 86 bus_write_4(sc->res, EDOSLAR, 0); in debug_init() 95 bus_write_4(sc->res, EDPRCR, reg); in debug_init()
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H A D | coresight_funnel.c | 69 bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK); in funnel_init() 90 bus_write_4(sc->res, FUNNEL_FUNCTL, reg); in funnel_enable() 108 bus_write_4(sc->res, FUNNEL_FUNCTL, reg); in funnel_disable()
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/freebsd/sys/arm64/rockchip/ |
H A D | rk_otp.c | 96 bus_write_4(sc->mem, OTPC_SBPI_INT_STATUS, status); in rk_otp_wait() 104 bus_write_4(sc->mem, OTPC_SBPI_CTRL, in rk_otp_ecc() 106 bus_write_4(sc->mem, OTPC_SBPI_CMD_VALID_PRE, in rk_otp_ecc() 108 bus_write_4(sc->mem, OTPC_SBPI_CMD0_OFFSET, in rk_otp_ecc() 111 bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_ENABLE); in rk_otp_ecc() 113 bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_DISABLE); in rk_otp_ecc() 114 bus_write_4(sc->mem, OTPC_SBPI_CTRL, SBPI_ENABLE_MASK | SBPI_ENABLE); in rk_otp_ecc() 134 bus_write_4(sc->mem, OTPC_USER_CTRL, OTPC_USER | OTPC_USER_MASK); in rk_otp_read() 137 bus_write_4(sc->mem, OTPC_USER_ADDR, in rk_otp_read() 139 bus_write_4(sc->mem, OTPC_USER_ENABLE, in rk_otp_read() [all …]
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H A D | rk3568_combphy.c | 179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable() 183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable() 207 bus_write_4(sc->mem, PHYREG32, in rk3568_combphy_enable() 226 bus_write_4(sc->mem, PHYREG32, in rk3568_combphy_enable() 231 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable() 235 bus_write_4(sc->mem, PHYREG33, in rk3568_combphy_enable() 240 bus_write_4(sc->mem, PHYREG12, PHYREG12_PLL_LPF_ADJ_VALUE); in rk3568_combphy_enable() 243 bus_write_4(sc->mem, PHYREG6, in rk3568_combphy_enable() 248 bus_write_4(sc->mem, PHYREG18, PHYREG18_PLL_LOOP); in rk3568_combphy_enable() 251 bus_write_4(sc->mem, PHYREG11, PHYREG11_SU_TRIM_0_7); in rk3568_combphy_enable() [all …]
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H A D | rk3568_pcie.c | 181 bus_write_4(sc->apb_res, PCIE_CLIENT_HOT_RESET_CTRL, in rk3568_pcie_init_soc() 183 bus_write_4(sc->apb_res, PCIE_CLIENT_GENERAL_CON, in rk3568_pcie_init_soc() 191 bus_write_4(sc->apb_res, PCIE_CLIENT_GENERAL_CON, in rk3568_pcie_init_soc() 219 bus_write_4(sc->apb_res, PCIE_CLIENT_INTR_MASK_MSG_RX, 0x7fff0000); in rk3568_pcie_init_soc() 222 bus_write_4(sc->apb_res, PCIE_CLIENT_INTR_MASK_LEGACY, 0x00ff0000); in rk3568_pcie_init_soc() 225 bus_write_4(sc->apb_res, PCIE_CLIENT_INTR_MASK_ERR, 0x0fff0000); in rk3568_pcie_init_soc()
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/freebsd/sys/dev/sdhci/ |
H A D | sdhci_fdt_rockchip.c | 179 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 181 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 183 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 185 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 190 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 193 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 195 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 206 bus_write_4(sc->mem_res[slot->num], RK3568_EMMC_ATCTRL, in sdhci_fdt_rockchip_set_clock() 208 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() 211 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock() [all …]
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H A D | sdhci_xenon.c | 116 bus_write_4(sc->mem_res, off, val); in sdhci_xenon_write_4() 213 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); in sdhci_xenon_phy_init() 217 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); in sdhci_xenon_phy_init() 249 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL, reg); in sdhci_xenon_phy_set() 255 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1, reg); in sdhci_xenon_phy_set() 263 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); in sdhci_xenon_phy_set() 273 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2, reg); in sdhci_xenon_phy_set() 278 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg); in sdhci_xenon_phy_set() 297 bus_write_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL, reg); in sdhci_xenon_phy_set() 302 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg); in sdhci_xenon_phy_set() [all …]
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/freebsd/sys/dev/adlink/ |
H A D | adlink.c | 139 bus_write_4(sc->res[0], 0x38, u | 0x003f4000); in adlink_intr() 157 bus_write_4(sc->res[0], 0x24, pg->phys); in adlink_intr() 158 bus_write_4(sc->res[0], 0x28, sc->p0->chunksize); in adlink_intr() 279 bus_write_4(sc->res[0], 0x38, 0x00004000); in adlink_ioctl() 282 bus_write_4(sc->res[1], 0x00, 1); in adlink_ioctl() 285 bus_write_4(sc->res[1], 0x04, sc->p0->divisor); in adlink_ioctl() 288 bus_write_4(sc->res[1], 0x08, 0); in adlink_ioctl() 291 bus_write_4(sc->res[1], 0x0c, 0); in adlink_ioctl() 294 bus_write_4(sc->res[1], 0x10, 0); in adlink_ioctl() 297 bus_write_4(sc->res[1], 0x18, 3); in adlink_ioctl() [all …]
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/freebsd/sys/powerpc/powermac/ |
H A D | atibl.c | 178 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); in atibl_pll_rreg() 180 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); in atibl_pll_rreg() 195 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val); in atibl_pll_wreg() 201 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); in atibl_pll_wreg() 203 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); in atibl_pll_wreg() 226 bus_write_4(sc->sc_memr, RADEON_DISP_PWR_MAN, disp_pwr_reg); in atibl_setlevel() 229 bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in atibl_setlevel() 231 bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in atibl_setlevel() 242 bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in atibl_setlevel() 249 bus_write_4(s in atibl_setlevel() [all...] |
H A D | macio.c | 418 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); in macio_attach() 421 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); in macio_attach() 424 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); in macio_attach() 427 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); in macio_attach() 440 bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1); in macio_attach() 741 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); in macio_enable_wireless() 751 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); in macio_enable_wireless() 759 bus_write_4(sc->sc_memr, 0x1c000, 0); in macio_enable_wireless() 762 bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); in macio_enable_wireless() 765 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); in macio_enable_wireless() [all …]
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/freebsd/sys/powerpc/mpc85xx/ |
H A D | fsl_diu.c | 206 bus_write_4(sc->res[0], DIU_INT_STATUS, reg); in diu_intr() 248 bus_write_4(sc->res[0], DIU_DIU_MODE, reg); in diu_init() 256 bus_write_4(sc->res[0], DIU_GAMMA, vtophys(sc->sc_gamma)); in diu_init() 257 bus_write_4(sc->res[0], DIU_CURSOR, vtophys(sc->sc_cursor)); in diu_init() 258 bus_write_4(sc->res[0], DIU_CURS_POS, 0); in diu_init() 262 bus_write_4(sc->res[0], DIU_DISP_SIZE, reg); in diu_init() 267 bus_write_4(sc->res[0], DIU_HSYN_PARA, reg); in diu_init() 272 bus_write_4(sc->res[0], DIU_VSYN_PARA, reg); in diu_init() 274 bus_write_4(sc->res[0], DIU_BGND, 0); in diu_init() 277 bus_write_4(sc->res[0], DIU_INT_MASK, 0x3f); in diu_init() [all …]
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/freebsd/sys/arm64/qualcomm/ |
H A D | qcom_gcc.c | 76 bus_write_4(sc->res, GCC_QDSS_BCR, GCC_QDSS_BCR_BLK_ARES); in qcom_qdss_enable() 79 bus_write_4(sc->res, GCC_QDSS_CFG_AHB_CBCR, AHB_CBCR_CLK_ENABLE); in qcom_qdss_enable() 82 bus_write_4(sc->res, GCC_QDSS_DAP_CBCR, DAP_CBCR_CLK_ENABLE); in qcom_qdss_enable() 85 bus_write_4(sc->res, GCC_QDSS_ETR_USB_CBCR, ETR_USB_CBCR_CLK_ENABLE); in qcom_qdss_enable() 88 bus_write_4(sc->res, GCC_QDSS_BCR, 0); in qcom_qdss_enable()
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/freebsd/sys/dev/acpica/ |
H A D | acpi_hpet.c | 191 bus_write_4(sc->mem_res, HPET_CONFIG, val); in hpet_enable() 201 bus_write_4(sc->mem_res, HPET_CONFIG, val); in hpet_disable() 225 bus_write_4(sc->mem_res, HPET_ISR, 1 << t->num); in hpet_start() 232 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), in hpet_start() 234 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_start() 236 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_start() 240 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), in hpet_start() 242 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_start() 263 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps); in hpet_stop() 294 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_intr_single() [all …]
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/freebsd/sys/arm64/broadcom/brcmmdio/ |
H A D | mdio_mux_iproc.c | 161 bus_write_4(sc->reg_base, MDIO_PARAM_OFFSET, param); in brcm_iproc_switch() 202 bus_write_4(sc->reg_base, MDIO_CTRL_OFFSET, 0); in brcm_iproc_mdio_op() 214 bus_write_4(sc->reg_base, MDIO_PARAM_OFFSET, param); in brcm_iproc_mdio_op() 216 bus_write_4(sc->reg_base, MDIO_ADDR_OFFSET, reg); in brcm_iproc_mdio_op() 218 bus_write_4(sc->reg_base, MDIO_CTRL_OFFSET, op); in brcm_iproc_mdio_op() 239 bus_write_4(sc->reg_base, MDIO_SCAN_CTRL_OFFSET, val); in brcm_iproc_config() 249 bus_write_4(sc->reg_base, MDIO_RATE_ADJ_EXT_OFFSET, val); in brcm_iproc_config() 250 bus_write_4(sc->reg_base, MDIO_RATE_ADJ_INT_OFFSET, val); in brcm_iproc_config()
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/freebsd/sys/dev/gpio/ |
H A D | qoriq_gpio.c | 116 bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); in qoriq_gpio_pin_configure() 121 bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); in qoriq_gpio_pin_configure() 127 bus_write_4(sc->sc_mem, GPIO_GPODR, reg); in qoriq_gpio_pin_configure() 188 bus_write_4(sc->sc_mem, GPIO_GPDAT, outvals); in qoriq_gpio_pin_set() 223 bus_write_4(sc->sc_mem, GPIO_GPDAT, val); in qoriq_gpio_pin_toggle() 263 bus_write_4(sc->sc_mem, GPIO_GPDAT, in qoriq_gpio_pin_access_32() 313 bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); in qoriq_gpio_pin_config_32() 316 bus_write_4(sc->sc_mem, GPIO_GPODR, reg); in qoriq_gpio_pin_config_32() 383 bus_write_4(sc->sc_mem, GPIO_GPIBE, 0xffffffff); in qoriq_gpio_attach()
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/freebsd/sys/arm/freescale/imx/ |
H A D | imx6_usbphy.c | 149 bus_write_4(sc->mem_res, CTRL_SET_REG, CTRL_SFTRST); in usbphy_attach() 150 bus_write_4(sc->mem_res, CTRL_CLR_REG, CTRL_SFTRST | CTRL_CLKGATE); in usbphy_attach() 153 bus_write_4(sc->mem_res, CTRL_SET_REG, in usbphy_attach() 157 bus_write_4(sc->mem_res, PWD_REG, 0); in usbphy_attach()
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/freebsd/sys/arm/annapurna/alpine/ |
H A D | alpine_ccu.c | 106 bus_write_4(sc->res, AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET, 1); in al_ccu_attach() 107 bus_write_4(sc->res, AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET, 1); in al_ccu_attach() 110 bus_write_4(sc->res, AL_CCU_SPECULATION_CONTROL_OFFSET, 7); in al_ccu_attach()
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/freebsd/sys/arm/broadcom/bcm2835/ |
H A D | bcm2835_dma.c | 187 bus_write_4(sc->sc_mem, BCM_DMA_CS(ch), 0); in bcm_dma_reset() 199 bus_write_4(sc->sc_mem, BCM_DMA_CBNEXT(ch), 0); in bcm_dma_reset() 202 bus_write_4(sc->sc_mem, BCM_DMA_CS(ch), in bcm_dma_reset() 207 bus_write_4(sc->sc_mem, BCM_DMA_CBADDR(ch), 0); in bcm_dma_reset() 208 bus_write_4(sc->sc_mem, BCM_DMA_CBNEXT(ch), 0); in bcm_dma_reset() 311 bus_write_4(sc->sc_mem, BCM_DMA_CS(i), CS_RESET); in bcm_dma_init() 585 bus_write_4(sc->sc_mem, BCM_DMA_CBADDR(ch), in bcm_dma_start() 587 bus_write_4(sc->sc_mem, BCM_DMA_CS(ch), CS_ACTIVE); in bcm_dma_start() 650 bus_write_4(sc->sc_mem, BCM_DMA_DEBUG(ch->ch), in bcm_dma_intr() 657 bus_write_4(sc->sc_mem, BCM_DMA_CS(ch->ch), in bcm_dma_intr()
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/freebsd/sys/dev/xilinx/ |
H A D | xlnx_pcib.c | 118 bus_write_4(sc->res, XLNX_PCIE_RPERRFRR, ~0U); in xlnx_pcib_clear_err_interrupts() 192 bus_write_4(sc->res, XLNX_PCIE_IDR, val); in xlnx_pcib_intr() 219 bus_write_4(sc->res, msireg, (1 << i)); in xlnx_pcib_handle_msi_intr() 290 bus_write_4(sc->res[0], XLNX_PCIE_IMR, 0); in xlnx_pcib_init() 294 bus_write_4(sc->res[0], XLNX_PCIE_IDR, reg); in xlnx_pcib_init() 300 bus_write_4(sc->res[0], XLNX_PCIE_RPMSIBR1, (addr >> 32)); in xlnx_pcib_init() 301 bus_write_4(sc->res[0], XLNX_PCIE_RPMSIBR2, (addr >> 0)); in xlnx_pcib_init() 306 bus_write_4(sc->res[0], XLNX_PCIE_RPSCR, reg); in xlnx_pcib_init() 326 bus_write_4(sc->res[0], XLNX_PCIE_IMR, reg); in xlnx_pcib_init() 698 bus_write_4(sc->res, msireg, reg); in xlnx_pcib_msi_mask()
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/freebsd/sys/arm64/apple/ |
H A D | apple_aic.c | 412 bus_write_4(sc->sc_mem, AIC_TARGET_CPU(irq), in apple_aic_setup_intr() 444 bus_write_4(sc->sc_mem, AIC_MASK_CLEAR(irq), AIC_IRQ_MASK(irq)); in apple_aic_enable_intr() 469 bus_write_4(sc->sc_mem, AIC_MASK_SET(irq), AIC_IRQ_MASK(irq)); in apple_aic_disable_intr() 494 bus_write_4(sc->sc_mem, AIC_SW_CLEAR(irq), AIC_IRQ_MASK(irq)); in apple_aic_post_filter() 495 bus_write_4(sc->sc_mem, AIC_MASK_CLEAR(irq), AIC_IRQ_MASK(irq)); in apple_aic_post_filter() 515 bus_write_4(sc->sc_mem, AIC_SW_CLEAR(irq), AIC_IRQ_MASK(irq)); in apple_aic_pre_ithread() 531 bus_write_4(sc->sc_mem, AIC_MASK_CLEAR(irq), AIC_IRQ_MASK(irq)); in apple_aic_post_ithread() 662 bus_write_4(sc->sc_mem, AIC_TARGET_CPU(irq), in apple_aic_bind_intr() 668 bus_write_4(sc->sc_mem, AIC_TARGET_CPU(irq), targets); in apple_aic_bind_intr() 747 bus_write_4(sc->sc_mem, AIC_IPI_MASK_SET, AIC_IPI_SELF | AIC_IPI_OTHER); in apple_aic_init_secondary()
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/freebsd/sys/dev/qlxgb/ |
H A D | qla_reg.h | 233 bus_write_4((ha->pci_reg), reg, val);\ 240 bus_write_4((ha->pci_reg), reg, val);\ 245 bus_write_4((ha->pci_reg), off, val);\
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/freebsd/sys/powerpc/powerpc/ |
H A D | openpic.c | 437 bus_write_4(sc->sc_memr, OPENPIC_IPI_VECTOR(i), sc->sc_saved_ipis[i]); in openpic_resume() 441 bus_write_4(sc->sc_memr, OPENPIC_PCPU_TPR(i), sc->sc_saved_prios[i]); in openpic_resume() 445 bus_write_4(sc->sc_memr, OPENPIC_TCNT(i), sc->sc_saved_timers[i].tcnt); in openpic_resume() 446 bus_write_4(sc->sc_memr, OPENPIC_TBASE(i), sc->sc_saved_timers[i].tbase); in openpic_resume() 447 bus_write_4(sc->sc_memr, OPENPIC_TVEC(i), sc->sc_saved_timers[i].tvec); in openpic_resume() 448 bus_write_4(sc->sc_memr, OPENPIC_TDST(i), sc->sc_saved_timers[i].tdst); in openpic_resume() 452 bus_write_4(sc->sc_memr, OPENPIC_SRC_VECTOR(i), sc->sc_saved_vectors[i]); in openpic_resume()
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