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Searched refs:bus_write_4 (Results 1 – 25 of 295) sorted by relevance

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/freebsd/sys/arm64/coresight/
H A Dcoresight_etm4x.c87 bus_write_4(sc->res, TRCCONFIGR, reg); in etm_prepare()
90 bus_write_4(sc->res, TRCEVENTCTL0R, 0); in etm_prepare()
91 bus_write_4(sc->res, TRCEVENTCTL1R, 0); in etm_prepare()
94 bus_write_4(sc->res, TRCSTALLCTLR, 0); in etm_prepare()
97 bus_write_4(sc->res, TRCSYNCPR, TRCSYNCPR_4K); in etm_prepare()
100 bus_write_4(sc->res, TRCTRACEIDR, event->etm.trace_id); in etm_prepare()
106 bus_write_4(sc->res, TRCTSCTLR, 0); in etm_prepare()
124 bus_write_4(sc->res, TRCVICTLR, reg); in etm_prepare()
138 bus_write_4(sc->res, TRCACATR(i), reg); in etm_prepare()
143 bus_write_4(sc->res, TRCVIIECTLR, reg); in etm_prepare()
[all …]
H A Dcoresight_tmc.c70 bus_write_4(sc->res, TMC_CTL, CTL_TRACECAPTEN); in tmc_start()
94 bus_write_4(sc->res, TMC_CTL, reg); in tmc_stop()
115 bus_write_4(sc->res, TMC_MODE, MODE_HW_FIFO); in tmc_configure_etf()
116 bus_write_4(sc->res, TMC_FFCR, FFCR_EN_FMT | FFCR_EN_TI); in tmc_configure_etf()
149 bus_write_4(sc->res, TMC_MODE, MODE_CIRCULAR_BUFFER); in tmc_configure_etr()
160 bus_write_4(sc->res, TMC_AXICTL, reg); in tmc_configure_etr()
164 bus_write_4(sc->res, TMC_FFCR, reg); in tmc_configure_etr()
166 bus_write_4(sc->res, TMC_TRG, 8); in tmc_configure_etr()
168 bus_write_4(sc->res, TMC_DBALO, event->etr.low); in tmc_configure_etr()
169 bus_write_4(sc->res, TMC_DBAHI, event->etr.high); in tmc_configure_etr()
[all …]
H A Dcoresight_replicator.c58 bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK); in replicator_init()
73 bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0x00); in replicator_enable()
74 bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0xff); in replicator_enable()
76 bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0xff); in replicator_enable()
77 bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0x00); in replicator_enable()
91 bus_write_4(sc->res, REPLICATOR_IDFILTER0, 0xff); in replicator_disable()
92 bus_write_4(sc->res, REPLICATOR_IDFILTER1, 0xff); in replicator_disable()
/freebsd/sys/dev/dpaa/
H A Dfman_port.c312 bus_write_4(sc->sc_mem, FMBM_TFP, 0x00001013); in fman_port_config()
411 bus_write_4(sc->sc_mem, FMBM_REBMPI(i), in fman_port_init_bmi_rx()
417 bus_write_4(sc->sc_mem, FMBM_REBMPI(i), 0); in fman_port_init_bmi_rx()
420 bus_write_4(sc->sc_mem, FMBM_RDA, RDA_WOPT); in fman_port_init_bmi_rx()
422 bus_write_4(sc->sc_mem, FMBM_RFCA, in fman_port_init_bmi_rx()
425 bus_write_4(sc->sc_mem, FMBM_RFPNE, in fman_port_init_bmi_rx()
427 bus_write_4(sc->sc_mem, FMBM_RFENE, in fman_port_init_bmi_rx()
430 bus_write_4(sc->sc_mem, FMBM_RFQID, sc->sc_default_fqid); in fman_port_init_bmi_rx()
431 bus_write_4(sc->sc_mem, FMBM_REFQID, sc->sc_err_fqid); in fman_port_init_bmi_rx()
434 bus_write_4(sc->sc_mem, FMBM_RETH, RETH_ETHE); in fman_port_init_bmi_rx()
[all …]
H A Dfman.c387 bus_write_4(sc->mem_res, FM_RSTC, FM_RSTC_FM_RESET); in fman_reset()
424 bus_write_4(sc->mem_res, FM_RSTC, FM_RSTC_FM_RESET); in fman_reset()
450 bus_write_4(sc->mem_res, IRAM_ADDR, IADD_AIE); in fman_clear_iram()
458 bus_write_4(sc->mem_res, IRAM_DATA, 0xffffffff); in fman_clear_iram()
460 bus_write_4(sc->mem_res, IRAM_ADDR, sc->iram_size - 4); in fman_clear_iram()
480 bus_write_4(sc->mem_res, FMDM_SR, reg | SR_BER); in fman_dma_init()
483 bus_write_4(sc->mem_res, FMDM_MR, reg); in fman_dma_init()
492 bus_write_4(sc->mem_res, FMDM_EBCR, reg); in fman_dma_init()
503 bus_write_4(sc->mem_res, FMBM_CFG1, reg); in fman_bmi_init()
508 bus_write_4(sc->mem_res, FMBM_IEVR, in fman_bmi_init()
[all …]
H A Dbman.c120 bus_write_4(sc->sc_rres, BMAN_ERR_ISR, isr); in bman_isr()
152 bus_write_4(sc->sc_rres, BMAN_FBPR_BARE, pa >> 32); in bman_set_memory()
153 bus_write_4(sc->sc_rres, BMAN_FBPR_BAR, pa & 0xffffffff); in bman_set_memory()
154 bus_write_4(sc->sc_rres, BMAN_FBPR_AR, ilog2(size) - 1); in bman_set_memory()
191 bus_write_4(sc->sc_rres, BMAN_LIODNR, 0); in bman_attach()
200 bus_write_4(sc->sc_rres, FBPR_FP_LWIT, (bp_size / 8) / 20); in bman_attach()
203 bus_write_4(sc->sc_rres, BMAN_ERR_ISR, 0xffffffff); in bman_attach()
204 bus_write_4(sc->sc_rres, BMAN_ERR_IER, 0xffffffff); in bman_attach()
205 bus_write_4(sc->sc_rres, BMAN_ERR_ISDR, 0); in bman_attach()
302 bus_write_4(sc->sc_rres, BMAN_POOL_SWDET(bp->bpid), in bman_pool_create()
[all …]
H A Dqman.c225 bus_write_4(sc->sc_rres, QMAN_ERR_ISR, isr); in qman_isr()
260 bus_write_4(sc->sc_rres, off, pa >> 32); in qman_set_memory()
261 bus_write_4(sc->sc_rres, off + 4, (uint32_t)pa); in qman_set_memory()
262 bus_write_4(sc->sc_rres, off + 0x10, AR_EN | (ilog2(size) - 1)); in qman_set_memory()
282 bus_write_4(sc->sc_rres, QMAN_MCP0, 8); in qman_setup_pfdr()
283 bus_write_4(sc->sc_rres, QMAN_MCP1, npfdr - 9); in qman_setup_pfdr()
284 bus_write_4(sc->sc_rres, QMAN_MCR, MCR_INIT_PFDR); in qman_setup_pfdr()
361 bus_write_4(sc->sc_rres, QMAN_PFDR_CFG, 64); in qman_attach()
364 bus_write_4(sc->sc_rres, QMAN_ERR_ISR, 0xffffffff); in qman_attach()
365 bus_write_4(sc->sc_rres, QMAN_ERR_IER, 0xffffffff); in qman_attach()
[all …]
H A Dif_memac.c116 bus_write_4(sc->sc_base.sc_mem, MEMAC_COMMAND_CONFIG, reg); in memac_fm_mac_init()
123 bus_write_4(sc->sc_base.sc_mem, MEMAC_COMMAND_CONFIG, in memac_fm_mac_init()
145 bus_write_4(sc->sc_base.sc_mem, MEMAC_IF_MODE, reg); in memac_fm_mac_init()
165 bus_write_4(sc->sc_base.sc_mem, MEMAC_REG_MAXFRM, mtu); in memac_set_mtu()
189 bus_write_4(sc->sc_base.sc_mem, HASHTABLE_CTRL, hash | CTRL_MCAST); in memac_hash_maddr()
200 bus_write_4(sc->sc_base.sc_mem, in memac_setup_multicast()
205 bus_write_4(sc->sc_base.sc_mem, in memac_setup_multicast()
221 bus_write_4(sc->sc_base.sc_mem, MEMAC_COMMAND_CONFIG, in memac_setup_promisc()
234 bus_write_4(regs, MEMAC_COMMAND_CONFIG, reg); in memac_if_graceful_stop()
238 bus_write_4(regs, MEMAC_COMMAND_CONFIG, reg); in memac_if_graceful_stop()
[all …]
H A Dif_dtsec.c124 bus_write_4(sc->sc_base.sc_mem, DTSEC_REG_MAXFRM, mtu); in dtsec_set_mtu()
150 bus_write_4(sc->sc_base.sc_mem, DTSEC_REG_GADDR(i), 0xFFFFFFFF); in dtsec_setup_multicast()
151 bus_write_4(sc->sc_base.sc_mem, DTSEC_RCTRL, in dtsec_setup_multicast()
156 bus_write_4(sc->sc_base.sc_mem, DTSEC_RCTRL, in dtsec_setup_multicast()
161 bus_write_4(sc->sc_base.sc_mem, DTSEC_REG_GADDR(i), in dtsec_setup_multicast()
168 bus_write_4(sc->sc_base.sc_mem, DTSEC_RCTRL, in dtsec_if_graceful_stop()
175 bus_write_4(sc->sc_base.sc_mem, DTSEC_TCTRL, in dtsec_if_graceful_stop()
182 bus_write_4(sc->sc_base.sc_mem, DTSEC_RCTRL, in dtsec_if_graceful_start()
189 bus_write_4(sc->sc_base.sc_mem, DTSEC_TCTRL, in dtsec_if_graceful_start()
321 bus_write_4(sc->sc_base.sc_mem, DTSEC_MACSTNADDR1, reg); in dtsec_if_set_macaddr()
[all …]
H A Dqman_portals.c154 bus_write_4(regs, QCSP_CFG, reg); in qman_eqcr_init()
165 bus_write_4(regs, QCSP_DQRR_SDQCR, in qman_dqrr_init()
169 bus_write_4(regs, QCSP_DQRR_VDQCR, 0); in qman_dqrr_init()
170 bus_write_4(regs, QCSP_DQRR_PDQCR, 0); in qman_dqrr_init()
179 bus_write_4(regs, QCSP_CFG, reg); in qman_dqrr_init()
211 bus_write_4(sc->sc_base.sc_mres[1], QCSP_IER, in qman_portal_attach()
214 bus_write_4(sc->sc_base.sc_mres[1], QCSP_ISDR, 0); in qman_portal_attach()
307 bus_write_4(sc->sc_base.sc_mres[1], QCSP_DQRR_CI_CINH, ci); in qman_portal_loop_dqrr()
329 bus_write_4(sc->sc_base.sc_mres[1], QCSP_ISR, isr); in qman_portal_loop_rings()
378 bus_write_4(sc->sc_base.sc_mres[1], QCSP_DQRR_SDQCR, reg); in qman_portal_static_dequeue_channel()
[all …]
/freebsd/sys/arm64/rockchip/
H A Drk_otp.c96 bus_write_4(sc->mem, OTPC_SBPI_INT_STATUS, status); in rk_otp_wait()
104 bus_write_4(sc->mem, OTPC_SBPI_CTRL, in rk_otp_ecc()
106 bus_write_4(sc->mem, OTPC_SBPI_CMD_VALID_PRE, in rk_otp_ecc()
108 bus_write_4(sc->mem, OTPC_SBPI_CMD0_OFFSET, in rk_otp_ecc()
111 bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_ENABLE); in rk_otp_ecc()
113 bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_DISABLE); in rk_otp_ecc()
114 bus_write_4(sc->mem, OTPC_SBPI_CTRL, SBPI_ENABLE_MASK | SBPI_ENABLE); in rk_otp_ecc()
134 bus_write_4(sc->mem, OTPC_USER_CTRL, OTPC_USER | OTPC_USER_MASK); in rk_otp_read()
137 bus_write_4(sc->mem, OTPC_USER_ADDR, in rk_otp_read()
139 bus_write_4(sc->mem, OTPC_USER_ENABLE, in rk_otp_read()
[all …]
H A Drk3568_combphy.c179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable()
183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable()
207 bus_write_4(sc->mem, PHYREG32, in rk3568_combphy_enable()
226 bus_write_4(sc->mem, PHYREG32, in rk3568_combphy_enable()
231 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable()
235 bus_write_4(sc->mem, PHYREG33, in rk3568_combphy_enable()
240 bus_write_4(sc->mem, PHYREG12, PHYREG12_PLL_LPF_ADJ_VALUE); in rk3568_combphy_enable()
243 bus_write_4(sc->mem, PHYREG6, in rk3568_combphy_enable()
248 bus_write_4(sc->mem, PHYREG18, PHYREG18_PLL_LOOP); in rk3568_combphy_enable()
251 bus_write_4(sc->mem, PHYREG11, PHYREG11_SU_TRIM_0_7); in rk3568_combphy_enable()
[all …]
/freebsd/sys/riscv/cvitek/
H A Dcvitek_restart.c84 bus_write_4(sc->reg, RTC_CTRL0_UNLOCK, RTC_CTRL0_UNLOCK_KEY); in cvitek_restart_shutdown_final()
85 bus_write_4(sc->reg, RTC_CTRL0, val); in cvitek_restart_shutdown_final()
119 bus_write_4(sc->reg, RTC_EN_SHDN_REQ, 0x1); in cvitek_restart_attach()
120 bus_write_4(sc->reg, RTC_EN_PWR_CYC_REQ, 0x1); in cvitek_restart_attach()
121 bus_write_4(sc->reg, RTC_EN_WARM_RST_REQ, 0x1); in cvitek_restart_attach()
138 bus_write_4(sc->reg, RTC_EN_SHDN_REQ, 0x0); in cvitek_restart_detach()
139 bus_write_4(sc->reg, RTC_EN_PWR_CYC_REQ, 0x0); in cvitek_restart_detach()
140 bus_write_4(sc->reg, RTC_EN_WARM_RST_REQ, 0x0); in cvitek_restart_detach()
/freebsd/sys/dev/sdhci/
H A Dsdhci_fdt_rockchip.c177 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
179 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
181 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
183 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
188 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
191 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
193 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
204 bus_write_4(sc->mem_res[slot->num], RK3568_EMMC_ATCTRL, in sdhci_fdt_rockchip_set_clock()
206 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
209 bus_write_4(sc->mem_res[slot->num], in sdhci_fdt_rockchip_set_clock()
[all …]
H A Dsdhci_xenon.c116 bus_write_4(sc->mem_res, off, val); in sdhci_xenon_write_4()
213 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); in sdhci_xenon_phy_init()
217 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); in sdhci_xenon_phy_init()
249 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL, reg); in sdhci_xenon_phy_set()
255 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1, reg); in sdhci_xenon_phy_set()
263 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg); in sdhci_xenon_phy_set()
273 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2, reg); in sdhci_xenon_phy_set()
278 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg); in sdhci_xenon_phy_set()
297 bus_write_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL, reg); in sdhci_xenon_phy_set()
302 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg); in sdhci_xenon_phy_set()
[all …]
H A Dsdhci_fdt_cvitek.c120 bus_write_4(res, CVI_CV181X_SDHCI_EMMC_CTRL, reg); in sdhci_fdt_cvitek_attach()
121 bus_write_4(res, CVI_CV181X_SDHCI_PHY_TX_RX_DLY, in sdhci_fdt_cvitek_attach()
123 bus_write_4(res, CVI_CV181X_SDHCI_PHY_CONFIG, in sdhci_fdt_cvitek_attach()
/freebsd/sys/dev/qcom_gcc/
H A Dqcom_gcc_msm8916_clock.c65 bus_write_4(sc->reg, GCC_QDSS_BCR, GCC_QDSS_BCR_BLK_ARES); in qcom_msm8916_qdss_enable()
68 bus_write_4(sc->reg, GCC_QDSS_CFG_AHB_CBCR, AHB_CBCR_CLK_ENABLE); in qcom_msm8916_qdss_enable()
71 bus_write_4(sc->reg, GCC_QDSS_DAP_CBCR, DAP_CBCR_CLK_ENABLE); in qcom_msm8916_qdss_enable()
74 bus_write_4(sc->reg, GCC_QDSS_ETR_USB_CBCR, ETR_USB_CBCR_CLK_ENABLE); in qcom_msm8916_qdss_enable()
77 bus_write_4(sc->reg, GCC_QDSS_BCR, 0); in qcom_msm8916_qdss_enable()
/freebsd/sys/dev/adlink/
H A Dadlink.c139 bus_write_4(sc->res[0], 0x38, u | 0x003f4000); in adlink_intr()
157 bus_write_4(sc->res[0], 0x24, pg->phys); in adlink_intr()
158 bus_write_4(sc->res[0], 0x28, sc->p0->chunksize); in adlink_intr()
279 bus_write_4(sc->res[0], 0x38, 0x00004000); in adlink_ioctl()
282 bus_write_4(sc->res[1], 0x00, 1); in adlink_ioctl()
285 bus_write_4(sc->res[1], 0x04, sc->p0->divisor); in adlink_ioctl()
288 bus_write_4(sc->res[1], 0x08, 0); in adlink_ioctl()
291 bus_write_4(sc->res[1], 0x0c, 0); in adlink_ioctl()
294 bus_write_4(sc->res[1], 0x10, 0); in adlink_ioctl()
297 bus_write_4(sc->res[1], 0x18, 3); in adlink_ioctl()
[all …]
/freebsd/sys/powerpc/powermac/
H A Datibl.c178 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); in atibl_pll_rreg()
180 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); in atibl_pll_rreg()
195 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val); in atibl_pll_wreg()
201 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); in atibl_pll_wreg()
203 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); in atibl_pll_wreg()
226 bus_write_4(sc->sc_memr, RADEON_DISP_PWR_MAN, disp_pwr_reg); in atibl_setlevel()
229 bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in atibl_setlevel()
231 bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in atibl_setlevel()
242 bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in atibl_setlevel()
249 bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in atibl_setlevel()
[all …]
/freebsd/sys/powerpc/mpc85xx/
H A Dfsl_diu.c206 bus_write_4(sc->res[0], DIU_INT_STATUS, reg); in diu_intr()
248 bus_write_4(sc->res[0], DIU_DIU_MODE, reg); in diu_init()
256 bus_write_4(sc->res[0], DIU_GAMMA, vtophys(sc->sc_gamma)); in diu_init()
257 bus_write_4(sc->res[0], DIU_CURSOR, vtophys(sc->sc_cursor)); in diu_init()
258 bus_write_4(sc->res[0], DIU_CURS_POS, 0); in diu_init()
262 bus_write_4(sc->res[0], DIU_DISP_SIZE, reg); in diu_init()
267 bus_write_4(sc->res[0], DIU_HSYN_PARA, reg); in diu_init()
272 bus_write_4(sc->res[0], DIU_VSYN_PARA, reg); in diu_init()
274 bus_write_4(sc->res[0], DIU_BGND, 0); in diu_init()
277 bus_write_4(sc->res[0], DIU_INT_MASK, 0x3f); in diu_init()
[all …]
/freebsd/sys/dev/acpica/
H A Dacpi_hpet.c188 bus_write_4(sc->mem_res, HPET_CONFIG, val); in hpet_enable()
198 bus_write_4(sc->mem_res, HPET_CONFIG, val); in hpet_disable()
222 bus_write_4(sc->mem_res, HPET_ISR, 1 << t->num); in hpet_start()
229 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), in hpet_start()
231 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_start()
233 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_start()
237 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), in hpet_start()
239 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), in hpet_start()
260 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps); in hpet_stop()
291 bus_write_4(s in hpet_intr_single()
[all...]
/freebsd/sys/arm64/broadcom/brcmmdio/
H A Dmdio_mux_iproc.c161 bus_write_4(sc->reg_base, MDIO_PARAM_OFFSET, param); in brcm_iproc_switch()
202 bus_write_4(sc->reg_base, MDIO_CTRL_OFFSET, 0); in brcm_iproc_mdio_op()
214 bus_write_4(sc->reg_base, MDIO_PARAM_OFFSET, param); in brcm_iproc_mdio_op()
216 bus_write_4(sc->reg_base, MDIO_ADDR_OFFSET, reg); in brcm_iproc_mdio_op()
218 bus_write_4(sc->reg_base, MDIO_CTRL_OFFSET, op); in brcm_iproc_mdio_op()
239 bus_write_4(sc->reg_base, MDIO_SCAN_CTRL_OFFSET, val); in brcm_iproc_config()
249 bus_write_4(sc->reg_base, MDIO_RATE_ADJ_EXT_OFFSET, val); in brcm_iproc_config()
250 bus_write_4(sc->reg_base, MDIO_RATE_ADJ_INT_OFFSET, val); in brcm_iproc_config()
/freebsd/sys/dev/gpio/
H A Dqoriq_gpio.c116 bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); in qoriq_gpio_pin_configure()
121 bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); in qoriq_gpio_pin_configure()
127 bus_write_4(sc->sc_mem, GPIO_GPODR, reg); in qoriq_gpio_pin_configure()
188 bus_write_4(sc->sc_mem, GPIO_GPDAT, outvals); in qoriq_gpio_pin_set()
223 bus_write_4(sc->sc_mem, GPIO_GPDAT, val); in qoriq_gpio_pin_toggle()
263 bus_write_4(sc->sc_mem, GPIO_GPDAT, in qoriq_gpio_pin_access_32()
313 bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); in qoriq_gpio_pin_config_32()
316 bus_write_4(sc->sc_mem, GPIO_GPODR, reg); in qoriq_gpio_pin_config_32()
378 bus_write_4(sc->sc_mem, GPIO_GPIBE, 0xffffffff); in qoriq_gpio_attach()
/freebsd/sys/arm/freescale/imx/
H A Dimx6_usbphy.c149 bus_write_4(sc->mem_res, CTRL_SET_REG, CTRL_SFTRST); in usbphy_attach()
150 bus_write_4(sc->mem_res, CTRL_CLR_REG, CTRL_SFTRST | CTRL_CLKGATE); in usbphy_attach()
153 bus_write_4(sc->mem_res, CTRL_SET_REG, in usbphy_attach()
157 bus_write_4(sc->mem_res, PWD_REG, 0); in usbphy_attach()
/freebsd/sys/arm/annapurna/alpine/
H A Dalpine_ccu.c106 bus_write_4(sc->res, AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET, 1); in al_ccu_attach()
107 bus_write_4(sc->res, AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET, 1); in al_ccu_attach()
110 bus_write_4(sc->res, AL_CCU_SPECULATION_CONTROL_OFFSET, 7); in al_ccu_attach()

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