Lines Matching refs:bus_write_4
178 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); in atibl_pll_rreg()
180 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); in atibl_pll_rreg()
195 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val); in atibl_pll_wreg()
201 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); in atibl_pll_wreg()
203 bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); in atibl_pll_wreg()
226 bus_write_4(sc->sc_memr, RADEON_DISP_PWR_MAN, disp_pwr_reg); in atibl_setlevel()
229 bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in atibl_setlevel()
231 bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in atibl_setlevel()
242 bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in atibl_setlevel()
249 bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in atibl_setlevel()
252 bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in atibl_setlevel()