Searched refs:buildSExt (Results 1 – 7 of 7) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PreLegalizerCombiner.cpp | 603 B.buildSExt(DstReg, AddReg); in applyPushAddSubExt()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 1329 MIRBuilder.buildSExt(NewReg, ValReg); in extendRegister()
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H A D | MachineIRBuilder.cpp | 500 MachineInstrBuilder MachineIRBuilder::buildSExt(const DstOp &Res, in buildSExt() function in MachineIRBuilder
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H A D | LegalizerHelper.cpp | 1394 MIRBuilder.buildSExt(DstReg, TmpReg); in narrowScalar() 1631 MIRBuilder.buildSExt(MO2, DstExt); in narrowScalar() 7071 Sign = MIRBuilder.buildSExt(DstTy, Sign); in lowerFPTOSI()
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H A D | CombinerHelper.cpp | 7487 MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; in matchSextOfTrunc() 7543 MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; in matchNonNegZext()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 688 MachineInstrBuilder buildSExt(const DstOp &Res, const SrcOp &Op);
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 4614 auto C1 = B.buildSExt(S32, CmpHi); in legalizeUnsignedDIV_REM64Impl() 4617 auto C2 = B.buildSExt(S32, CmpLo); in legalizeUnsignedDIV_REM64Impl() 4636 B.buildSExt(S32, B.buildICmp(CmpInst::ICMP_UGE, S1, Sub2_Hi, DenomHi)); in legalizeUnsignedDIV_REM64Impl() 4638 B.buildSExt(S32, B.buildICmp(CmpInst::ICMP_UGE, S1, Sub2_Lo, DenomLo)); in legalizeUnsignedDIV_REM64Impl()
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