| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 381 auto Addr = MIRBuilder.buildPtrAdd(PtrTy, BaseAddr, C_P2HalfMemSize); in legalizeCustom()
410 auto Addr = MIRBuilder.buildPtrAdd(PtrTy, BaseAddr, C_P2HalfMemSize); in legalizeCustom()
|
| H A D | MipsCallLowering.cpp | 240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 335 auto HighPtr = B.buildPtrAdd(MRI.getType(PtrReg), PtrReg, in applySplitStoreZero128()
606 auto NewPtr = MIB.buildPtrAdd(MRI.getType(SInfo.St->getPointerReg()), in tryOptimizeConsecStores()
|
| H A D | AArch64CallLowering.cpp | 275 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
599 FIN = MIRBuilder.buildPtrAdd(MRI.createGenericVirtualRegister(p0), in saveVarArgRegisters()
629 FIN = MIRBuilder.buildPtrAdd(MRI.createGenericVirtualRegister(p0), in saveVarArgRegisters()
|
| H A D | AArch64PreLegalizerCombiner.cpp | 227 B.buildPtrAdd( in applyFoldGlobalOffset()
|
| H A D | AArch64LegalizerInfo.cpp | 1845 auto ListTmp = MIRBuilder.buildPtrAdd(PtrTy, List, AlignMinus1.getReg(0)); in legalizeVaArg()
1859 auto NewList = MIRBuilder.buildPtrAdd(PtrTy, DstPtr, Size.getReg(0)); in legalizeVaArg()
|
| H A D | AArch64PostLegalizerLowering.cpp | 444 Builder.buildPtrAdd(MRI.getType(StackTemp.getReg(0)), StackTemp, Mul) in applyNonConstInsert()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 82 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
494 FIN = MIRBuilder.buildPtrAdd(MRI.createGenericVirtualRegister(p0), in saveVarArgRegisters()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 103 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 202 MachineIRBuilder::buildPtrAdd(const DstOp &Res, const SrcOp &Op0, in buildPtrAdd() function in MachineIRBuilder
224 return buildPtrAdd(Res, Op0, Cst.getReg(0)); in materializePtrAdd()
464 auto Ptr = buildPtrAdd(PtrTy, BasePtr, ConstOffset); in buildLoadFromOffset()
|
| H A D | LegalizerHelper.cpp | 3581 auto SmallPtr = MIRBuilder.buildPtrAdd(PtrAddReg, PtrReg, OffsetCst); in lowerLoad()
3693 MIRBuilder.buildPtrAdd(PtrTy, PtrReg, OffsetCst); in lowerStore()
4185 return MIRBuilder.buildPtrAdd(PtrTy, VecPtr, Mul).getReg(0); in getVectorElementPointer()
8625 auto AddDst = MIRBuilder.buildPtrAdd(PtrTy, VAList, AlignAmt); in lowerVAArg()
8638 auto Succ = MIRBuilder.buildPtrAdd(PtrTy, VAList, IncAmt); in lowerVAArg()
8863 Ptr = MIB.buildPtrAdd(PtrTy, Dst, Offset).getReg(0); in lowerMemset()
9003 LoadPtr = MIB.buildPtrAdd(SrcTy, Src, Offset).getReg(0); in lowerMemcpy()
9011 StorePtr = MIB.buildPtrAdd(DstTy, Dst, Offset).getReg(0); in lowerMemcpy()
9101 LoadPtr = MIB.buildPtrAdd(SrcTy, Src, Offset).getReg(0); in lowerMemmove()
9119 StorePtr = MIB.buildPtrAdd(DstTy, Dst, Offset).getReg(0); in lowerMemmove()
|
| H A D | IRTranslator.cpp | 1635 BaseReg = MIRBuilder.buildPtrAdd(PtrTy, BaseReg, OffsetMIB.getReg(0)) in translateGetElementPtr()
1664 BaseReg = MIRBuilder.buildPtrAdd(PtrTy, BaseReg, GepOffsetReg).getReg(0); in translateGetElementPtr()
1675 MIRBuilder.buildPtrAdd(getOrCreateVReg(U), BaseReg, OffsetMIB.getReg(0), in translateGetElementPtr()
|
| H A D | CombinerHelper.cpp | 2470 auto PtrAdd = Builder.buildPtrAdd(PtrTy, LHS, RHS); in applyCombineAddP2IToPtrAdd()
4750 Builder.buildPtrAdd(PtrTy, Src1Reg, RHS->getOperand(1).getReg()); in matchReassocConstantInnerRHS()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 228 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress()
411 B.buildPtrAdd(DstReg, KernArgSegmentVReg, OffsetReg); in lowerParameterPtr()
|
| H A D | AMDGPULegalizerInfo.cpp | 2250 B.buildPtrAdd(LoadAddr, KernargPtrReg, in getSegmentAperture()
2272 B.buildPtrAdd(LoadAddr, QueuePtr, in getSegmentAperture()
4426 return B.buildPtrAdd(PtrTy, KernArgReg, COffset).getReg(0); in getKernargParameterPtr()
5554 B.buildPtrAdd(DstReg, KernargPtrReg, B.buildConstant(IdxTy, Offset).getReg(0)); in getImplicitArgPtr()
6860 B.buildPtrAdd(LoadAddr, KernargPtrReg, in legalizeTrapHsaQueuePtr()
|
| H A D | AMDGPURegisterBankInfo.cpp | 1205 auto PtrAdd = B.buildPtrAdd(PtrTy, SPCopy, ScaledSize); in applyMappingDynStackAlloc()
1209 B.buildPtrAdd(Dst, SPCopy, ScaledSize); in applyMappingDynStackAlloc()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 505 MachineInstrBuilder buildPtrAdd(const DstOp &Res, const SrcOp &Op0,
|