Searched refs:buildConcatVectors (Results 1 – 9 of 9) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PreLegalizerCombiner.cpp | 402 Builder.buildConcatVectors(LLT::fixed_vector(NumElements, 32), DotReg); in applyExtAddvToUdotAddv()
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H A D | AArch64PostLegalizerLowering.cpp | 759 DupSrc = B.buildConcatVectors(SrcTy.multiplyElements(2), in applyDupLane()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 338 return B.buildConcatVectors(DstRegs[0], SrcRegs); in mergeVectorRegsToResultRegs()
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H A D | MachineIRBuilder.cpp | 788 MachineIRBuilder::buildConcatVectors(const DstOp &Res, ArrayRef<Register> Ops) { in buildConcatVectors() function in MachineIRBuilder
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H A D | LegalizerHelper.cpp | 176 MIRBuilder.buildConcatVectors(DstReg, PartRegs); in insertParts() 5038 MIRBuilder.buildConcatVectors(DstReg, {Lo, Hi}); in fewerElementsVectorShuffle() 5734 auto Src1 = MIRBuilder.buildConcatVectors(PaddedTy, MOps1); in equalizeVectorShuffleLengths() 5735 auto Src2 = MIRBuilder.buildConcatVectors(PaddedTy, MOps2); in equalizeVectorShuffleLengths()
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H A D | CombinerHelper.cpp | 450 Builder.buildConcatVectors(MI.getOperand(0).getReg(), Ops); in applyCombineShuffleConcat()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 1139 MachineInstrBuilder buildConcatVectors(const DstOp &Res,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 6451 auto Concat = B.buildConcatVectors( in legalizeImageIntrinsic() 6457 auto Concat = B.buildConcatVectors(PackedAddrTy, PackedRegs); in legalizeImageIntrinsic() 6695 NewResultReg = B.buildConcatVectors(V4S16, ResultRegs).getReg(0); in legalizeImageIntrinsic() 6711 B.buildConcatVectors(DstReg, ResultRegs); in legalizeImageIntrinsic()
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H A D | AMDGPURegisterBankInfo.cpp | 1435 B.buildConcatVectors(Dst, LoadParts); in applyMappingSBufferLoad()
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