Home
last modified time | relevance | path

Searched refs:b100 (Results 1 – 25 of 52) sorted by relevance

123

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td59 def : AT<"S1E2R", 0b100, 0b0111, 0b1000, 0b000>;
62 def : AT<"S1E2W", 0b100, 0b0111, 0b1000, 0b001>;
66 def : AT<"S12E1R", 0b100, 0b0111, 0b1000, 0b100>;
67 def : AT<"S12E1W", 0b100, 0b0111, 0b1000, 0b101>;
68 def : AT<"S12E0R", 0b100, 0b0111, 0b1000, 0b110>;
69 def : AT<"S12E0W", 0b100, 0b0111, 0b1000, 0b111>;
78 def : AT<"S1E2A", 0b100, 0b0111, 0b1001, 0b010>;
156 def : DC<"IGSW", 0b000, 0b0111, 0b0110, 0b100>;
157 def : DC<"CGSW", 0b000, 0b0111, 0b1010, 0b100>;
158 def : DC<"CIGSW", 0b000, 0b0111, 0b1110, 0b100>;
[all …]
H A DAArch64SMEInstrInfo.td119 defm USMOPA_MPPZZ_S : sme_int_outer_product_i32<0b100, "usmopa", int_aarch64_sme_usmopa_wide>;
130 defm USMOPA_MPPZZ_D : sme_int_outer_product_i64<0b100, "usmopa", int_aarch64_sme_usmopa_wide>;
328 defm BFMLAL_VG2_M2ZZ_HtoS : sme2_fp_mla_long_array_vg2_single<"bfmlal", 0b100, MatrixOp32, ZZ_h, …
329 defm BFMLAL_VG4_M4ZZ_HtoS : sme2_fp_mla_long_array_vg4_single<"bfmlal", 0b100, MatrixOp32, ZZZZ_h…
388 defm SQCVTU_Z4Z : sme2_int_cvt_vg4_single<"sqcvtu", 0b100, int_aarch64_sve_sqcvtu_x4>;
537 defm USMLALL_VG2_M2ZZI_BtoS : sme2_mla_ll_array_vg2_index_32b<"usmlall", 0b00, 0b100, int_aarch64_s…
554 defm UMLALL_MZZI_BtoS : sme2_mla_ll_array_index_32b<"umlall", 0b00, 0b100, int_aarch64_sme_uml…
578 defm BMOPA_MPPZZ_S : sme2_int_bmopx_tile<"bmopa", 0b100, int_aarch64_sme_bmopa_za32>;
584 defm UMOPA_MPPZZ_HtoS : sme2_int_mopx_tile<"umopa", 0b100, int_aarch64_sme_umopa_za32>;
638 defm SQRSHRN_VG4_Z4ZI : sme2_sat_shift_vector_vg4<"sqrshrn", 0b100, int_aarch64_sve_sqrshrn_x4>;
[all …]
H A DAArch64SVEInstrInfo.td532 defm SQADD_ZZZ : sve_int_bin_cons_arit_0<0b100, "sqadd", saddsat>;
567 defm SQADD_ZI : sve_int_arith_imm0_ssat<0b100, "sqadd", saddsat, ssubsat>;
610 …defm SDIV_ZPmZ : sve_int_bin_pred_arit_2_div<0b100, "sdiv", "SDIV_ZPZZ", int_aarch64_sve_sdiv, D…
628 defm SXTW_ZPmZ : sve_int_un_pred_arit_0_d<0b100, "sxtw", AArch64sxt_mt>;
638 defm FABS_ZPmZ : sve_int_un_pred_arit_1_fp<0b100, "fabs", AArch64fabs_mt>;
655 …defm SABD_ZPmZ : sve_int_bin_pred_arit_1<0b100, "sabd", "SABD_ZPZZ", int_aarch64_sve_sabd, Destruc…
672 …defm FMAXNM_ZPmI : sve_fp_2op_i_p_zds<0b100, "fmaxnm", "FMAXNM_ZPZI", sve_fpimm_zero_one, fpimm0,…
796 defm FMAXNMV_VPZ : sve_fp_fast_red<0b100, "fmaxnmv", AArch64fmaxnmv_p>;
947 defm BRKB_PPzP : sve_int_break_z<0b100, "brkb", int_aarch64_sve_brkb_z>;
1129 defm LD2Q_IMM : sve_mem_eld_si<0b01, 0b100, ZZ_q, "ld2q", simm4s2>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoXCV.td129 def CV_MULSN : CVInstMulN<0b00, 0b100, "cv.mulsn">,
131 def CV_MULHHSN : CVInstMulN<0b01, 0b100, "cv.mulhhsn">,
133 def CV_MULSRN : CVInstMulN<0b10, 0b100, "cv.mulsrn">,
135 def CV_MULHHSRN : CVInstMulN<0b11, 0b100, "cv.mulhhsrn">,
349 def CV_ # NAME # _SC_H : CVSIMDRR<funct5, F, funct1, 0b100, "cv." # mnemonic # ".sc.h">;
358 def CV_ # NAME # _SC_H : CVSIMDRR<funct5, F, funct1, 0b100, "cv." # mnemonic # ".sc.h">;
367 def CV_ # NAME # _SC_H : CVSIMDRR<funct5, F, funct1, 0b100, "cv." # mnemonic # ".sc.h">;
376 def CV_ # NAME # _SC_H : CVSIMDRRWb<funct5, F, funct1, 0b100, "cv." # mnemonic # ".sc.h">;
385 def CV_ # NAME # _SC_H : CVSIMDRRWb<funct5, F, funct1, 0b100, "cv." # mnemonic # ".sc.h">;
427 def CV_INSERT_H : CVSIMDRUWb<0b10111, 0, 0b100, "c
[all...]
H A DRISCVInstrInfoZimop.td57 def MOPR#i : RVMopr<0b1000111, i, 0b100, OPC_SYSTEM, "mop.r."#i>,
63 def MOPRR#i : RVMoprr<0b1001, i, 0b100, OPC_SYSTEM, "mop.rr."#i>,
H A DRISCVInstrInfoM.td39 def DIV : ALU_rr<0b0000001, 0b100, "div">,
55 def DIVW : ALUW_rr<0b0000001, 0b100, "divw">,
H A DRISCVInstrInfoZb.td280 def XNOR : ALU_rr<0b0100000, 0b100, "xnor">,
287 def SH2ADD : ALU_rr<0b0010000, 0b100, "sh2add">,
300 def SH2ADD_UW : ALUW_rr<0b0010000, 0b100, "sh2add.uw">,
354 def XPERM8 : ALU_rr<0b0010100, 0b100, "xperm8">,
396 def MIN : ALU_rr<0b0000101, 0b100, "min", Commutable=1>,
407 def PACK : ALU_rr<0b0000100, 0b100, "pack">,
415 def PACKW : ALUW_rr<0b0000100, 0b100, "packw">,
419 def ZEXT_H_RV32 : RVBUnary<0b000010000000, 0b100, OPC_OP, "zext.h">,
424 def ZEXT_H_RV64 : RVBUnary<0b000010000000, 0b100, OPC_OP_32, "zext.h">,
H A DRISCVInstrInfoZfa.td96 def FLEQ_S : FPCmp_rr<0b1010000, 0b100, "fleq.s", FPR32>;
122 def FLEQ_D : FPCmp_rr<0b1010001, 0b100, "fleq.d", FPR64>;
158 def FLEQ_H : FPCmp_rr<0b1010010, 0b100, "fleq.h", FPR16>;
H A DRISCVInstrInfoC.td282 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
462 def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb), (ins GPRC:$rs1, simm6:$imm),
676 def C_SRLI64_HINT : RVInst16CI<0b100, 0b01, (outs GPRC:$rd_wb),
686 def C_SRAI64_HINT : RVInst16CI<0b100, 0b01, (outs GPRC:$rd_wb),
H A DRISCVInstrInfoZa.td68 defm AMOCAS_Q : AMO_cas_aq_rl<0b00101, 0b100, "amocas.q", GPRPairRV64>;
/freebsd/sys/netinet/
H A Dtcp_ecn.c209 tp->t_rcep = 0b100; in tcp_ecn_input_syn_sent()
275 tp->t_rcep = 0b100; in tcp_ecn_input_parallel_syn()
333 case 0b100: in tcp_ecn_input_segment()
/freebsd/sys/cddl/dev/kinst/riscv/
H A Dkinst_isa.c129 case 0b100: /* blt */ in kinst_emulate()
217 if (funct == 0b100 && rs1_index != 0) { in kinst_emulate()
399 if (funct == 0b100 && in kinst_instr_dissect()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td424 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
425 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
426 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
427 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
434 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
435 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
436 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
437 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
513 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
514 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
[all …]
H A DMipsMSAInstrFormats.td214 let Inst{21-19} = 0b100;
266 let Inst{21-19} = 0b100;
318 let Inst{21-19} = 0b100;
H A DMips16InstrFormats.td394 let Inst{10-8} = 0b100;
617 bits<3> SVRS = 0b100;
/freebsd/contrib/diff/lib/
H A Dstrftime.c284 int b100 = b4 / 25 - (b4 % 25 < 0); in tm_diff() local
286 int b400 = b100 >> 2; in tm_diff()
287 int intervening_leap_days = (a4 - b4) - (a100 - b100) + (a400 - b400); in tm_diff()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrFormats.td156 /*REGISTER*/0b100);
197 let EA = (descend /*MODE*/0b100,
H A DM68kInstrBits.td88 def BTST8qd : MxBIT_MR<"btst", 0b100, MxType8d, MxType8.QOp,
90 def BTST8kd : MxBIT_MR<"btst", 0b100, MxType8d, MxType8.KOp,
129 defm BTST : MxBIT<"btst", 0b100, 0b000>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepInstrInfo.td151 let Inst{7-5} = 0b100;
201 let Inst{7-5} = 0b100;
451 let Inst{7-5} = 0b100;
461 let Inst{7-5} = 0b100;
505 let Inst{7-5} = 0b100;
1162 let Inst{7-5} = 0b100;
1212 let Inst{7-5} = 0b100;
1712 let Inst{7-5} = 0b100;
1753 let Inst{7-5} = 0b100;
1823 let Inst{7-5} = 0b100;
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.td524 def SP_ADD_S : F16_SP_OPS_u7_aligned<0b100,
684 def BHI_S : F16_BCC_s7<0b100, "bhi_s">;
718 def BSET_S_ru5 : F16_SH_SUB_BIT_DST<0b100,"bset_s">;
759 F16_OP_HREG_LIMM<0b100, (outs GPR32:$b_s3), (ins i32imm:$LImm),
763 F16_OP_HREG<0b100, (outs GPR32:$b_s3), (ins GPR32:$h),
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td76 def f2FSTMU_S : F2_LDSTM_S<0b1, 0b100, "fstmu", (outs), (ins GPR:$rx, regseq_f2:$regs, variable_ops)>;
78 def f2FSTMU_D : F2_LDSTM_D<0b1, 0b100, "fstmu", (outs), (ins GPR:$rx, regseq_d2:$regs, variable_ops)>;
86 def f2FLDMU_S : F2_LDSTM_S<0b0, 0b100, "fldmu", (outs), (ins GPR:$rx, regseq_f2:$regs, variable_ops)>;
88 def f2FLDMU_D : F2_LDSTM_D<0b0, 0b100, "fldmu", (outs), (ins GPR:$rx, regseq_d2:$regs, variable_ops)>;
H A DCSKYInstrInfo16Instr.td95 def ADDI16 : I16_Z_8<0b100, (ins mGPR:$rZ, oimm8:$imm8), "addi16\t$rz, $imm8">;
138 def ST16B : I16_XZ_LDST<AddrMode16B, 0b100, "st16.b",
313 def BCLRI16 : I16_Z_5<0b100, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
/freebsd/sys/cddl/dev/kinst/aarch64/
H A Dkinst_isa.c72 case 0b100: /* hi/ls */ in kinst_emulate()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h62 VMConstraint = 0b100 << ConstraintShift,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td2322 def t2SXTB : T2I_ext_rrot<0b100, "sxtb">;
2326 def t2SXTAB : T2I_exta_rrot<0b100, "sxtab">;
2572 def t2UQSUB8 : T2I_pam_intrinsics<0b100, 0b0101, "uqsub8", int_arm_uqsub8>;
2575 def t2QSUB8 : T2I_pam_intrinsics<0b100, 0b0001, "qsub8", int_arm_qsub8>;
2629 def t2SSUB8 : T2I_pam_intrinsics<0b100, 0b0000, "ssub8", int_arm_ssub8>;
2635 def t2USUB8 : T2I_pam_intrinsics<0b100, 0b0100, "usub8", int_arm_usub8>;
2644 def t2SHSUB8 : T2I_pam_intrinsics<0b100, 0b0010, "shsub8", int_arm_shsub8>;
2650 def t2UHSUB8 : T2I_pam_intrinsics<0b100, 0b0110, "uhsub8", int_arm_uhsub8>;
3078 def t2SMLAL : T2MlaLong<0b100, 0b0000, "smlal">;
3223 def t2SMLALBB : T2MlaLong<0b100, 0b1000, "smlalbb">,
[all …]

123