/freebsd/contrib/llvm-project/libcxx/modules/std/ |
H A D | atomic.cppm |
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H A D | atomic.inc | 12 // [atomics.order], order and consistency 23 // [atomics.ref.generic], class template atomic_ref 24 // [atomics.ref.pointer], partial specialization for pointers 27 // [atomics.types.generic], class template atomic 30 // [atomics.nonmembers], non-member functions 58 // [atomics.alias], type aliases 119 // [atomics.flag], flag type and operations 134 // [atomics.fences], fences 138 // [depr.atomics.nonmembers]
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGAtomic.cpp | 1956 AtomicInfo atomics(*this, dest); in EmitAtomicStore() local 1957 LValue LVal = atomics.getAtomicLValue(); in EmitAtomicStore() 1962 atomics.emitCopyIntoMemory(rvalue); in EmitAtomicStore() 1967 if (atomics.shouldUseLibcall()) { in EmitAtomicStore() 1969 Address srcAddr = atomics.materializeRValue(rvalue); in EmitAtomicStore() 1973 args.add(RValue::get(atomics.getAtomicSizeValue()), in EmitAtomicStore() 1975 args.add(RValue::get(atomics.getAtomicPointer()), getContext().VoidPtrTy); in EmitAtomicStore() 1986 llvm::Value *ValToStore = atomics.convertRValueToInt(rvalue); in EmitAtomicStore() 1989 Address Addr = atomics.getAtomicAddress(); in EmitAtomicStore() 1990 if (llvm::Value *Value = atomics.getScalarRValValueOrNull(rvalue)) in EmitAtomicStore() [all …]
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/freebsd/sys/powerpc/conf/ |
H A D | NOTES | 81 nodevice mpr # no 64-bit atomics 82 nodevice mps # no 64-bit atomics
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H A D | GENERIC64LE | 33 options ISA_206_ATOMICS # PowerISA v2.06 optimized subword atomics
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | BuiltinsWebAssembly.def | 44 TARGET_BUILTIN(__builtin_wasm_memory_atomic_wait32, "ii*iLLi", "n", "atomics") 45 TARGET_BUILTIN(__builtin_wasm_memory_atomic_wait64, "iLLi*LLiLLi", "n", "atomics") 46 TARGET_BUILTIN(__builtin_wasm_memory_atomic_notify, "Uii*Ui", "n", "atomics")
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/freebsd/sys/contrib/device-tree/Bindings/firmware/ |
H A D | nvidia,tegra210-bpmp.txt | 17 1) base address and length to Tegra 'atomics' hardware
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssembly.td | 25 def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true",
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H A D | WebAssemblyInstrMemory.td | 15 // - WebAssemblyTargetLowering having to do with atomics
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H A D | WebAssemblyInstrInfo.td | 27 AssemblerPredicate<(all_of FeatureAtomics), "atomics">;
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/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_flags.inc | 40 "If set, all atomics are effectively sequentially consistent (seq_cst), "
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/freebsd/contrib/llvm-project/libcxx/include/ |
H A D | semaphore | 78 It is a typical Dijkstra semaphore algorithm over atomics, wait and notify
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H A D | atomic | 332 // [atomics.nonmembers], non-member functions
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | README.txt | 147 If needed, we can support 16-byte atomics using LPQ, STPQ and CSDG.
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.td | 150 // True if the subtarget supports v8 atomics (LDA/LDAEX etc) instructions. 560 // Assume that lock-free 32-bit atomics are available, even if the target 566 "atomics-32", "HasForced32BitAtomics", "true", 567 "Assume that lock-free 32-bit atomics are available">;
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/freebsd/contrib/llvm-project/libcxx/ |
H A D | CREDITS.TXT | 39 D: FreeBSD and Solaris ports, libcxxrt support, some atomics work.
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/freebsd/sys/conf/ |
H A D | kern.mk | 150 CFLAGS += -mno-outline-atomics
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | RuntimeLibcalls.def | 502 // Note: there are two sets of atomics libcalls; see 628 // Out-of-line atomics libcalls
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPC.td | 170 def FeaturePartwordAtomic : SubtargetFeature<"partword-atomics", 173 def FeatureQuadwordAtomic : SubtargetFeature<"quadword-atomics",
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVFeatures.td | 1380 // Assume that lock-free native-width atomics are available, even if the target 1386 "forced-atomics", "HasForcedAtomics", "true", 1387 "Assume that lock-free native-width atomics are available">;
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H A D | RISCVInstrInfoA.td | 121 // Atomic load/store are available under both +a and +force-atomics.
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | MIMGInstructions.td | 12 // - MIMGEncGfx6: encoding introduced with gfx6 (obsoleted for atomics in gfx8) 13 // - MIMGEncGfx8: encoding introduced with gfx8 for atomics 14 // - MIMGEncGfx90a: encoding for gfx90a for atomics 104 field bits<8> GFX10M = gfx10m; // GFX10minus for all but atomics 1111 string renamed = ""> { // 64-bit atomics
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H A D | AMDGPU.td | 453 def FeatureScalarAtomics : SubtargetFeature<"scalar-atomics", 806 : SubtargetFeature<"agent-scope-fine-grained-remote-memory-atomics",
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/freebsd/contrib/llvm-project/openmp/runtime/src/ |
H A D | dllexports | 1246 # OpenMP 5.1 atomics
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64Features.td | 530 def FeatureOutlineAtomics : SubtargetFeature<"outline-atomics", "OutlineAtomics", "true", 531 "Enable out of line atomics to support LSE instructions">;
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