Searched refs:Zn (Results 1 – 11 of 11) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | SMEInstrFormats.td | 72 …Pseudo<(outs), (ins MatrixIndexGPR32Op8_11:$Rv, index_ty:$imm3, multi_vector_ty:$Zn, zpr_ty:$Zm), … 80 …Pseudo<(outs), (ins MatrixIndexGPR32Op8_11:$Rv, index_ty:$imm3, multi_vector_ty:$Zn, multi_vector_… 88 …Pseudo<(outs), (ins MatrixIndexGPR32Op8_11:$Rv, index_ty:$imm3, multi_vector_ty:$Zn, zpr_ty:$Zm, i… 95 Pseudo<(outs), (ins MatrixIndexGPR32Op8_11:$Rs, imm_ty:$imm, multi_vector_ty:$Zn), []> { 102 …<(outs), (ins tile_imm:$tile, MatrixIndexGPR32Op12_15:$Rs, imm_ty:$imm, multi_vector_ty:$Zn), []> { 116 … Pseudo<(outs vector_ty:$Zn), (ins tile_imm:$tile, MatrixIndexGPR32Op12_15:$Rs, imm_ty:$imm), []> { 135 …: Pat<(intrinsic (i32 (tileslice MatrixIndexGPR32Op8_11:$base, index_ty:$offset)), vt:$Zn, vt:$Zm), 136 (!cast<Instruction>(name # _PSEUDO) $base, $offset, vt:$Zn, zpr_ty:$Zm)>; 167 …: Pat<(intrinsic (i32 (tileslice MatrixIndexGPR32Op8_11:$base, index_ty:$offset)), vt:$Zn, vt:$Zm,… 168 (!cast<Instruction>(name # _PSEUDO) $base, $offset, vt:$Zn, zpr_ty:$Zm, (i32 imm_ty:$i))>; [all …]
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H A D | SVEInstrFormats.td | 1142 def : Pat<(vt (op (vt zprty:$Zn), (sve_pred_enum:$pattern), (sve_incdec_imm:$imm4))), 1143 (!cast<Instruction>(NAME) $Zn, sve_pred_enum:$pattern, sve_incdec_imm:$imm4)>; 1319 : I<(outs zprty:$Zd), (ins zprty:$Zn, immtype:$idx), 1320 asm, "\t$Zd, $Zn$idx", 1324 bits<5> Zn; 1331 let Inst{9-5} = Zn; 1358 def : InstAlias<"mov $Zd, $Zn$idx", 1359 (!cast<Instruction>(NAME # _B) ZPR8:$Zd, ZPR8:$Zn, sve_elm_idx_extdup_b:$idx), 1>; 1360 def : InstAlias<"mov $Zd, $Zn$idx", 1361 … (!cast<Instruction>(NAME # _H) ZPR16:$Zd, ZPR16:$Zn, sve_elm_idx_extdup_h:$idx), 1>; [all …]
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H A D | AArch64SVEInstrInfo.td | 325 def AArch64sclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm), 326 [(int_aarch64_sve_sclamp node:$Zd, node:$Zn, node:$Zm), 328 (AArch64smax_p (SVEAllActive), node:$Zd, node:$Zn), 331 def AArch64uclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm), 332 [(int_aarch64_sve_uclamp node:$Zd, node:$Zn, node:$Zm), 334 (AArch64umax_p (SVEAllActive), node:$Zd, node:$Zn), 337 def AArch64fclamp : PatFrags<(ops node:$Zd, node:$Zn, node:$Zm), 338 [(int_aarch64_sve_fclamp node:$Zd, node:$Zn, node:$Zm), 340 (AArch64fmaxnm_p (SVEAllActive), node:$Zd, node:$Zn), 2388 def : InstAlias<"mov $Zd, $Zn", [all …]
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H A D | AArch64RegisterInfo.td | 1390 // Zn+0.T and Zn+8.T 1407 // Zn+0.T, Zn+4.T, Zn+8.T and Zn+12.T
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H A D | AArch64ISelDAGToDAG.cpp | 2025 SDValue Zn = N->getOperand(1 + NumVecs); in SelectClamp() local 2028 SDValue Ops[] = {Zd, Zn, Zm}; in SelectClamp()
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/freebsd/contrib/dialog/samples/ |
H A D | checklist9.txt | 3 --backtitle "\Z1No Such\Zn Organization" \ 10 \Z4UP/DOWN\Zn arrow keys, the first letter of the choice as a \n\ 12 Press \Zb\ZrSPACE\Zn to toggle an option on/off. \n\n\ 14 …"Apple" "It's an \Z1apple\Zn. xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx" … 20 …"Fish" "Cats like \Z4fish\Zn. xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx" … 21 …"Lemon" "You know how it \Zr\Zb\Z3tastes\Zn. xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx" …
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/freebsd/contrib/ncurses/include/ |
H A D | Caps.hpux11 | 743 set_right_margin_parm smgrp str Zn - - ----- Set right margin at column #1
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H A D | Caps | 735 set_right_margin_parm smgrp str Zn - - ----- Set right margin at column #1
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H A D | Caps.osf1r5 | 803 set_right_margin_parm smgrp str Zn - - ----- Set right margin at column #1
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H A D | Caps.keys | 826 set_right_margin_parm smgrp str Zn - - ----- Set right margin at column #1
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H A D | Caps.aix4 | 837 set_right_margin_parm smgrp str Zn - - ----- Set right margin at column #1
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