Lines Matching refs:Zn
1142 def : Pat<(vt (op (vt zprty:$Zn), (sve_pred_enum:$pattern), (sve_incdec_imm:$imm4))),
1143 (!cast<Instruction>(NAME) $Zn, sve_pred_enum:$pattern, sve_incdec_imm:$imm4)>;
1319 : I<(outs zprty:$Zd), (ins zprty:$Zn, immtype:$idx),
1320 asm, "\t$Zd, $Zn$idx",
1324 bits<5> Zn;
1331 let Inst{9-5} = Zn;
1358 def : InstAlias<"mov $Zd, $Zn$idx",
1359 (!cast<Instruction>(NAME # _B) ZPR8:$Zd, ZPR8:$Zn, sve_elm_idx_extdup_b:$idx), 1>;
1360 def : InstAlias<"mov $Zd, $Zn$idx",
1361 … (!cast<Instruction>(NAME # _H) ZPR16:$Zd, ZPR16:$Zn, sve_elm_idx_extdup_h:$idx), 1>;
1362 def : InstAlias<"mov $Zd, $Zn$idx",
1363 … (!cast<Instruction>(NAME # _S) ZPR32:$Zd, ZPR32:$Zn, sve_elm_idx_extdup_s:$idx), 1>;
1364 def : InstAlias<"mov $Zd, $Zn$idx",
1365 … (!cast<Instruction>(NAME # _D) ZPR64:$Zd, ZPR64:$Zn, sve_elm_idx_extdup_d:$idx), 1>;
1366 def : InstAlias<"mov $Zd, $Zn$idx",
1367 … (!cast<Instruction>(NAME # _Q) ZPR128:$Zd, ZPR128:$Zn, sve_elm_idx_extdup_q:$idx), 1>;
1423 : I<(outs zprty:$Zd), (ins VecList:$Zn, zprty:$Zm),
1424 asm, "\t$Zd, $Zn, $Zm",
1429 bits<5> Zn;
1437 let Inst{9-5} = Zn;
1449 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
1450 (!cast<Instruction>(NAME # _B) ZPR8:$Zd, ZPR8:$Zn, ZPR8:$Zm), 0>;
1451 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
1452 (!cast<Instruction>(NAME # _H) ZPR16:$Zd, ZPR16:$Zn, ZPR16:$Zm), 0>;
1453 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
1454 (!cast<Instruction>(NAME # _S) ZPR32:$Zd, ZPR32:$Zn, ZPR32:$Zm), 0>;
1455 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
1456 (!cast<Instruction>(NAME # _D) ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zm), 0>;
1518 : I<(outs zprty:$Zd), (ins zprty:$_Zd, zprty:$Zn, zprty:$Zm),
1519 asm, "\t$Zd, $Zn, $Zm",
1524 bits<5> Zn;
1532 let Inst{9-5} = Zn;
1558 : I<(outs zprty:$Zd), (ins zprty:$Zn),
1559 asm, "\t$Zd, $Zn",
1563 bits<5> Zn;
1567 let Inst{9-5} = Zn;
1630 : I<(outs zprty1:$Zd), (ins zprty2:$Zn),
1631 asm, "\t$Zd, $Zn",
1634 bits<5> Zn;
1640 let Inst{9-5} = Zn;
1712 def : Pat<(nxv8f16 (op nxv8f16:$Zn, f16:$Vm)),
1713 (!cast<Instruction>(NAME # _H) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, hsub))>;
1714 def : Pat<(nxv4f32 (op nxv4f32:$Zn, f32:$Vm)),
1715 (!cast<Instruction>(NAME # _S) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, ssub))>;
1716 def : Pat<(nxv2f64 (op nxv2f64:$Zn, f64:$Vm)),
1717 (!cast<Instruction>(NAME # _D) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, dsub))>;
1719 def : Pat<(nxv8bf16 (op nxv8bf16:$Zn, bf16:$Vm)),
1720 (!cast<Instruction>(NAME # _H) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, hsub))>;
1723 def : Pat<(nxv16i8 (op (nxv16i8 ZPR:$Zn), (i32 (vector_extract (nxv16i8 ZPR:$Vm), 0)))),
1724 (!cast<Instruction>(NAME # _B) $Zn, ZPR:$Vm)>;
1725 def : Pat<(nxv8i16 (op (nxv8i16 ZPR:$Zn), (i32 (vector_extract (nxv8i16 ZPR:$Vm), 0)))),
1726 (!cast<Instruction>(NAME # _H) $Zn, ZPR:$Vm)>;
1727 def : Pat<(nxv4i32 (op (nxv4i32 ZPR:$Zn), (i32 (vector_extract (nxv4i32 ZPR:$Vm), 0)))),
1728 (!cast<Instruction>(NAME # _S) $Zn, ZPR: $Vm)>;
1729 def : Pat<(nxv2i64 (op (nxv2i64 ZPR:$Zn), (i64 (vector_extract (nxv2i64 ZPR:$Vm), 0)))),
1730 (!cast<Instruction>(NAME # _D) $Zn, ZPR:$Vm)>;
1766 : I<(outs ZPR8:$Zd), (ins ZZ_b:$Zn, imm0_255:$imm8),
1767 asm, "\t$Zd, $Zn, $imm8",
1770 bits<5> Zn;
1776 let Inst{9-5} = Zn;
1787 : I<(outs zprty:$Zd), (ins PPRAny:$Pg, zprty:$Zn, zprty:$Zm),
1788 asm, "\t$Zd, $Pg, $Zn, $Zm",
1794 bits<5> Zn;
1801 let Inst{9-5} = Zn;
1827 def : InstAlias<"mov $Zd, $Pg/m, $Zn",
1828 (!cast<Instruction>(NAME # _B) ZPR8:$Zd, PPRAny:$Pg, ZPR8:$Zn, ZPR8:$Zd), 1>;
1829 def : InstAlias<"mov $Zd, $Pg/m, $Zn",
1830 (!cast<Instruction>(NAME # _H) ZPR16:$Zd, PPRAny:$Pg, ZPR16:$Zn, ZPR16:$Zd), 1>;
1831 def : InstAlias<"mov $Zd, $Pg/m, $Zn",
1832 (!cast<Instruction>(NAME # _S) ZPR32:$Zd, PPRAny:$Pg, ZPR32:$Zn, ZPR32:$Zd), 1>;
1833 def : InstAlias<"mov $Zd, $Pg/m, $Zn",
1834 (!cast<Instruction>(NAME # _D) ZPR64:$Zd, PPRAny:$Pg, ZPR64:$Zn, ZPR64:$Zd), 1>;
2016 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm),
2017 asm, "\t$Zd, $Zn, $Zm",
2021 bits<5> Zn;
2028 let Inst{9-5} = Zn;
2206 def : Pat<(nxv8f16 (op (nxv8f16 ZPR16:$Zn), (nxv8f16 ZPR16:$Zm), (i32 timm32_0_7:$imm))),
2207 (!cast<Instruction>(NAME # _H) ZPR16:$Zn, ZPR16:$Zm, timm32_0_7:$imm)>;
2208 def : Pat<(nxv4f32 (op (nxv4f32 ZPR32:$Zn), (nxv4f32 ZPR32:$Zm), (i32 timm32_0_7:$imm))),
2209 (!cast<Instruction>(NAME # _S) ZPR32:$Zn, ZPR32:$Zm, timm32_0_7:$imm)>;
2210 def : Pat<(nxv2f64 (op (nxv2f64 ZPR64:$Zn), (nxv2f64 ZPR64:$Zm), (i32 timm32_0_7:$imm))),
2211 (!cast<Instruction>(NAME # _D) ZPR64:$Zn, ZPR64:$Zm, timm32_0_7:$imm)>;
2253 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm),
2254 asm, "\t$Zd, $Zn, $Zm",
2259 bits<5> Zn;
2266 let Inst{9-5} = Zn;
2304 : I<(outs zprty:$Zda), (ins PPR3bAny:$Pg, zprty:$_Zda, zprty:$Zn, zprty:$Zm),
2305 asm, "\t$Zda, $Pg/m, $Zn, $Zm",
2311 bits<5> Zn;
2319 let Inst{9-5} = Zn;
2403 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty1:$Zn, zprty2:$Zm, itype:$iop),
2404 asm, "\t$Zda, $Zn, $Zm$iop", "", []>, Sched<[]> {
2406 bits<5> Zn;
2412 let Inst{9-5} = Zn;
2472 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty2:$Zm, itype:$iop),
2473 asm, "\t$Zd, $Zn, $Zm$iop", "", []>, Sched<[]> {
2475 bits<5> Zn;
2482 let Inst{9-5} = Zn;
2535 : I<(outs zprty:$Zda), (ins PPR3bAny:$Pg, zprty:$_Zda, zprty:$Zn, zprty:$Zm,
2537 asm, "\t$Zda, $Pg/m, $Zn, $Zm, $imm",
2541 bits<5> Zn;
2551 let Inst{9-5} = Zn;
2581 : I<(outs zprty:$Zda), (ins zprty:$_Zda, zprty:$Zn, zprty2:$Zm, itype:$iop,
2583 asm, "\t$Zda, $Zn, $Zm$iop, $imm",
2586 bits<5> Zn;
2593 let Inst{9-5} = Zn;
2672 : I<(outs zprty1:$Zd), (ins zprty1:$_Zd, PPR3bAny:$Pg, zprty2:$Zn),
2673 asm, "\t$Zd, $Pg/m, $Zn",
2677 bits<5> Zn;
2685 let Inst{9-5} = Zn;
2760 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR16:$Zn, ZPR3b16:$Zm,
2762 asm, "\t$Zda, $Zn, $Zm$iop",
2766 bits<5> Zn;
2779 let Inst{9-5} = Zn;
2801 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR16:$Zn, ZPR16:$Zm),
2802 asm, "\t$Zda, $Zn, $Zm",
2806 bits<5> Zn;
2816 let Inst{9-5} = Zn;
2884 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm),
2885 asm, "\t$Zd, $Zn, $Zm",
2890 bits<5> Zn;
2897 let Inst{9-5} = Zn;
2931 : I<(outs o_zprtype:$Zd), (ins i_zprtype:$_Zd, PPR3bAny:$Pg, i_zprtype:$Zn),
2932 asm, "\t$Zd, $Pg/m, $Zn",
2937 bits<5> Zn;
2944 let Inst{9-5} = Zn;
3057 : I<(outs zprty:$Zd), (ins zprty:$Zn),
3058 asm, "\t$Zd, $Zn",
3062 bits<5> Zn;
3068 let Inst{9-5} = Zn;
3258 : I<(outs zprty:$Zda), (ins PPR3bAny:$Pg, zprty:$_Zda, zprty:$Zn, zprty:$Zm),
3259 asm, "\t$Zda, $Pg/m, $Zn, $Zm",
3265 bits<5> Zn;
3273 let Inst{9-5} = Zn;
3320 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty2:$Zm),
3321 asm, "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
3323 bits<5> Zn;
3331 let Inst{9-5} = Zn;
3369 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty3:$Zm, itype:$iop),
3370 asm, "\t$Zda, $Zn, $Zm$iop", "", []>, Sched<[]> {
3372 bits<5> Zn;
3377 let Inst{9-5} = Zn;
3446 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty2:$Zm), asm,
3447 "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
3449 bits<5> Zn;
3457 let Inst{9-5} = Zn;
3480 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty3:$Zm, itype:$iop),
3481 asm, "\t$Zda, $Zn, $Zm$iop",
3484 bits<5> Zn;
3490 let Inst{9-5} = Zn;
3523 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty2:$Zm,
3525 asm, "\t$Zda, $Zn, $Zm, $rot", "", []>, Sched<[]> {
3527 bits<5> Zn;
3536 let Inst{9-5} = Zn;
3580 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty3:$Zm, itype:$iop,
3582 asm, "\t$Zda, $Zn, $Zm$iop, $rot", "", []>, Sched<[]> {
3584 bits<5> Zn;
3591 let Inst{9-5} = Zn;
3655 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm),
3656 asm, "\t$Zd, $Zn, $Zm", "", []>, Sched<[]> {
3659 bits<5> Zn;
3666 let Inst{9-5} = Zn;
3697 : I<(outs zprty1:$Zd), (ins zprty2:$Zn, zprty3:$Zm, itype:$iop),
3698 asm, "\t$Zd, $Zn, $Zm$iop", "", []>, Sched<[]> {
3700 bits<5> Zn;
3706 let Inst{9-5} = Zn;
3812 : I<(outs zprty1:$Zda), (ins PPR3bAny:$Pg, zprty1:$_Zda, zprty2:$Zn),
3813 asm, "\t$Zda, $Pg/m, $Zn", "", []>, Sched<[]> {
3815 bits<5> Zn;
3823 let Inst{9-5} = Zn;
3844 : I<(outs zprty:$Zd), (ins zprty:$_Zd, PPR3bAny:$Pg, zprty:$Zn),
3845 asm, "\t$Zd, $Pg/m, $Zn",
3850 bits<5> Zn;
3859 let Inst{9-5} = Zn;
3912 : I<(outs zprty1:$Zd), (ins zprty2:$Zn, zprty3:$Zm),
3913 asm, "\t$Zd, $Zn, $Zm", "", []>, Sched<[]> {
3915 bits<5> Zn;
3923 let Inst{9-5} = Zn;
3978 : I<(outs zprty1:$Zd), (ins zprty2:$Zn, zprty2:$Zm),
3979 asm, "\t$Zd, $Zn, $Zm", "", []>, Sched<[]> {
3981 bits<5> Zn;
3989 let Inst{9-5} = Zn;
4020 : I<(outs zprty1:$Zd), (ins zprty1:$_Zd, zprty2:$Zn, zprty2:$Zm),
4021 asm, "\t$Zd, $Zn, $Zm", "", []>, Sched<[]> {
4023 bits<5> Zn;
4031 let Inst{9-5} = Zn;
4056 : I<(outs zprty1:$Zd), (ins zprty2:$Zn, immtype:$imm),
4057 asm, "\t$Zd, $Zn, $imm",
4060 bits<5> Zn;
4069 let Inst{9-5} = Zn;
4098 : I<(outs zprty:$Zd), (ins zprty:$_Zd, zprty:$Zn, immtype:$imm),
4099 asm, "\t$Zd, $Zn, $imm",
4102 bits<5> Zn;
4111 let Inst{9-5} = Zn;
4160 : I<(outs zprty:$Zda), (ins zprty:$_Zda, zprty:$Zn, immtype:$imm),
4161 asm, "\t$Zda, $Zn, $imm",
4164 bits<5> Zn;
4173 let Inst{9-5} = Zn;
4243 : I<(outs zprty1:$Zda), (ins zprty1:$_Zda, zprty2:$Zn, zprty2:$Zm),
4244 asm, "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
4246 bits<5> Zn;
4254 let Inst{9-5} = Zn;
4304 : I<(outs zprty1:$Zd), (ins zprty2:$Zn, immtype:$imm),
4305 asm, "\t$Zd, $Zn, $imm",
4308 bits<5> Zn;
4318 let Inst{9-5} = Zn;
4344 : I<(outs zprty1:$Zd), (ins zprty1:$_Zd, zprty2:$Zn, immtype:$imm),
4345 asm, "\t$Zd, $Zn, $imm",
4348 bits<5> Zn;
4358 let Inst{9-5} = Zn;
4384 : I<(outs zprty1:$Zd), (ins zprty2:$Zn, zprty2:$Zm),
4385 asm, "\t$Zd, $Zn, $Zm", "", []>, Sched<[]> {
4387 bits<5> Zn;
4396 let Inst{9-5} = Zn;
4415 : I<(outs zprty1:$Zd), (ins zprty1:$_Zd, zprty2:$Zn, zprty2:$Zm),
4416 asm, "\t$Zd, $Zn, $Zm", "", []>, Sched<[]> {
4418 bits<5> Zn;
4427 let Inst{9-5} = Zn;
4447 : I<(outs zprty1:$Zd), (ins zprty2:$Zn),
4448 asm, "\t$Zd, $Zn", "", []>, Sched<[]> {
4450 bits<5> Zn;
4458 let Inst{9-5} = Zn;
4477 : I<(outs zprty1:$Zd), (ins zprty1:$_Zd, zprty2:$Zn),
4478 asm, "\t$Zd, $Zn", "", []>, Sched<[]> {
4480 bits<5> Zn;
4488 let Inst{9-5} = Zn;
4512 : I<(outs zprty:$Zd), (ins zprty:$_Zd, PPR3bAny:$Pg, zprty:$Zn),
4513 asm, "\t$Zd, $Pg/m, $Zn",
4518 bits<5> Zn;
4526 let Inst{9-5} = Zn;
4861 : I<(outs ZPR64:$Zd), (ins ZPR64:$Zn, ZPR64:$Zm),
4862 asm, "\t$Zd, $Zn, $Zm",
4867 bits<5> Zn;
4873 let Inst{9-5} = Zn;
4887 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
4888 (!cast<Instruction>(NAME) ZPR8:$Zd, ZPR8:$Zn, ZPR8:$Zm), 1>;
4889 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
4890 (!cast<Instruction>(NAME) ZPR16:$Zd, ZPR16:$Zn, ZPR16:$Zm), 1>;
4891 def : InstAlias<asm # "\t$Zd, $Zn, $Zm",
4892 (!cast<Instruction>(NAME) ZPR32:$Zd, ZPR32:$Zn, ZPR32:$Zm), 1>;
5122 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty1:$Zn, zprty2:$Zm),
5123 asm, "\t$Pd, $Pg/z, $Zn, $Zm",
5129 bits<5> Zn;
5138 let Inst{9-5} = Zn;
5212 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, immtype:$imm5),
5213 asm, "\t$Pd, $Pg/z, $Zn, $imm5",
5218 bits<5> Zn;
5228 let Inst{9-5} = Zn;
5288 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, immtype:$imm7),
5289 asm, "\t$Pd, $Pg/z, $Zn, $imm7",
5294 bits<5> Zn;
5302 let Inst{9-5} = Zn;
5463 : I<(outs dstOpType:$Vd), (ins PPR3bAny:$Pg, zprty:$Zn),
5464 asm, "\t$Vd, $Pg, $Zn",
5467 bits<5> Zn;
5476 let Inst{9-5} = Zn;
5543 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, zprty:$Zm),
5544 asm, "\t$Pd, $Pg/z, $Zn, $Zm",
5550 bits<5> Zn;
5559 let Inst{9-5} = Zn;
5605 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn),
5606 asm, "\t$Pd, $Pg/z, $Zn, #0.0",
5611 bits<5> Zn;
5618 let Inst{9-5} = Zn;
6068 : I<(outs zprty:$Zd), (ins zprty:$Zn, ZPR64:$Zm),
6069 asm, "\t$Zd, $Zn, $Zm",
6074 bits<5> Zn;
6081 let Inst{9-5} = Zn;
6099 : I<(outs zprty:$Zd), (ins zprty:$Zn, immtype:$imm),
6100 asm, "\t$Zd, $Zn, $imm",
6104 bits<5> Zn;
6113 let Inst{9-5} = Zn;
6411 : I<(outs), (ins listty:$Zt, PPR3bAny:$Pg, zprty:$Zn, GPR64:$Rm),
6412 asm, "\t$Zt, $Pg, [$Zn, $Rm]",
6417 bits<5> Zn;
6425 let Inst{9-5} = Zn;
6437 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn, $Rm]",
6438 (!cast<Instruction>(NAME) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, GPR64:$Rm), 0>;
6439 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6440 (!cast<Instruction>(NAME) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR), 0>;
6441 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6442 (!cast<Instruction>(NAME) Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR), 1>;
6444 …def : Pat <(op (nxv4i32 ZPR32:$Zt), (nxv4i1 PPR3bAny:$Pg), (nxv4i32 ZPR32:$Zn), (i64 GPR64:$Rm), v…
6445 (!cast<Instruction>(NAME) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, GPR64:$Rm)>;
6453 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn, $Rm]",
6454 (!cast<Instruction>(NAME) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm), 0>;
6455 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6456 (!cast<Instruction>(NAME) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR), 0>;
6457 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6458 (!cast<Instruction>(NAME) Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR), 1>;
6460 …def : Pat <(op (nxv2i64 ZPR64:$Zt), (nxv2i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64:$Rm), v…
6461 (!cast<Instruction>(NAME) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
6620 : I<(outs), (ins VecList:$Zt, PPR3bAny:$Pg, zprty:$Zn, imm_ty:$imm5),
6621 asm, "\t$Zt, $Pg, [$Zn, $imm5]",
6626 bits<5> Zn;
6635 let Inst{9-5} = Zn;
6648 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6649 (!cast<Instruction>(NAME # _IMM) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0), 0>;
6650 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn, $imm5]",
6651 … (!cast<Instruction>(NAME # _IMM) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, imm_ty:$imm5), 0>;
6652 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6653 (!cast<Instruction>(NAME # _IMM) Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0), 1>;
6665 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6666 (!cast<Instruction>(NAME # _IMM) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0), 0>;
6667 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn, $imm5]",
6668 … (!cast<Instruction>(NAME # _IMM) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, imm_ty:$imm5), 0>;
6669 def : InstAlias<asm # "\t$Zt, $Pg, [$Zn]",
6670 (!cast<Instruction>(NAME # _IMM) Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0), 1>;
6970 : I<(outs resultRegType:$Rd), (ins PPR3bAny:$Pg, zprty:$Zn),
6971 asm, "\t$Rd, $Pg, $Zn",
6976 bits<5> Zn;
6983 let Inst{9-5} = Zn;
7003 : I<(outs dstRegtype:$Vd), (ins PPR3bAny:$Pg, zprty:$Zn),
7004 asm, "\t$Vd, $Pg, $Zn",
7009 bits<5> Zn;
7016 let Inst{9-5} = Zn;
7078 : I<(outs zprty:$Zd), (ins PPR3bAny:$Pg, VecList:$Zn),
7079 asm, "\t$Zd, $Pg, $Zn",
7083 bits<5> Zn;
7089 let Inst{9-5} = Zn;
7104 : I<(outs zprty:$Zd), (ins zprty:$_Zd, PPR3bAny:$Pg, zprty:$Zn),
7105 asm, "\t$Zd, $Pg/m, $Zn",
7110 bits<5> Zn;
7117 let Inst{9-5} = Zn;
7264 : I<(outs zprty:$Zd), (ins PPR3bAny:$Pg, zprty:$Zn),
7265 asm, "\t$Zd, $Pg, $Zn",
7270 bits<5> Zn;
7275 let Inst{9-5} = Zn;
7683 : I<(outs Z_s:$Zt), (ins PPR3bAny:$Pg, ZPR32:$Zn, imm_ty:$imm5),
7684 asm, "\t$Zt, $Pg/z, [$Zn, $imm5]",
7688 bits<5> Zn;
7698 let Inst{9-5} = Zn;
7712 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
7713 (!cast<Instruction>(NAME # _IMM) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0), 0>;
7714 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn, $imm5]",
7715 … (!cast<Instruction>(NAME # _IMM) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, imm_ty:$imm5), 0>;
7716 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
7717 (!cast<Instruction>(NAME # _IMM) Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0), 1>;
7815 : I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, imm_ty:$imm5),
7816 asm, "\t$prfop, $Pg, [$Zn, $imm5]",
7820 bits<5> Zn;
7829 let Inst{9-5} = Zn;
7839 def : InstAlias<asm # "\t$prfop, $Pg, [$Zn]",
7840 (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0), 1>;
7842 …def : Pat<(op (nxv4i1 PPR_3b:$Pg), (nxv4i32 ZPR32:$Zn), (i64 imm_ty:$imm), (i32 sve_prfop:$prfop)),
7843 (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR_3b:$Pg, ZPR32:$Zn, imm_ty:$imm)>;
7902 asm, "\t$Zt, $Pg/z, [$Zn, $Rm]",
7907 bits<5> Zn;
7918 let Inst{9-5} = Zn;
7928 def NAME : sve2_mem_gldnt_vs_base<opc, (ins PPR3bAny:$Pg, ZPR32:$Zn, GPR64:$Rm), asm, Z_s>;
7930 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn, $Rm]",
7931 (!cast<Instruction>(NAME) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, GPR64:$Rm), 0>;
7932 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
7933 (!cast<Instruction>(NAME) ZPR32:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR), 0>;
7934 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
7935 (!cast<Instruction>(NAME) Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR), 1>;
7944 def NAME : sve2_mem_gldnt_vs_base<opc, (ins PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm), asm, Z_d>;
7946 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn, $Rm]",
7947 (!cast<Instruction>(NAME) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm), 0>;
7948 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
7949 (!cast<Instruction>(NAME) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR), 0>;
7950 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
7951 (!cast<Instruction>(NAME) Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR), 1>;
8056 : I<(outs Z_d:$Zt), (ins PPR3bAny:$Pg, ZPR64:$Zn, imm_ty:$imm5),
8057 asm, "\t$Zt, $Pg/z, [$Zn, $imm5]",
8061 bits<5> Zn;
8071 let Inst{9-5} = Zn;
8084 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
8085 (!cast<Instruction>(NAME # _IMM) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0), 0>;
8086 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn, $imm5]",
8087 … (!cast<Instruction>(NAME # _IMM) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, imm_ty:$imm5), 0>;
8088 def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
8089 (!cast<Instruction>(NAME # _IMM) Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0), 1>;
8146 : I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, imm_ty:$imm5),
8147 asm, "\t$prfop, $Pg, [$Zn, $imm5]",
8151 bits<5> Zn;
8160 let Inst{9-5} = Zn;
8170 def : InstAlias<asm # "\t$prfop, $Pg, [$Zn]",
8171 (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0), 1>;
8173 …def : Pat<(op (nxv2i1 PPR_3b:$Pg), (nxv2i64 ZPR32:$Zn), (i64 imm_ty:$imm), (i32 sve_prfop:$prfop)),
8174 (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR_3b:$Pg, ZPR32:$Zn, imm_ty:$imm)>;
8183 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprext:$Zm),
8184 asm, "\t$Zd, [$Zn, $Zm]",
8188 bits<5> Zn;
8196 let Inst{9-5} = Zn;
8235 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm),
8236 asm, "\t$Zd, $Zn, $Zm",
8241 bits<5> Zn;
8247 let Inst{9-5} = Zn;
8264 : I<(outs zprty:$Zd), (ins zprty:$Zn),
8265 asm, "\t$Zd, $Zn",
8269 bits<5> Zn;
8276 let Inst{9-5} = Zn;
8298 : I<(outs dstOpType:$Vd), (ins PPR3bAny:$Pg, zprty:$Zn),
8299 asm, "\t$Vd, $Pg, $Zn",
8304 bits<5> Zn;
8312 let Inst{9-5} = Zn;
8371 asm, "\t$Zd, $Pg"#pg_suffix#", $Zn",
8376 bits<5> Zn;
8383 let Inst{9-5} = Zn;
8393 (ins ZPR8:$_Zd, PPR3bAny:$Pg, ZPR8:$Zn)>;
8395 (ins ZPR16:$_Zd, PPR3bAny:$Pg, ZPR16:$Zn)>;
8397 (ins ZPR32:$_Zd, PPR3bAny:$Pg, ZPR32:$Zn)>;
8399 (ins ZPR64:$_Zd, PPR3bAny:$Pg, ZPR64:$Zn)>;
8405 (ins PPR3bAny:$Pg, ZPR8:$Zn)>;
8407 (ins PPR3bAny:$Pg, ZPR16:$Zn)>;
8409 (ins PPR3bAny:$Pg, ZPR32:$Zn)>;
8411 (ins PPR3bAny:$Pg, ZPR64:$Zn)>;
8523 : I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, zprty:$Zm),
8524 asm, "\t$Pd, $Pg/z, $Zn, $Zm",
8530 bits<5> Zn;
8537 let Inst{9-5} = Zn;
8560 : I<(outs ZPR8:$Zd), (ins ZPR8:$Zn, ZPR8:$Zm),
8561 asm, "\t$Zd, $Zn, $Zm",
8563 [(set nxv16i8:$Zd, (op nxv16i8:$Zn, nxv16i8:$Zm))]>, Sched<[]> {
8565 bits<5> Zn;
8570 let Inst{9-5} = Zn;
8581 : I<(outs zprty:$Zd), (ins PPR3bAny:$Pg, zprty:$Zn, zprty:$Zm),
8582 asm, "\t$Zd, $Pg/z, $Zn, $Zm",
8586 bits<5> Zn;
8595 let Inst{9-5} = Zn;
8614 : I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm),
8615 asm, "\t$Zd, $Zn, $Zm",
8619 bits<5> Zn;
8625 let Inst{9-5} = Zn;
8686 : I<(outs dst_ty:$Zda), (ins dst_ty:$_Zda, src_ty:$Zn, src_ty:$Zm),
8687 asm, "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
8689 bits<5> Zn;
8697 let Inst{9-5} = Zn;
8714 : I<(outs dst_ty:$Zda), (ins dst_ty:$_Zda, src1_ty:$Zn, src2_ty:$Zm, iop_ty:$iop),
8715 asm, "\t$Zda, $Zn, $Zm$iop", "", []>, Sched<[]> {
8717 bits<5> Zn;
8724 let Inst{9-5} = Zn;
8745 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR16:$Zn, ZPR16:$Zm),
8746 asm, "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
8749 bits<5> Zn;
8753 let Inst{9-5} = Zn;
8769 : I<(outs ZPR16:$Zd), (ins ZPR16:$_Zd, PPR3bAny:$Pg, ZPR32:$Zn),
8770 asm, "\t$Zd, $Pg/m, $Zn", "", []>, Sched<[]> {
8773 bits<5> Zn;
8778 let Inst{9-5} = Zn;
8798 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR8:$Zn, ZPR8:$Zm), asm,
8799 "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
8801 bits<5> Zn;
8808 let Inst{9-5} = Zn;
8828 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR8:$Zn, ZPR8:$Zm), asm,
8829 "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
8831 bits<5> Zn;
8836 let Inst{9-5} = Zn;
8856 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR8:$Zn, ZPR3b8:$Zm, VectorIndexS32b:$idx),
8857 asm, "\t$Zda, $Zn, $Zm$idx", "", []>, Sched<[]> {
8859 bits<5> Zn;
8867 let Inst{9-5} = Zn;
8887 : I<(outs zprty:$Zda), (ins zprty:$_Zda, zprty:$Zn, zprty:$Zm),
8888 asm, "\t$Zda, $Zn, $Zm", "", []>, Sched<[]> {
8890 bits<5> Zn;
8897 let Inst{9-5} = Zn;
8995 : I<(outs ZPR128:$Zd), (ins ZPR128:$Zn, ZPR128:$Zm),
8996 asm, "\t$Zd, $Zn, $Zm",
9001 bits<5> Zn;
9007 let Inst{9-5} = Zn;
9125 : I<(outs zpr_ty:$Zd), (ins zpr_ty:$_Zd, zpr_ty:$Zn, zpr_ty:$Zm),
9126 asm, "\t$Zd, $Zn, $Zm", "", []>,
9129 bits<5> Zn;
9136 let Inst{9-5} = Zn;
9162 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR16:$Zn, ZPR16:$Zm),
9163 mnemonic, "\t$Zda, $Zn, $Zm",
9166 bits<5> Zn;
9172 let Inst{9-5} = Zn;
9188 : I<(outs ZPR32:$Zda), (ins ZPR32:$_Zda, ZPR16:$Zn, ZPR3b16:$Zm, VectorIndexS32b:$i2),
9189 mnemonic, "\t$Zda, $Zn, $Zm$i2",
9192 bits<5> Zn;
9200 let Inst{9-5} = Zn;
9292 : I<(outs ZPR16:$Zd), (ins ZZ_s_mul_r:$Zn),
9293 mnemonic, "\t$Zd, $Zn",
9296 bits<4> Zn;
9304 let Inst{9-6} = Zn;
9318 : I<(outs ZPR16:$Zd), (ins ZZ_s_mul_r:$Zn, tvecshiftR16:$imm4),
9319 mnemonic, "\t$Zd, $Zn, $imm4",
9322 bits<4> Zn;
9332 let Inst{9-6} = Zn;
9704 : I<(outs Z_q:$Zt), (ins PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm),
9705 mnemonic, "\t$Zt, $Pg/z, [$Zn, $Rm]",
9708 bits<5> Zn;
9715 let Inst{9-5} = Zn;
9726 def : InstAlias<mnemonic # " $Zt, $Pg/z, [$Zn]",
9727 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR), 1>;
9730 def : Pat<(nxv2i64 (op (nxv2i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv2i64)),
9731 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9732 def : Pat<(nxv4i32 (op (nxv4i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv4i32)),
9733 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9734 def : Pat<(nxv8i16 (op (nxv8i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv8i16)),
9735 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9736 def : Pat<(nxv16i8 (op (nxv16i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv16i8)),
9737 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9739 def : Pat<(nxv2f64 (op (nxv2i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv2f64)),
9740 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9741 def : Pat<(nxv4f32 (op (nxv4i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv4f32)),
9742 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9743 def : Pat<(nxv8f16 (op (nxv8i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv8f16)),
9744 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9745 def : Pat<(nxv8bf16 (op (nxv8i1 PPR3bAny:$Pg), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nxv8bf16)),
9746 (!cast<Instruction>(NAME) PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm)>;
9750 : I<(outs ), (ins Z_q:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, GPR64:$Rm),
9751 mnemonic, "\t$Zt, $Pg, [$Zn, $Rm]",
9754 bits<5> Zn;
9761 let Inst{9-5} = Zn;
9772 def : InstAlias<mnemonic # " $Zt, $Pg, [$Zn]",
9773 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR), 1>;
9775 …def : Pat<(op (nxv2i64 Z_q:$Zt), (nxv2i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nx…
9776 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9777 …def : Pat<(op (nxv4i32 Z_q:$Zt), (nxv4i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nx…
9778 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9779 …def : Pat<(op (nxv8i16 Z_q:$Zt), (nxv8i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nx…
9780 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp,ZPR64:$Zn, GPR64:$Rm)>;
9781 …def : Pat<(op (nxv16i8 Z_q:$Zt), (nxv16i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), n…
9782 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9784 …def : Pat<(op (nxv2f64 Z_q:$Zt), (nxv2i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nx…
9785 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9786 …def : Pat<(op (nxv4f32 Z_q:$Zt), (nxv4i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nx…
9787 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9788 …def : Pat<(op (nxv8f16 Z_q:$Zt), (nxv8i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), nx…
9789 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9790 …def : Pat<(op (nxv8bf16 Z_q:$Zt), (nxv8i1 PPR3bAny:$gp), (nxv2i64 ZPR64:$Zn), (i64 GPR64sp:$Rm), n…
9791 (!cast<Instruction>(NAME) Z_q:$Zt, PPR3bAny:$gp, ZPR64:$Zn, GPR64:$Rm)>;
9862 : I<(outs V128:$Vd), (ins PPR3bAny:$Pg, zpr_ty:$Zn),
9863 mnemonic, "\t$Vd." # vec_sfx # ", $Pg, $Zn",
9866 bits<5> Zn;
9874 let Inst{9-5} = Zn;
9894 : I<(outs zprty:$Zd), (ins zprty:$Zn, itype:$index),
9895 mnemonic, "\t$Zd, $Zn$index",
9898 bits<5> Zn;
9902 let Inst{9-5} = Zn;
9975 : I<(outs ppr_ty:$Pd), (ins ZPRAny:$Zn, itype:$index),
9976 mnemonic, "\t$Pd, $Zn$index",
9979 bits<5> Zn;
9985 let Inst{9-5} = Zn;
10008 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10009 (!cast<Instruction>(NAME # _B) PPR8:$Pd, ZPRAny:$Zn, 0), 1>;
10010 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10011 (!cast<Instruction>(NAME # _H) PPR16:$Pd, ZPRAny:$Zn, 0), 0>;
10012 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10013 (!cast<Instruction>(NAME # _S) PPR32:$Pd, ZPRAny:$Zn, 0), 0>;
10014 def : InstAlias<mnemonic # "\t$Pd, $Zn",
10015 (!cast<Instruction>(NAME # _D) PPR64:$Pd, ZPRAny:$Zn, 0), 0>;
10018 def : Pat<(nxv16i1 (Op_lane (nxv16i8 ZPRAny:$Zn), (i32 timm32_0_0:$Idx))),
10019 (!cast<Instruction>(NAME # _B) ZPRAny:$Zn, timm32_0_0:$Idx)>;
10020 def : Pat<(nxv8i1 (Op_lane (nxv8i16 ZPRAny:$Zn), (i32 timm32_0_1:$Idx))),
10021 (!cast<Instruction>(NAME # _H) ZPRAny:$Zn, timm32_0_1:$Idx)>;
10022 def : Pat<(nxv4i1 (Op_lane (nxv4i32 ZPRAny:$Zn), (i32 timm32_0_3:$Idx))),
10023 (!cast<Instruction>(NAME # _S) ZPRAny:$Zn, timm32_0_3:$Idx)>;
10024 def : Pat<(nxv2i1 (Op_lane (nxv2i64 ZPRAny:$Zn), (i32 timm32_0_7:$Idx))),
10025 (!cast<Instruction>(NAME # _D) ZPRAny:$Zn, timm32_0_7:$Idx)>;
10027 def : Pat<(nxv16i1 (Op (nxv16i8 ZPRAny:$Zn))),
10028 (!cast<Instruction>(NAME # _B) ZPRAny:$Zn, 0)>;
10029 def : Pat<(nxv8i1 (Op (nxv8i16 ZPRAny:$Zn))),
10030 (!cast<Instruction>(NAME # _H) ZPRAny:$Zn, 0)>;
10031 def : Pat<(nxv4i1 (Op (nxv4i32 ZPRAny:$Zn))),
10032 (!cast<Instruction>(NAME # _S) ZPRAny:$Zn, 0)>;
10033 def : Pat<(nxv2i1 (Op (nxv2i64 ZPRAny:$Zn))),
10034 (!cast<Instruction>(NAME # _D) ZPRAny:$Zn, 0)>;
10107 : I<(outs V128:$Vd), (ins PPR3bAny:$Pg, zpr_ty:$Zn),
10108 mnemonic, "\t$Vd." # vec_sfx # ", $Pg, $Zn",
10111 bits<5> Zn;
10121 let Inst{9-5} = Zn;
10143 : I<(outs zpr_ty:$Zd), (ins src1_ty:$Zn, zpr_ty:$Zm),
10144 mnemonic, "\t$Zd, $Zn, $Zm",
10147 bits<5> Zn;
10155 let Inst{9-5} = Zn;
10205 : I<(outs dst_ty:$Zd), (ins src_ty:$Zn),
10206 mnemonic, "\t$Zd, $Zn",
10209 bits<5> Zn;
10214 let Inst{9-5} = Zn;
10225 : I<(outs dst_ty:$Zd), (ins src_ty:$Zn),
10226 mnemonic, "\t$Zd, $Zn",
10229 bits<4> Zn;
10232 let Inst{9-6} = Zn;
10244 (ins ZPR16:$_Zda, ZPR8:$Zn, ZPR3b8:$Zm, VectorIndexB:$imm4),
10245 mnemonic, "\t$Zda, $Zn, $Zm$imm4",
10248 bits<5> Zn;
10258 let Inst{9-5} = Zn;
10268 (ins dst_ty:$_Zda, ZPR8:$Zn, ZPR8:$Zm),
10269 mnemonic, "\t$Zda, $Zn, $Zm",
10272 bits<5> Zn;
10281 let Inst{9-5} = Zn;
10291 (ins ZPR32:$_Zda, ZPR8:$Zn, ZPR3b8:$Zm, VectorIndexB:$imm4),
10292 mnemonic, "\t$Zda, $Zn, $Zm$imm4",
10295 bits<5> Zn;
10305 let Inst{9-5} = Zn;
10325 : I<(outs zd_ty:$Zd), (ins zn_ty:$Zn, ZPRAny:$Zm, idx_ty:$idx),
10326 mnemonic, "\t$Zd, $Zn, $Zm$idx",
10329 bits<5> Zn;
10337 let Inst{9-5} = Zn;