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Searched refs:ZERO (Results 1 – 25 of 185) sorted by relevance

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/freebsd/contrib/netbsd-tests/lib/libc/net/
H A Dt_ether_aton.c73 #define ZERO { 0, 0, 0, 0, 0, 0 } macro
74 { ZERO, "0:1:2-3:04:05:06", ENAMETOOLONG },
75 { ZERO, "0:1:2-3:04:", ENOBUFS },
76 { ZERO, "0:1:2-3:04:x7", EINVAL },
77 { ZERO, "1:x-3:04:05:7", EINVAL },
78 { ZERO, NULL, 0 },
/freebsd/contrib/ntp/sntp/tests/
H A DpacketHandling.c234 ZERO(rpkt);
235 ZERO(host);
248 ZERO(rpkt);
249 ZERO(host);
262 ZERO(rpkt); in test_HandleKodDemobilize()
263 ZERO(host); in test_HandleKodDemobilize()
280 ZERO(rpkt); in test_HandleKodRate()
282 ZERO(host); in test_HandleKodRate()
303 ZERO(rpkt); in test_HandleCorrectPacket()
304 ZERO(hos in test_HandleCorrectPacket()
[all...]
/freebsd/sys/contrib/openzfs/module/zcommon/
H A Dzfs_fletcher_aarch64_neon.c79 : [ZERO] "=w" (ZERO), \
108 : [ZERO] "w" (ZERO), [IP] "Q" (*ip))
129 register unsigned char ZERO asm("v0") __attribute__((vector_size(16))); in fletcher_4_aarch64_neon_native()
138 unsigned char ZERO __attribute__((vector_size(16))); in fletcher_4_aarch64_neon_native() local
164 register unsigned char ZERO asm("v0") __attribute__((vector_size(16))); in fletcher_4_aarch64_neon_byteswap()
173 unsigned char ZERO __attribute__((vector_size(16))); in fletcher_4_aarch64_neon_byteswap() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp83 unsigned ZERO = Mips::ZERO; in expandAtomicCmpSwapSubword() local
168 .addReg(ZERO) in expandAtomicCmpSwapSubword()
212 unsigned LL, SC, ZERO, BNE, BEQ, MOVE; in expandAtomicCmpSwap() local
231 ZERO = Mips::ZERO; in expandAtomicCmpSwap()
236 ZERO = Mips::ZERO_64; in expandAtomicCmpSwap()
285 BuildMI(loop2MBB, DL, TII->get(MOVE), Scratch).addReg(NewVal).addReg(ZERO); in expandAtomicCmpSwap()
289 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB); in expandAtomicCmpSwap()
483 .addReg(Mips::ZERO) in expandAtomicBinOpSubword()
520 .addReg(Mips::ZERO) in expandAtomicBinOpSubword()
556 .addReg(Mips::ZERO); in expandAtomicBinOpSubword()
[all …]
H A DMipsMTInstrInfo.td180 def : MipsInstAlias<"dmt", (DMT ZERO), 1>, ASE_MT;
182 def : MipsInstAlias<"emt", (EMT ZERO), 1>, ASE_MT;
184 def : MipsInstAlias<"dvpe", (DVPE ZERO), 1>, ASE_MT;
186 def : MipsInstAlias<"evpe", (EVPE ZERO), 1>, ASE_MT;
188 def : MipsInstAlias<"yield $rs", (YIELD ZERO, GPR32Opnd:$rs), 1>, ASE_MT;
H A DMipsInstrInfo.cpp59 .addReg(Mips::ZERO) in getNop()
60 .addReg(Mips::ZERO) in getNop()
82 return BuildMI(MBB, MI, DL, get(Opc), Mips::ZERO) in insertNop()
83 .addReg(Mips::ZERO) in insertNop()
490 (I->getOperand(0).getReg() == Mips::ZERO || in getEquivalentCompactForm()
493 (I->getOperand(1).getReg() == Mips::ZERO || in getEquivalentCompactForm()
699 (MI.getOperand(1).getReg() == Mips::ZERO || in isAsCheapAsAMove()
741 ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO, TRI, false); in genInstrWithNewOpc()
986 if (SrcReg == Mips::ZERO || SrcReg == Mips::ZERO_64) { in describeLoadedValue()
H A DMipsSEFrameLowering.cpp413 unsigned ZERO = ABI.GetNullPtr(); in emitPrologue() local
497 BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO) in emitPrologue()
510 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO).addImm(MaxAlign); in emitPrologue()
518 .addReg(ZERO); in emitPrologue()
600 unsigned SrcReg = Mips::ZERO; in emitInterruptPrologueStub()
630 .addReg(Mips::ZERO) in emitInterruptPrologueStub()
639 .addReg(Mips::ZERO) in emitInterruptPrologueStub()
666 unsigned ZERO = ABI.GetNullPtr(); in emitEpilogue() local
678 BuildMI(MBB, I, DL, TII.get(MOVE), SP).addReg(FP).addReg(ZERO); in emitEpilogue()
721 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::DI), Mips::ZERO); in emitInterruptEpilogueStub()
/freebsd/contrib/bmake/unit-tests/
H A Dcond-func-empty.mk13 ZERO= 0
85 .if empty(ZERO)
87 .elif ${ZERO}
89 .elif ${ZERO} == ""
/freebsd/contrib/llvm-project/libc/src/__support/fixed_point/
H A Dfx_rep.h51 LIBC_INLINE static constexpr Type ZERO() { return 0.0HR; }
71 LIBC_INLINE static constexpr Type ZERO() { return 0.0UHR; }
91 LIBC_INLINE static constexpr Type ZERO() { return 0.0R; }
111 LIBC_INLINE static constexpr Type ZERO() { return 0.0UR; }
131 LIBC_INLINE static constexpr Type ZERO() { return 0.0LR; }
151 LIBC_INLINE static constexpr Type ZERO() { return 0.0ULR; }
171 LIBC_INLINE static constexpr Type ZERO() { return 0.0HK; }
191 LIBC_INLINE static constexpr Type ZERO() { return 0.0UHK; }
211 LIBC_INLINE static constexpr Type ZERO() { return 0.0K; }
231 LIBC_INLINE static constexpr Type ZERO() { return 0.0UK; }
[all …]
H A Dfx_bits.h155 return (x < FXRep::ZERO() ? -x : x); in abs()
172 T all_ones = bit_not(FXRep::ZERO()); in round()
176 (shift == FXRep::TOTAL_LEN) ? FXRep::ZERO() : (all_ones << shift); in round()
215 LIBC_CRASH_ON_VALUE(y, FXRep::ZERO()); in idiv()
H A Dsqrt.h188 return FXRep<T>::ZERO();
219 return FXRep<OutType>::ZERO();
246 return FXRep<OutType>::ZERO();
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsInstPrinter.cpp277 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) && in printAlias()
279 (isReg<Mips::ZERO>(MI, 1) && in printAlias()
288 return isReg<Mips::ZERO>(MI, 1) && in printAlias()
296 return isReg<Mips::ZERO>(MI, 0) && in printAlias()
309 return (isReg<Mips::ZERO>(MI, 0) && in printAlias()
324 return isReg<Mips::ZERO>(MI, 2) && in printAlias()
334 return isReg<Mips::ZERO>(MI, 2) && in printAlias()
H A DMipsTargetStreamer.cpp302 emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI); in emitEmptyDelaySlot()
309 emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in emitEmptyDelaySlot()
314 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI); in emitNop()
316 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in emitNop()
353 if (BaseReg != Mips::ZERO) in emitStoreWithImmOffset()
388 if (BaseReg != Mips::ZERO) in emitLoadWithImmOffset()
1334 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI); in emitDirectiveCpsetup()
1373 Inst.addOperand(MCOperand::createReg(Mips::ZERO)); in emitDirectiveCpreturn()
H A DMipsABIInfo.cpp94 return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO; in GetNullPtr()
98 return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO; in GetZeroReg()
/freebsd/crypto/openssl/crypto/bn/asm/
H A Dbn-c64xplus.asm57 [B0] ZERO A19 ; high part of accumulator
87 [B0] ZERO A19 ; high part of accumulator
138 [B0] ZERO A1 ; carry flag
163 [B0] ZERO A2 ; borrow flag
207 ||[ A1] ZERO A1
234 || ZERO B19 ; high part of accumulator
244 || ZERO B7
246 || ZERO A1
274 || ZERO.S B19 ; high part of accumulator
H A Drsaz-avx2.pl420 $ZERO = $ACC9;
438 vpxor $ZERO, $ZERO, $ZERO
441 vpblendd \$3, $ZERO, $TEMP1, $TEMP0
444 vpblendd \$3, $TEMP2, $ZERO, $TEMP2
670 vpxor $ZERO, $ZERO, $ZERO
694 vpblendd \$3, $ZERO, $TEMP1, $TEMP0
702 vpblendd \$3, $TEMP4, $ZERO, $TEMP4
718 vpblendd \$3, $ZERO, $TEMP1, $TEMP0
728 vpblendd \$3, $TEMP4, $ZERO, $TEMP4
751 vpblendd \$3, $ZERO, $TEMP1, $TEMP0
[all …]
/freebsd/tools/test/devrandom/
H A Dhammer.urandom10 open(ZERO, "/dev/zero") || die "Cannot open /dev/zero - $!\n";
15 sysread(ZERO, $b, 20);
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp110 (RA.getReg() != PPC::ZERO && RA.getReg() != PPC::ZERO8); in checkOpConstraints()
123 (RT.getReg() == PPC::ZERO || RT.getReg() == PPC::ZERO8)) in checkOpConstraints()
209 if (RA.getReg() == PPC::ZERO || RA.getReg() == PPC::ZERO8) in checkOpConstraints()
220 if (RA.getReg() == PPC::ZERO || RA.getReg() == PPC::ZERO8) in checkOpConstraints()
/freebsd/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_debug.cpp68 int volatile *ZERO = (int *)0; in __kmp_debug_assert() local
69 ++(*ZERO); in __kmp_debug_assert()
/freebsd/crypto/openssl/crypto/ec/curve448/
H A Dfield.h78 static const gf ZERO = { { { 0 } } }, ONE = { { { 1 } } }; variable
127 gf_sub(c, ZERO, c); in gf_mulw()
153 gf_sub(y, ZERO, x); in gf_cond_neg()
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/
H A Ddfsqrt.S278 #define ZERO r11:10 macro
281 ZERO = #0 define
284 REM_HI_TMP = sub(REM_HI,ZERO,P_CARRY1):carry
300 REM_HI_TMP = sub(REM_HI,ZERO,P_CARRY2):carry
314 P_TMP = cmp.eq(REM_LO,ZERO) // is the low part zero
H A Ddfaddsub.S121 #define ZERO r15:14 macro
122 ZERO = #0 define
125 NO_STICKIES = cmp.eq(ATMP2,ZERO)
297 #undef ZERO
/freebsd/contrib/ntp/libntp/
H A Dsyssignal.c38 ZERO(vec); in signal_no_reset()
72 ZERO(sv); in signal_no_reset()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2014 if (Inst.getOperand(1).getReg() == Mips::ZERO || in processInstruction()
2040 if (Inst.getOperand(SecondOp).getReg() == Mips::ZERO || in processInstruction()
2042 if (Inst.getOperand(FirstOp).getReg() == Mips::ZERO || in processInstruction()
2055 BInst.addOperand(MCOperand::createReg(Mips::ZERO)); in processInstruction()
2056 BInst.addOperand(MCOperand::createReg(Mips::ZERO)); in processInstruction()
2934 SrcReg.isValid() && SrcReg != Mips::ZERO && SrcReg != Mips::ZERO_64; in loadAndAddSymbolAddress()
3250 case Mips::ZERO: return Mips::AT; in nextReg()
3281 case Mips::RA: return Mips::ZERO; in nextReg()
3408 MCRegister TmpReg = Mips::ZERO; in expandLoadSingleImmToFPR()
3416 if (TmpReg != Mips::ZERO && loadImmediate(ImmOp32, TmpReg, MCRegister(), in expandLoadSingleImmToFPR()
[all …]
/freebsd/contrib/ntp/ntpd/
H A Dntp_signd.c41 ZERO(addr); in ux_socket_connect()
167 ZERO(samba_pkt); in send_via_ntp_signd()

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