| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 396 bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
399 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
410 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
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| H A D | AArch64ISelLowering.cpp | 7096 EVT XVT, ExpVT; in LowerFLDEXP() local
7105 XVT = MVT::nxv4f32; in LowerFLDEXP()
7109 XVT = MVT::nxv2f64; in LowerFLDEXP()
7117 DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, XVT, DAG.getUNDEF(XVT), X, Zero); in LowerFLDEXP()
7120 SDValue VPg = getPTrue(DAG, DL, XVT.changeVectorElementType(MVT::i1), in LowerFLDEXP()
7123 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, XVT, in LowerFLDEXP()
21354 EVT XVT = Op0.getOperand(0).getValueType(); in areLoadedOffsetButOtherwiseSame() local
21355 if (XVT.getScalarSizeInBits() != 8 && XVT.getScalarSizeInBits() != 16 && in areLoadedOffsetButOtherwiseSame()
21356 XVT.getScalarSizeInBits() != 32) in areLoadedOffsetButOtherwiseSame()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1249 shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
1252 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
1263 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
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| H A D | X86ISelDAGToDAG.cpp | 2113 MVT XVT = X.getSimpleValueType(); in foldMaskAndShiftToExtract() local
2117 SDValue NewMask = DAG.getConstant(0xff, DL, XVT); in foldMaskAndShiftToExtract()
2118 SDValue Srl = DAG.getNode(ISD::SRL, DL, XVT, X, Eight); in foldMaskAndShiftToExtract()
2119 SDValue And = DAG.getNode(ISD::AND, DL, XVT, Srl, NewMask); in foldMaskAndShiftToExtract()
2301 MVT XVT = X.getSimpleValueType(); in foldMaskAndShiftToScale() local
2304 SDValue NewSRL = DAG.getNode(ISD::SRL, DL, XVT, X, NewSRLAmt); in foldMaskAndShiftToScale()
2360 MVT XVT = X.getSimpleValueType(); in foldMaskedShiftToBEXTR() local
2364 SDValue NewSRL = DAG.getNode(ISD::SRL, DL, XVT, X, NewSRLAmt); in foldMaskedShiftToBEXTR()
2365 SDValue NewMask = DAG.getConstant(Mask >> AMShiftAmt, DL, XVT); in foldMaskedShiftToBEXTR()
2366 SDValue NewAnd = DAG.getNode(ISD::AND, DL, XVT, NewSRL, NewMask); in foldMaskedShiftToBEXTR()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 249 bool shouldTransformSignedTruncationCheck(EVT XVT,
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| H A D | RISCVISelLowering.cpp | 20721 EVT XVT, unsigned KeptBits) const { in shouldTransformSignedTruncationCheck() argument
20723 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
20726 if (XVT != MVT::i32 && XVT != MVT::i64) in shouldTransformSignedTruncationCheck()
20735 ((KeptBits == 8 && XVT == MVT::i64 && !Subtarget.is64Bit()) || in shouldTransformSignedTruncationCheck()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6153 EVT XVT = X.getValueType(); in hoistLogicOpWithSameOpcodeHands() local
6163 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
6168 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
6174 LegalTypes && !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
6180 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y, LogicFlags); in hoistLogicOpWithSameOpcodeHands()
6193 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
6196 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
6200 if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT)) in hoistLogicOpWithSameOpcodeHands()
6202 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
6204 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
[all …]
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| H A D | TargetLowering.cpp | 4309 EVT XVT = X.getValueType(); in optimizeSetCCOfSignedTruncationCheck() local
4344 assert(XVT.isInteger()); in optimizeSetCCOfSignedTruncationCheck()
4345 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
4358 assert(KeptBits > 0 && KeptBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
4362 if (!shouldTransformSignedTruncationCheck(XVT, KeptBits)) in optimizeSetCCOfSignedTruncationCheck()
4368 ISD::SIGN_EXTEND_INREG, DL, XVT, X, in optimizeSetCCOfSignedTruncationCheck()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 856 virtual bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4098 EVT XVT = X.getValueType(); in performShlCombine() local
4099 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(CRHS, 0)); in performShlCombine()
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