| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1163 shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
1166 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
1177 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
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| H A D | X86ISelDAGToDAG.cpp | 2055 MVT XVT = X.getSimpleValueType(); in foldMaskAndShiftToExtract() local
2059 SDValue NewMask = DAG.getConstant(0xff, DL, XVT); in foldMaskAndShiftToExtract()
2060 SDValue Srl = DAG.getNode(ISD::SRL, DL, XVT, X, Eight); in foldMaskAndShiftToExtract()
2061 SDValue And = DAG.getNode(ISD::AND, DL, XVT, Srl, NewMask); in foldMaskAndShiftToExtract()
2243 MVT XVT = X.getSimpleValueType(); in foldMaskAndShiftToScale() local
2246 SDValue NewSRL = DAG.getNode(ISD::SRL, DL, XVT, X, NewSRLAmt); in foldMaskAndShiftToScale()
2302 MVT XVT = X.getSimpleValueType(); in foldMaskedShiftToBEXTR() local
2306 SDValue NewSRL = DAG.getNode(ISD::SRL, DL, XVT, X, NewSRLAmt); in foldMaskedShiftToBEXTR()
2307 SDValue NewMask = DAG.getConstant(Mask >> AMShiftAmt, DL, XVT); in foldMaskedShiftToBEXTR()
2308 SDValue NewAnd = DAG.getNode(ISD::AND, DL, XVT, NewSRL, NewMask); in foldMaskedShiftToBEXTR()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 889 bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
892 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
903 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
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| H A D | AArch64ISelLowering.cpp | 6657 EVT XVT, ExpVT; in LowerFLDEXP() local
6666 XVT = MVT::nxv4f32; in LowerFLDEXP()
6670 XVT = MVT::nxv2f64; in LowerFLDEXP()
6678 DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, XVT, DAG.getUNDEF(XVT), X, Zero); in LowerFLDEXP()
6681 SDValue VPg = getPTrue(DAG, DL, XVT.changeVectorElementType(MVT::i1), in LowerFLDEXP()
6684 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, XVT, in LowerFLDEXP()
20610 EVT XVT = Op0.getOperand(0).getValueType(); in areLoadedOffsetButOtherwiseSame() local
20611 if (XVT.getScalarSizeInBits() != 8 && XVT.getScalarSizeInBits() != 16 && in areLoadedOffsetButOtherwiseSame()
20612 XVT.getScalarSizeInBits() != 32) in areLoadedOffsetButOtherwiseSame()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 697 bool shouldTransformSignedTruncationCheck(EVT XVT,
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| H A D | RISCVISelLowering.cpp | 17632 EVT XVT, unsigned KeptBits) const { in shouldTransformSignedTruncationCheck() argument
17634 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
17637 if (XVT != MVT::i32 && XVT != MVT::i64) in shouldTransformSignedTruncationCheck()
17646 ((KeptBits == 8 && XVT == MVT::i64 && !Subtarget.is64Bit()) || in shouldTransformSignedTruncationCheck()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5778 EVT XVT = X.getValueType(); in hoistLogicOpWithSameOpcodeHands() local
5788 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
5793 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
5799 LegalTypes && !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
5802 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
5815 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
5818 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
5822 if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT)) in hoistLogicOpWithSameOpcodeHands()
5824 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
5826 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
[all …]
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| H A D | TargetLowering.cpp | 4097 EVT XVT = X.getValueType(); in optimizeSetCCOfSignedTruncationCheck() local
4132 assert(XVT.isInteger()); in optimizeSetCCOfSignedTruncationCheck()
4133 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
4146 assert(KeptBits > 0 && KeptBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
4151 XVT, KeptBits)) in optimizeSetCCOfSignedTruncationCheck()
4157 ISD::SIGN_EXTEND_INREG, DL, XVT, X, in optimizeSetCCOfSignedTruncationCheck()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 826 virtual bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4029 EVT XVT = X.getValueType(); in performShlCombine() local
4030 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0)); in performShlCombine()
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