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/freebsd/sys/contrib/libsodium/src/libsodium/crypto_pwhash/scryptsalsa208sha256/sse/
H A Dpwhash_scryptsalsa208sha256_sse.c67 ARX(X1, X0, X3, 7) \
68 ARX(X2, X1, X0, 9) \
69 ARX(X3, X2, X1, 13) \
73 X1 = _mm_shuffle_epi32(X1, 0x93); \
78 ARX(X3, X0, X1, 7) \
80 ARX(X1, X2, X3, 13) \
81 ARX(X0, X1, X2, 18) \
84 X1 = _mm_shuffle_epi32(X1, 0x39); \
94 __m128i Y1 = X1 = _mm_xor_si128(X1, (in)[1]); \
101 (out)[1] = X1 = _mm_add_epi32(X1, Y1); \
[all …]
/freebsd/crypto/openssl/crypto/seed/
H A Dseed_local.h57 # define KEYSCHEDULE_UPDATE0(T0, T1, X1, X2, X3, X4, KC) \ argument
61 (T0) = ((X1) + (X3) - (KC)) & 0xffffffff; \
64 # define KEYSCHEDULE_UPDATE1(T0, T1, X1, X2, X3, X4, KC) \ argument
65 (T0) = (X1); \
66 (X1) = (((X1)>>8) ^ ((X2)<<24)) & 0xffffffff; \
68 (T0) = ((X1) + (X3) - (KC)) & 0xffffffff; \
99 # define E_SEED(T0, T1, X1, X2, X3, X4, rbase) \ argument
109 (X1) ^= (T0); \
/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha256-c64xplus.pl36 ($E,$Ectx,$F,$Fctx,$G,$Gctx,$H,$Hctx,$T1,$S1,$s0,$t0e,$t1e,$t2e,$X1,$X15)
172 || LDW *${Xib}[2],$X1 ; modulo-scheduled
195 || ROTL $X1,25,$t0e ; modulo-scheduled
197 SHRU $X1,3,$s0 ; modulo-scheduled
205 || ROTL $X1,14,$t1e ; modulo-scheduled
211 || MV $X1,$Xn
214 || LDW *${Xib}[2],$X1 ; module-scheduled
247 || ROTL $X1,25,$t0e ; module-scheduled
249 ROTL $X1,14,$t1e ; modulo-scheduled
257 || SHRU $X1,3,$s0 ; modulo-scheduled
/freebsd/crypto/openssl/util/
H A Dfind-unused-errs13 export X1=/tmp/f.1.$$
36 grep "$PAT" * | grep -v ERR_FATAL_ERROR | awk '{print $3;}' | sort -u >$X1
39 for F in `cat $X1` ; do
54 rm $X1 $X2
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d-flex-concentrator.dts208 MX7D_PAD_SD2_CLK__GPIO5_IO12 0x3c /* X1-92 */
233 MX7D_PAD_ENET1_COL__GPIO7_IO15 0x00 /* X1-96 */
237 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x78 /* X1-80 */
244 MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* X1-82 */
245 MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* X1-84 */
246 MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* X1-86 */
247 MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* X1-88 */
248 MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x14 /* X1-90 */
267 MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x74 /* X1-94 */
H A Dimx7-tqma7.dtsi294 * X1-51 (WDOG1#) signal needs carrier board handling to reset
295 * TQMa7 on X1-22 (RESET_IN#).
/freebsd/crypto/openssl/crypto/aria/
H A Daria.c210 static const uint32_t X1[256] = { variable
359 X1[GET_U8_BE(T0, 2)] ^ \
364 X1[GET_U8_BE(T1, 2)] ^ \
369 X1[GET_U8_BE(T2, 2)] ^ \
374 X1[GET_U8_BE(T3, 2)] ^ \
382 X1[GET_U8_BE(T0, 0)] ^ \
387 X1[GET_U8_BE(T1, 0)] ^ \
392 X1[GET_U8_BE(T2, 0)] ^ \
397 X1[GET_U8_BE(T3, 0)] ^ \
512 (uint8_t)(X1[GET_U8_BE(reg0, 0)] ), in ossl_aria_encrypt()
[all …]
/freebsd/sys/contrib/openzfs/module/icp/algs/skein/
H A Dskein_block.c89 uint64_t X0, X1, X2, X3; in Skein_256_Process_Block() local
95 Xptr[1] = &X1; in Skein_256_Process_Block()
124 X1 = w[1] + ks[1] + ts[0]; in Skein_256_Process_Block()
146 X1 += ks[((R) + 2) % 5] + ts[((R) + 1) % 3]; \ in Skein_256_Process_Block()
157 X1 += ks[r + (R) + 1] + ts[r + (R) + 0]; \ in Skein_256_Process_Block()
236 ctx->X[1] = X1 ^ w[1]; in Skein_256_Process_Block()
293 uint64_t X0, X1, X2, X3, X4, X5, X6, X7; in Skein_512_Process_Block() local
299 Xptr[1] = &X1; in Skein_512_Process_Block()
338 X1 = w[1] + ks[1]; in Skein_512_Process_Block()
364 X1 += ks[((R) + 2) % 9]; \ in Skein_512_Process_Block()
[all …]
/freebsd/sys/crypto/skein/
H A Dskein_block.c81 u64b_t X0,X1,X2,X3; /* local copy of context vars, for speed */ in Skein_256_Process_Block() local
85 Xptr[0] = &X0; Xptr[1] = &X1; Xptr[2] = &X2; Xptr[3] = &X3; in Skein_256_Process_Block()
108 X1 = w[1] + ks[1] + ts[0]; in Skein_256_Process_Block()
129 X1 += ks[((R)+2) % 5] + ts[((R)+1) % 3]; \ in Skein_256_Process_Block()
140 X1 += ks[r+(R)+1] + ts[r+(R)+0]; \ in Skein_256_Process_Block()
214 ctx->X[1] = X1 ^ w[1]; in Skein_256_Process_Block()
266 u64b_t X0,X1,X2,X3,X4,X5,X6,X7; /* local copy of vars, for speed */ in Skein_512_Process_Block() local
270 Xptr[0] = &X0; Xptr[1] = &X1; Xptr[2] = &X2; Xptr[3] = &X3; in Skein_512_Process_Block()
300 X1 = w[1] + ks[1]; in Skein_512_Process_Block()
325 X1 += ks[((R)+2) % 9]; \ in Skein_512_Process_Block()
[all …]
/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/channel_program/lua_core/
H A Dtst.lib_table.lua46 local X1, X2 = 0, 1
49 local V = (X1*A2 + X2*A1) % D20
51 X1 = V/D20
52 X2 = V - X1*D20
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A DCOFFDirectiveParser.cpp40 OPTION(X1,X2,ID,KIND,GROUP,ALIAS,X7,X8,X9,X10,X11,X12) global() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td43 // However, on windows, in some circumstances, the SRet is passed in X0 or X1
45 // passed in the alternative register (X0 or X1), not X8:
47 // - X1 for instance methods.
57 CCIfSRet<CCIfType<[i64], CCAssignToReg<[X0, X1]>>>>>,
95 [X0, X1, X3, X5]>>>,
100 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6, X7]>>,
146 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6, X7]>>,
197 CCIfSRet<CCIfType<[i64], CCAssignToReg<[X0, X1]>>>>>,
210 CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3]>>,
265 [X0, X1, X2, X3]>>,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVCallingConv.td16 def CSR_ILP32E_LP64E : CalleeSavedRegs<(add X1, X8, X9)>;
47 def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 5, 31))>;
H A DRISCVAsmPrinter.cpp168 RISCVMatInt::generateMCInstSeq(CallTarget, *STI, RISCV::X1, Seq); in LowerPATCHPOINT()
174 .addReg(RISCV::X1) in LowerPATCHPOINT()
175 .addReg(RISCV::X1) in LowerPATCHPOINT()
220 .addReg(RISCV::X1) in LowerSTATEPOINT()
226 .addReg(RISCV::X1) in LowerSTATEPOINT()
691 .addReg(RISCV::X1) in EmitHwasanMemaccessSymbols()
802 MCInstBuilder(RISCV::SD).addReg(RISCV::X1).addReg(RISCV::X2).addImm(1 * in EmitHwasanMemaccessSymbols()
H A DRISCVRegisterInfo.td88 def X1 : RISCVReg<1, "x1", ["ra"]>, DwarfRegNum<[1]>;
163 def GPRX1 : GPRRegisterClass<(add X1)>;
172 // Don't use X1 or X5 for JALR since that is a hint to pop the return address
198 def GPRX1X5 : GPRRegisterClass<(add X1, X5)>;
564 // Dummy zero register for use in the register pair containing X0 (as X1 is
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCTargetDesc.cpp65 InitRISCVMCRegisterInfo(X, RISCV::X1); in createRISCVMCRegisterInfo()
135 return Reg - RISCV::X1; in getRegIndex()
306 return Reg == RISCV::X1 || Reg == RISCV::X5; in maybeReturnAddress()
/freebsd/secure/caroot/trusted/
H A DISRG_Root_X1.pem2 ## ISRG Root X1
20 Issuer: C = US, O = Internet Security Research Group, CN = ISRG Root X1
24 Subject: C = US, O = Internet Security Research Group, CN = ISRG Root X1
125 3BebYhtF8GaV0nxvwuo77x/Py9auJ/GpsMiu/X1+mvoiBOv/2X/qkSsisRcOj/KK
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DImmutableList.h239 static bool isEqual(ImmutableList<T> X1, ImmutableList<T> X2) {
240 return X1 == X2;
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-tqma8mpql-mba8mp-ras314.dts371 /* X1 ID_I2C */
404 /* X1 I2C */
415 /* X1 I2C on GPIO24/GPIO25 */
484 /* X1 UART1 */
573 /* X1 SD card on GPIO22-GPIO27 */
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp736 TargetInstrInfo::RegSubRegPair X1, Y1; in matchSwap() local
737 X1 = getSubRegForIndex(X, Xsub, I); in matchSwap()
742 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
745 .addReg(X1.Reg, 0, X1.SubReg).getInstr(); in matchSwap()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp565 Value *X1; in tryToRecognizeTableBasedCttz() local
570 m_LShr(m_Mul(m_c_And(m_Neg(m_Value(X1)), m_Deferred(X1)), in tryToRecognizeTableBasedCttz()
575 unsigned InputBits = X1->getType()->getScalarSizeInBits(); in tryToRecognizeTableBasedCttz()
592 Type *XType = X1->getType(); in tryToRecognizeTableBasedCttz()
593 auto Cttz = B.CreateIntrinsic(Intrinsic::cttz, {XType}, {X1, BoolConst}); in tryToRecognizeTableBasedCttz()
601 auto Cmp = B.CreateICmpEQ(X1, ConstantInt::get(XType, 0)); in tryToRecognizeTableBasedCttz()
/freebsd/crypto/libecc/src/curves/
H A Dprj_pt.c305 fp X1, X2, Y1, Y2; in prj_pt_cmp() local
307 X1.magic = X2.magic = Y1.magic = Y2.magic = WORD(0); in prj_pt_cmp()
315 ret = fp_init(&X1, (in1->X).ctx); EG(ret, err); in prj_pt_cmp()
325 ret = fp_mul_monty(&X1, &(in1->X), &(in2->Z)); EG(ret, err); in prj_pt_cmp()
330 ret = fp_mul_monty(&X1, &(in1->X), &(in2->Z)); EG(ret, err); in prj_pt_cmp()
334 ret = fp_cmp(&X1, &X2, &x_cmp); EG(ret, err); in prj_pt_cmp()
345 fp_uninit(&X1); in prj_pt_cmp()
357 fp X1, X2; in _prj_pt_eq_or_opp_X() local
358 X1.magic = X2.magic = WORD(0); in _prj_pt_eq_or_opp_X()
365 ret = fp_init(&X1, (in1->X).ctx); EG(ret, err); in _prj_pt_eq_or_opp_X()
[all …]
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_aead/aes256gcm/aesni/
H A Daead_aes256gcm_aesni.c62 __m128i X0, X1, X2, X3; in aesni_key256_expand() local
72 X1 = _mm_shuffle_epi32(_mm_aeskeygenassist_si128(X2, (S)), 0xff); \ in aesni_key256_expand()
76 X0 = _mm_xor_si128(_mm_xor_si128(X0, X3), X1); \ in aesni_key256_expand()
81 X1 = _mm_shuffle_epi32(_mm_aeskeygenassist_si128(X0, (S)), 0xaa); \ in aesni_key256_expand()
85 X2 = _mm_xor_si128(_mm_xor_si128(X2, X3), X1); \ in aesni_key256_expand()
333 __m128i X1 = X1_; \
/freebsd/sys/crypto/aesni/
H A Daesni_ghash.c162 __m128i X1, __m128i X2, __m128i X3, __m128i X4, __m128i *res) in reduce4() argument
171 H1_X1_lo = _mm_clmulepi64_si128(H1, X1, 0x00); in reduce4()
180 H1_X1_hi = _mm_clmulepi64_si128(H1, X1, 0x11); in reduce4()
190 tmp4 = _mm_shuffle_epi32(X1, 78); in reduce4()
192 tmp4 = _mm_xor_si128(tmp4, X1); in reduce4()
/freebsd/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerUtil.h72 const char *X1, const char *X2); in CloneArgsWithoutX()

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