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Searched refs:VecVT (Results 1 – 25 of 33) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2199 EVT VecVT = VecOp.getValueType(); in shouldScalarizeBinop()
2200 if (!isOperationLegalOrCustomOrPromote(Opc, VecVT)) in shouldScalarizeBinop()
2207 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop()
2522 // Attempt to decompose a subvector insert/extract between VecVT and
2529 MVT VecVT, MVT SubVecVT, unsigned InsertExtractIdx, in decomposeSubvectorInsertExtractToSubRegs()
2535 unsigned VecRegClassID = getRegClassIDForVecVT(VecVT); in decomposeSubvectorInsertExtractToSubRegs()
2547 VecVT = VecVT.getHalfNumVectorElementsVT(); in decomposeSubvectorInsertExtractToSubRegs()
2549 InsertExtractIdx >= VecVT.getVectorElementCount().getKnownMinValue(); in decomposeSubvectorInsertExtractToSubRegs()
2551 getSubregIndexByMVT(VecVT, IsH in decomposeSubvectorInsertExtractToSubRegs()
2198 EVT VecVT = VecOp.getValueType(); shouldScalarizeBinop() local
2528 decomposeSubvectorInsertExtractToSubRegs(MVT VecVT,MVT SubVecVT,unsigned InsertExtractIdx,const RISCVRegisterInfo * TRI) decomposeSubvectorInsertExtractToSubRegs() argument
2753 getMaskTypeFor(MVT VecVT) getMaskTypeFor() argument
2761 getAllOnesMask(MVT VecVT,SDValue VL,const SDLoc & DL,SelectionDAG & DAG) getAllOnesMask() argument
2781 getDefaultScalableVLOps(MVT VecVT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getDefaultScalableVLOps() argument
2803 getDefaultVLOps(MVT VecVT,MVT ContainerVT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getDefaultVLOps() argument
2812 computeVLMax(MVT VecVT,const SDLoc & DL,SelectionDAG & DAG) const computeVLMax() argument
2820 computeVLMAXBounds(MVT VecVT,const RISCVSubtarget & Subtarget) computeVLMAXBounds() argument
4795 MVT VecVT = EvenV.getSimpleValueType(); getWideningInterleave() local
8082 MVT VecVT = Op.getSimpleValueType(); lowerSPLAT_VECTOR_PARTS() local
8112 MVT VecVT = Op.getSimpleValueType(); lowerVectorMaskExt() local
8186 MVT VecVT = Src.getSimpleValueType(); lowerVectorMaskTruncLike() local
8418 getSmallestVTForIndex(MVT VecVT,unsigned MaxIdx,SDLoc DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getSmallestVTForIndex() argument
8447 MVT VecVT = Op.getSimpleValueType(); lowerINSERT_VECTOR_ELT() local
8618 MVT VecVT = Vec.getSimpleValueType(); lowerEXTRACT_VECTOR_ELT() local
9714 MVT VecVT = Vec.getSimpleValueType(); lowerVectorMaskVecReduction() local
9804 const MVT VecVT = Vec.getSimpleValueType(); lowerReductionSeq() local
9852 MVT VecVT = VecEVT.getSimpleVT(); lowerVECREDUCE() local
9925 MVT VecVT = VectorVal.getSimpleValueType(); lowerFPVECREDUCE() local
9973 MVT VecVT = VecEVT.getSimpleVT(); lowerVPREDUCE() local
10013 MVT VecVT = Vec.getSimpleValueType(); lowerINSERT_SUBVECTOR() local
10250 MVT VecVT = Vec.getSimpleValueType(); lowerEXTRACT_SUBVECTOR() local
10451 MVT VecVT = Op.getSimpleValueType(); lowerVECTOR_DEINTERLEAVE() local
10527 MVT VecVT = Op.getSimpleValueType(); lowerVECTOR_INTERLEAVE() local
10648 MVT VecVT = Op.getSimpleValueType(); lowerVECTOR_REVERSE() local
10725 MVT VecVT = Op.getSimpleValueType(); lowerVECTOR_SPLICE() local
12672 MVT VecVT = Vec.getSimpleValueType(); ReplaceNodeResults() local
12854 MVT VecVT = Vec.getSimpleValueType(); ReplaceNodeResults() local
17403 MVT VecVT = Src.getSimpleValueType(); PerformDAGCombine() local
17531 MVT VecVT = N->getOperand(0).getSimpleValueType(); PerformDAGCombine() local
[all...]
H A DRISCVISelLowering.h796 SDValue computeVLMax(MVT VecVT, const SDLoc &DL, SelectionDAG &DAG) const;
818 decomposeSubvectorInsertExtractToSubRegs(MVT VecVT, MVT SubVecVT,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp370 EVT VecVT = N->getValueType(0); in ExpandOp_BUILD_VECTOR() local
371 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_BUILD_VECTOR()
376 assert(OldVT == VecVT.getVectorElementType() && in ExpandOp_BUILD_VECTOR()
397 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_BUILD_VECTOR()
408 EVT VecVT = N->getValueType(0); in ExpandOp_INSERT_VECTOR_ELT() local
409 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_INSERT_VECTOR_ELT()
416 assert(OldEVT == VecVT.getVectorElementType() && in ExpandOp_INSERT_VECTOR_ELT()
439 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_INSERT_VECTOR_ELT()
H A DLegalizeVectorTypes.cpp1601 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_SUBVECTOR()
1604 unsigned VecElems = VecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1619 if (VecVT.isScalableVector() == SubVecVT.isScalableVector() && in SplitVecRes_INSERT_SUBVECTOR()
1629 Align SmallestAlign = DAG.getReducedAlign(VecVT, /*UseABI=*/false); in SplitVecRes_INSERT_SUBVECTOR()
1631 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_SUBVECTOR()
1641 TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, SubVecVT, Idx); in SplitVecRes_INSERT_SUBVECTOR()
1858 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, ResNE); in SplitVecRes_OverflowOp()
1859 return DAG.getBuildVector(VecVT, dl, Scalars); in SplitVecRes_OverflowOp()
1928 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_VECTOR_ELT()
1929 EVT EltVT = VecVT in SplitVecRes_INSERT_VECTOR_ELT()
1597 EVT VecVT = Vec.getValueType(); SplitVecRes_INSERT_SUBVECTOR() local
1854 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, ResNE); UnrollVectorOp_StrictFP() local
1924 EVT VecVT = Vec.getValueType(); SplitVecRes_INSERT_VECTOR_ELT() local
3324 EVT VecVT = VecOp.getValueType(); SplitVecOp_VECREDUCE() local
3346 EVT VecVT = VecOp.getValueType(); SplitVecOp_VECREDUCE_SEQ() local
3369 EVT VecVT = VecOp.getValueType(); SplitVecOp_VP_REDUCE() local
3515 EVT VecVT = Vec.getValueType(); SplitVecOp_EXTRACT_SUBVECTOR() local
3537 EVT VecVT = Vec.getValueType(); SplitVecOp_EXTRACT_VECTOR_ELT() local
[all...]
H A DLegalizeVectorOps.cpp600 MVT VecVT = Node->getOperand(0).getSimpleValueType(); in PromoteSETCC() local
601 MVT NewVecVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VecVT); in PromoteSETCC()
603 unsigned ExtOp = VecVT.isFloatingPoint() ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in PromoteSETCC()
625 MVT VecVT = Node->getOperand(1).getSimpleValueType(); in PromoteSTRICT() local
626 MVT NewVecVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VecVT); in PromoteSTRICT()
628 assert(VecVT.isFloatingPoint()); in PromoteSTRICT()
656 DAG.getNode(ISD::STRICT_FP_ROUND, DL, {VecVT, MVT::Other}, in PromoteSTRICT()
H A DLegalizeDAG.cpp1419 EVT VecVT = Vec.getValueType(); in ExpandExtractFromVectorThroughStack() local
1423 StackPtr = DAG.CreateStackTemporary(VecVT); in ExpandExtractFromVectorThroughStack()
1425 StackPtr, DAG.getMachineFunction(), VecVT.isScalableVector()); in ExpandExtractFromVectorThroughStack()
1436 StackPtr = TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, in ExpandExtractFromVectorThroughStack()
1441 StackPtr = TLI.getVectorElementPointer(DAG, StackPtr, VecVT, Idx); in ExpandExtractFromVectorThroughStack()
1443 MachinePointerInfo(), VecVT.getVectorElementType(), in ExpandExtractFromVectorThroughStack()
1469 EVT VecVT = Vec.getValueType(); in ExpandInsertToVectorThroughStack() local
1471 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in ExpandInsertToVectorThroughStack()
1485 TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, PartVT, Idx); in ExpandInsertToVectorThroughStack()
1493 TLI.getVectorElementPointer(DAG, StackPtr, VecVT, Idx); in ExpandInsertToVectorThroughStack()
[all …]
H A DTargetLowering.cpp871 EVT VecVT = Vec.getValueType(); in SimplifyMultipleUseDemandedBits() local
872 if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements()) && in SimplifyMultipleUseDemandedBits()
1221 EVT VecVT = Vec.getValueType(); in SimplifyDemandedBits() local
1226 if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements())) { in SimplifyDemandedBits()
10108 EVT VecVT, const SDLoc &dl, in clampDynamicVectorIndex() argument
10110 assert(!(SubEC.isScalable() && VecVT.isFixedLengthVector()) && in clampDynamicVectorIndex()
10113 unsigned NElts = VecVT.getVectorMinNumElements(); in clampDynamicVectorIndex()
10117 if (VecVT.isScalableVector() && !SubEC.isScalable()) { in clampDynamicVectorIndex()
10142 SDValue VecPtr, EVT VecVT, in getVectorElementPointer() argument
10145 DAG, VecPtr, VecVT, in getVectorElementPointer()
[all …]
H A DDAGCombiner.cpp12058 EVT VecVT = Vec.getValueType(); in visitVECTOR_COMPRESS() local
12072 EVT ScalarVT = VecVT.getVectorElementType(); in visitVECTOR_COMPRESS()
12074 unsigned NumElmts = VecVT.getVectorNumElements(); in visitVECTOR_COMPRESS()
12096 return DAG.getBuildVector(VecVT, DL, Ops); in visitVECTOR_COMPRESS()
22413 EVT VecVT = VecOp.getValueType(); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() local
22414 assert(!VecVT.isScalableVector() && "Only for fixed vectors."); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
22421 assert(IndexC->getZExtValue() < VecVT.getVectorNumElements() && in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
22425 unsigned VecEltBitWidth = VecVT.getScalarSizeInBits(); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
22427 if (VecVT.getScalarType() != ScalarVT) in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
22461 if (!(E.NumBits > 0 && E.BitPos < VecVT.getSizeInBits() && in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
[all …]
H A DSelectionDAG.cpp3995 EVT VecVT = InVec.getValueType(); in computeKnownBits() local
3997 if (VecVT.isScalableVector()) in computeKnownBits()
3999 const unsigned EltBitWidth = VecVT.getScalarSizeInBits(); in computeKnownBits()
4000 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in computeKnownBits()
4900 EVT VecVT = InVec.getValueType(); in ComputeNumSignBits() local
4902 if (VecVT.isScalableVector()) in ComputeNumSignBits()
4906 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in ComputeNumSignBits()
5330 EVT VecVT = Op.getOperand(0).getValueType(); in canCreateUndefOrPoison() local
5335 return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements()); in canCreateUndefOrPoison()
7560 [[maybe_unused]] EVT VecVT = N1.getValueType(); in getNode() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4357 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC, in getVCmpInst() argument
4362 if (VecVT.isFloatingPoint()) { in getVCmpInst()
4385 if (VecVT == MVT::v4f32) in getVCmpInst()
4387 else if (VecVT == MVT::v2f64) in getVCmpInst()
4392 if (VecVT == MVT::v4f32) in getVCmpInst()
4394 else if (VecVT == MVT::v2f64) in getVCmpInst()
4399 if (VecVT == MVT::v4f32) in getVCmpInst()
4401 else if (VecVT == MVT::v2f64) in getVCmpInst()
4429 if (VecVT == MVT::v16i8) in getVCmpInst()
4431 else if (VecVT == MVT::v8i16) in getVCmpInst()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp825 VecVT = MVT::getVectorVT(MVT::getIntegerVT(8), 16); in isVectorConstantLegal()
838 VecVT = MVT::getVectorVT(MVT::getIntegerVT(SplatBitSize), in isVectorConstantLegal()
851 VecVT = MVT::getVectorVT(MVT::getIntegerVT(SplatBitSize), in isVectorConstantLegal()
5943 EVT VecVT = Op0.getValueType(); in lowerEXTRACT_VECTOR_ELT() local
5948 unsigned Mask = VecVT.getVectorNumElements() - 1; in lowerEXTRACT_VECTOR_ELT()
5955 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT()
6527 EVT VecVT, SDValue Op, in combineExtract() argument
6534 unsigned BytesPerElement = VecVT.getVectorElementType().getStoreSize(); in combineExtract()
6620 if (Op.getValueType() != VecVT) { in combineExtract()
6621 Op = DAG.getNode(ISD::BITCAST, DL, VecVT, Op); in combineExtract()
[all …]
H A DSystemZISelLowering.h729 SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
819 MVT VecVT; member
H A DSystemZISelDAGToDAG.cpp1183 assert(VCI.VecVT.getSizeInBits() == 128 && "Expected a vector type"); in loadVectorConstant()
1189 SDValue Op = CurDAG->getNode(VCI.Opcode, DL, VCI.VecVT, Ops); in loadVectorConstant()
1191 if (VCI.VecVT == VT.getSimpleVT()) in loadVectorConstant()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp3218 EVT VecVT = VecOp.getValueType(); in shouldScalarizeBinop() local
3219 if (!isOperationLegalOrCustomOrPromote(Opc, VecVT)) in shouldScalarizeBinop()
3224 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop()
7088 MVT VecVT = MVT::getVectorVT(VecSVT, VT.getSizeInBits() / LoadSizeInBits); in EltsFromConsecutiveLoads() local
7092 VecVT = MVT::v4f32; in EltsFromConsecutiveLoads()
7093 if (TLI.isTypeLegal(VecVT)) { in EltsFromConsecutiveLoads()
7094 SDVTList Tys = DAG.getVTList(VecVT, MVT::Other); in EltsFromConsecutiveLoads()
7688 MVT VecVT = VT.getSizeInBits() >= 8 ? VT : MVT::v8i1; in LowerBUILD_VECTORvXi1() local
7689 Select = DAG.getBitcast(VecVT, Select); in LowerBUILD_VECTORvXi1()
7707 MVT VecVT = VT.getSizeInBits() >= 8 ? VT : MVT::v8i1; in LowerBUILD_VECTORvXi1() local
[all …]
H A DX86ISelLoweringCall.cpp1617 MVT VecVT = MVT::Other; in forwardMustTailParameters() local
1622 VecVT = MVT::v16f32; in forwardMustTailParameters()
1624 VecVT = MVT::v8f32; in forwardMustTailParameters()
1626 VecVT = MVT::v4f32; in forwardMustTailParameters()
1632 if (VecVT != MVT::Other) in forwardMustTailParameters()
1633 RegParmTypes.push_back(VecVT); in forwardMustTailParameters()
H A DX86ISelDAGToDAG.cpp425 MVT VecVT = N->getOperand(0).getSimpleValueType(); in getExtractVEXTRACTImmediate() local
426 return getI8Imm((Index * VecVT.getScalarSizeInBits()) / VecWidth, DL); in getExtractVEXTRACTImmediate()
433 MVT VecVT = N->getSimpleValueType(0); in getInsertVINSERTImmediate() local
434 return getI8Imm((Index * VecVT.getScalarSizeInBits()) / VecWidth, DL); in getInsertVINSERTImmediate()
441 MVT VecVT = N->getSimpleValueType(0); in getPermuteVINSERTCommutedImmediate() local
442 uint64_t InsertIdx = (Index * VecVT.getScalarSizeInBits()) / VecWidth; in getPermuteVINSERTCommutedImmediate()
1266 MVT VecVT = VT == MVT::f64 ? MVT::v2f64 in PreprocessISelDAG() local
1271 SDValue Op0 = CurDAG->getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, in PreprocessISelDAG()
1273 SDValue Op1 = CurDAG->getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, in PreprocessISelDAG()
1278 EVT IntVT = EVT(VecVT).changeVectorElementTypeToInteger(); in PreprocessISelDAG()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp6233 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NE); in lowerLaneOp() local
6234 return DAG.getBuildVector(VecVT, SL, Scalars); in lowerLaneOp()
6277 MVT VecVT = MVT::getVectorVT(MVT::i32, ValSize / 32); in lowerLaneOp() local
6278 Src0 = DAG.getBitcast(VecVT, Src0); in lowerLaneOp()
6281 Src1 = DAG.getBitcast(VecVT, Src1); in lowerLaneOp()
6284 Src2 = DAG.getBitcast(VecVT, Src2); in lowerLaneOp()
6286 SDValue LaneOp = createLaneOp(Src0, Src1, Src2, VecVT); in lowerLaneOp()
7152 EVT VecVT = Vec.getValueType(); in lowerINSERT_SUBVECTOR() local
7154 EVT EltVT = VecVT.getVectorElementType(); in lowerINSERT_SUBVECTOR()
7163 unsigned VecNumElts = VecVT.getVectorNumElements(); in lowerINSERT_SUBVECTOR()
[all …]
H A DR600ISelLowering.cpp624 EVT VecVT = Vector.getValueType(); in vectorToVerticalVector() local
625 EVT EltVT = VecVT.getVectorElementType(); in vectorToVerticalVector()
628 for (unsigned i = 0, e = VecVT.getVectorNumElements(); i != e; ++i) { in vectorToVerticalVector()
633 return DAG.getNode(AMDGPUISD::BUILD_VERTICAL_VECTOR, DL, VecVT, Args); in vectorToVerticalVector()
H A DAMDGPUISelLowering.h228 bool aggressivelyPreferBuildVectorSources(EVT VecVT) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9978 EVT VecVT; in LowerFCOPYSIGN() local
9982 DAG.getTargetInsertSubreg(Idx, DL, VecVT, DAG.getUNDEF(VecVT), In1); in LowerFCOPYSIGN()
9984 DAG.getTargetInsertSubreg(Idx, DL, VecVT, DAG.getUNDEF(VecVT), In2); in LowerFCOPYSIGN()
9986 VecVal1 = BitCast(VecVT, In1, DAG); in LowerFCOPYSIGN()
9987 VecVal2 = BitCast(VecVT, In2, DAG); in LowerFCOPYSIGN()
9991 VecVT = IntVT; in LowerFCOPYSIGN()
9994 VecVT = MVT::v2i64; in LowerFCOPYSIGN()
9997 VecVT = MVT::v4i32; in LowerFCOPYSIGN()
10000 VecVT = MVT::v8i16; in LowerFCOPYSIGN()
10007 SDValue SignMaskV = DAG.getConstant(~APInt::getSignMask(BitWidth), DL, VecVT); in LowerFCOPYSIGN()
[all …]
H A DAArch64TargetTransformInfo.cpp512 static bool isUnpackedVectorVT(EVT VecVT) { in isUnpackedVectorVT() argument
513 return VecVT.isScalableVector() && in isUnpackedVectorVT()
514 VecVT.getSizeInBits().getKnownMinValue() < AArch64::SVEBitsPerBlock; in isUnpackedVectorVT()
634 EVT VecVT = getTLI()->getValueType(DL, ICA.getArgTypes()[0]); in getIntrinsicInstrCost() local
640 if (isUnpackedVectorVT(VecVT) || isUnpackedVectorVT(SubVecVT)) in getIntrinsicInstrCost()
646 getTLI()->getTypeConversion(C, VecVT); in getIntrinsicInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.h602 bool aggressivelyPreferBuildVectorSources(EVT VecVT) const override { in aggressivelyPreferBuildVectorSources() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6236 EVT VecVT = EVT::getVectorVT( in CombineVMOVDRRCandidateWithVecOp() local
6239 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
8099 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR() local
8100 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR()
8156 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerBUILD_VECTOR() local
8160 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
9009 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerVECTOR_SHUFFLE() local
9010 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
9011 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
9022 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
[all …]
H A DARMISelDAGToDAG.cpp4303 EVT VecVT = N->getValueType(0); in Select() local
4304 EVT EltVT = VecVT.getVectorElementType(); in Select()
4305 unsigned NumElts = VecVT.getVectorNumElements(); in Select()
4309 N, createDRegPairNode(VecVT, N->getOperand(0), N->getOperand(1))); in Select()
4315 N, createSRegPairNode(VecVT, N->getOperand(0), N->getOperand(1))); in Select()
4320 createQuadSRegsNode(VecVT, N->getOperand(0), N->getOperand(1), in Select()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3361 virtual bool aggressivelyPreferBuildVectorSources(EVT VecVT) const { in aggressivelyPreferBuildVectorSources() argument
5420 SDValue getVectorElementPointer(SelectionDAG &DAG, SDValue VecPtr, EVT VecVT,
5428 SDValue getVectorSubVecPointer(SelectionDAG &DAG, SDValue VecPtr, EVT VecVT,

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