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Searched refs:VecSize (Results 1 – 25 of 35) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86ShuffleDecode.cpp480 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMILPMask() local
481 unsigned NumLanes = VecSize / 128; in DecodeVPERMILPMask()
483 assert((VecSize == 128 || VecSize == 256 || VecSize == 512) && in DecodeVPERMILPMask()
502 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMIL2PMask() local
503 unsigned NumLanes = VecSize / 128; in DecodeVPERMIL2PMask()
505 assert((VecSize == 128 || VecSize == 256) && "Unexpected vector size"); in DecodeVPERMIL2PMask()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVExtract.cpp156 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction() local
165 SR == 0 ? 0 : VecSize/2); in runOnMachineFunction()
H A DHexagonPatternsHVX.td96 int32_t VecSize = HRI->getSpillSize(Hexagon::HvxVRRegClass);
97 assert(isPowerOf2_32(VecSize));
98 if ((uint32_t(V) & (uint32_t(VecSize)-1)) != 0)
100 int32_t L = Log2_32(VecSize);
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp1406 SIInstrInfo::getIndirectGPRIDXPseudo(unsigned VecSize, in getIndirectGPRIDXPseudo() argument
1409 if (VecSize <= 32) // 4 bytes in getIndirectGPRIDXPseudo()
1411 if (VecSize <= 64) // 8 bytes in getIndirectGPRIDXPseudo()
1413 if (VecSize <= 96) // 12 bytes in getIndirectGPRIDXPseudo()
1415 if (VecSize <= 128) // 16 bytes in getIndirectGPRIDXPseudo()
1417 if (VecSize <= 160) // 20 bytes in getIndirectGPRIDXPseudo()
1419 if (VecSize <= 256) // 32 bytes in getIndirectGPRIDXPseudo()
1421 if (VecSize <= 288) // 36 bytes in getIndirectGPRIDXPseudo()
1423 if (VecSize <= 320) // 40 bytes in getIndirectGPRIDXPseudo()
1425 if (VecSize <= 352) // 44 bytes in getIndirectGPRIDXPseudo()
[all …]
H A DAMDGPUISelDAGToDAG.cpp3178 unsigned VecSize = Src.getValueSizeInBits(); in SelectVOP3PMods() local
3182 if (Lo.getValueSizeInBits() > VecSize) { in SelectVOP3PMods()
3184 (VecSize > 32) ? AMDGPU::sub0_sub1 : AMDGPU::sub0, SDLoc(In), in SelectVOP3PMods()
3185 MVT::getIntegerVT(VecSize), Lo); in SelectVOP3PMods()
3188 if (Hi.getValueSizeInBits() > VecSize) { in SelectVOP3PMods()
3190 (VecSize > 32) ? AMDGPU::sub0_sub1 : AMDGPU::sub0, SDLoc(In), in SelectVOP3PMods()
3191 MVT::getIntegerVT(VecSize), Hi); in SelectVOP3PMods()
3194 assert(Lo.getValueSizeInBits() <= VecSize && in SelectVOP3PMods()
3195 Hi.getValueSizeInBits() <= VecSize); in SelectVOP3PMods()
3201 if (VecSize == 32 || VecSize == Lo.getValueSizeInBits()) { in SelectVOP3PMods()
[all …]
H A DSIInstrInfo.h318 const MCInstrDesc &getIndirectRegWriteMovRelPseudo(unsigned VecSize,
322 const MCInstrDesc &getIndirectGPRIDXPseudo(unsigned VecSize,
H A DAMDGPUSwLowerLDS.cpp756 size_t VecSize = RedzonesVec.size(); in poisonRedzones() local
757 for (unsigned i = 0; i < VecSize; i++) { in poisonRedzones()
H A DSIISelLowering.cpp7745 unsigned VecSize = VecVT.getSizeInBits(); in lowerINSERT_VECTOR_ELT() local
7787 assert(VecSize <= 64 && "Expected target vector size to be <= 64 bits"); in lowerINSERT_VECTOR_ELT()
7789 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerINSERT_VECTOR_ELT()
7826 unsigned VecSize = VecVT.getSizeInBits(); in lowerEXTRACT_VECTOR_ELT() local
7838 if (VecSize == 128 || VecSize == 256 || VecSize == 512) { in lowerEXTRACT_VECTOR_ELT()
7842 if (VecSize == 128) { in lowerEXTRACT_VECTOR_ELT()
7850 } else if (VecSize == 256) { in lowerEXTRACT_VECTOR_ELT()
7863 assert(VecSize == 512); in lowerEXTRACT_VECTOR_ELT()
7889 assert(VecSize <= 64); in lowerEXTRACT_VECTOR_ELT()
7891 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerEXTRACT_VECTOR_ELT()
[all …]
H A DAMDGPURegisterBankInfo.cpp4374 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping() local
4380 OpdsMapping[0] = AMDGPU::getValueMapping(OutputBankID, VecSize); in getInstrMapping()
4381 OpdsMapping[1] = AMDGPU::getValueMapping(OutputBankID, VecSize); in getInstrMapping()
H A DSIInstructions.td2575 multiclass SI_INDIRECT_Pattern <ValueType vt, ValueType eltvt, string VecSize> {
2579 (!cast<Instruction>("SI_INDIRECT_SRC_"#VecSize) $src, $idx, imm:$offset)
2585 (!cast<Instruction>("SI_INDIRECT_DST_"#VecSize) $src, $idx, imm:$offset, $val)
/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DHexagon.cpp151 uint64_t VecSize = T.hasFeature("hvx-length64b") ? 64*8 : 128*8; in classifyReturnType() local
152 if (Size == VecSize || Size == 2*VecSize) in classifyReturnType()
H A DARM.cpp767 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
768 if (VecSize == 64 || VecSize == 128) in isHomogeneousAggregateBaseType()
H A DAArch64.cpp677 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
678 if (VecSize == 64 || VecSize == 128) in isHomogeneousAggregateBaseType()
H A DX86.cpp54 unsigned VecSize = Context.getTypeSize(VT); in isX86VectorTypeForVectorCall() local
55 if (VecSize == 128 || VecSize == 256 || VecSize == 512) in isX86VectorTypeForVectorCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h437 VecSize = 3 << VecSizeShift, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1437 unsigned VecSize; in tryLoadParam() local
1442 VecSize = 1; in tryLoadParam()
1445 VecSize = 2; in tryLoadParam()
1448 VecSize = 4; in tryLoadParam()
1457 switch (VecSize) { in tryLoadParam()
1481 if (VecSize == 1) { in tryLoadParam()
1483 } else if (VecSize == 2) { in tryLoadParam()
H A DNVPTXReplaceImageHandles.cpp1758 unsigned VecSize = in processInstr() local
1763 MachineOperand &SurfHandle = MI.getOperand(VecSize); in processInstr()
/freebsd/contrib/llvm-project/llvm/lib/SandboxIR/
H A DConstant.cpp168 unsigned VecSize = V.size(); in getTypeForElements() local
170 EltTypes.reserve(VecSize); in getTypeForElements()
/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaType.cpp2352 std::optional<llvm::APSInt> VecSize = in BuildVectorType() local
2354 if (!VecSize) { in BuildVectorType()
2366 if (!VecSize->isIntN(61)) { in BuildVectorType()
2372 uint64_t VectorSizeBits = VecSize->getZExtValue() * 8; in BuildVectorType()
8465 unsigned VecSize = static_cast<unsigned>(SveVectorSizeInBits.getZExtValue()); in HandleArmSveVectorBitsTypeAttr() local
8468 if (VecSize != S.getLangOpts().VScaleMin * 128) { in HandleArmSveVectorBitsTypeAttr()
8470 << VecSize << S.getLangOpts().VScaleMin * 128; in HandleArmSveVectorBitsTypeAttr()
8490 VecSize /= S.Context.getCharWidth() * S.Context.getCharWidth(); in HandleArmSveVectorBitsTypeAttr()
8493 VecSize /= TypeSize; in HandleArmSveVectorBitsTypeAttr()
8494 CurType = S.Context.getVectorType(EltType, VecSize, VecKind); in HandleArmSveVectorBitsTypeAttr()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp209 unsigned VecSize = VecTy->getNumElements(); in isStructOfMatchingFixedVectors() local
212 if (!VecTy || VecSize != VecTy->getNumElements()) in isStructOfMatchingFixedVectors()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp1270 int VecSize = in isShuffleEquivalentToSelect() local
1274 if (MaskSize != VecSize) in isShuffleEquivalentToSelect()
1281 if (Elt != -1 && Elt != i && Elt != i + VecSize) in isShuffleEquivalentToSelect()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DConstants.cpp1356 unsigned VecSize = V.size(); in getTypeForElements() local
1357 SmallVector<Type*, 16> EltTypes(VecSize); in getTypeForElements()
1358 for (unsigned i = 0; i != VecSize; ++i) in getTypeForElements()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLowOverheadLoops.cpp107 return (Flags & ARMII::VecSize) >> ARMII::VecSizeShift; in getVecSize()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp2530 size_t VecSize = Vec.size(); in SimplifyValuePattern() local
2531 if (VecSize == 1) in SimplifyValuePattern()
2533 if (!isPowerOf2_64(VecSize)) in SimplifyValuePattern()
2535 size_t HalfVecSize = VecSize / 2; in SimplifyValuePattern()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp7001 const unsigned VecSize = 16; in CC_AIX() local
7002 const Align VecAlign(VecSize); in CC_AIX()
7014 const unsigned Offset = State.AllocateStack(VecSize, VecAlign); in CC_AIX()
7040 for (unsigned I = 0; I != VecSize; I += PtrSize) in CC_AIX()
7042 State.AllocateStack(VecSize, VecAlign); in CC_AIX()
7046 const unsigned Offset = State.AllocateStack(VecSize, VecAlign); in CC_AIX()
7053 const unsigned Offset = State.AllocateStack(VecSize, VecAlign); in CC_AIX()
7062 const unsigned Offset = State.AllocateStack(VecSize, VecAlign); in CC_AIX()
7080 const unsigned Offset = State.AllocateStack(VecSize, VecAlign); in CC_AIX()
7083 for (unsigned I = 0; I != VecSize; I += PtrSize) { in CC_AIX()

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