| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/ |
| H A D | VecUtils.h | 33 static bool isEqual(const SmallVector<sandboxir::Value *> &Vec1,
35 return Vec1 == Vec2;
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTStructuralEquivalence.cpp | 1030 const auto *Vec1 = cast<DependentSizedExtVectorType>(T1); in IsStructurallyEquivalent() local
1032 if (!IsStructurallyEquivalent(Context, Vec1->getSizeExpr(), in IsStructurallyEquivalent()
1035 if (!IsStructurallyEquivalent(Context, Vec1->getElementType(), in IsStructurallyEquivalent()
1042 const auto *Vec1 = cast<DependentVectorType>(T1); in IsStructurallyEquivalent() local
1044 if (Vec1->getVectorKind() != Vec2->getVectorKind()) in IsStructurallyEquivalent()
1046 if (!IsStructurallyEquivalent(Context, Vec1->getSizeExpr(), in IsStructurallyEquivalent()
1049 if (!IsStructurallyEquivalent(Context, Vec1->getElementType(), in IsStructurallyEquivalent()
1057 const auto *Vec1 = cast<VectorType>(T1); in IsStructurallyEquivalent() local
1059 if (!IsStructurallyEquivalent(Context, Vec1->getElementType(), in IsStructurallyEquivalent()
1062 if (Vec1->getNumElements() != Vec2->getNumElements()) in IsStructurallyEquivalent()
[all …]
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| H A D | ExprConstant.cpp | 11616 const Expr *Vec1 = E->getExpr(0); in VisitShuffleVectorExpr() local
11617 if (!EvaluateAsRValue(Info, Vec1, VecVal1)) in VisitShuffleVectorExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 1001 auto *Vec1 = dyn_cast<ConstantVector>(Mask1); in isNonTargetIntrinsicMatch() local
1002 if (!Vec0 || !Vec1) in isNonTargetIntrinsicMatch()
1004 if (Vec0->getType() != Vec1->getType()) in isNonTargetIntrinsicMatch()
1008 Constant *Elem1 = Vec1->getOperand(i); in isNonTargetIntrinsicMatch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 2628 SDValue Vec1 = N->getOperand(1); in selectShuffle() local
2629 assert(Vec0.getValueType() == ResTy && Vec1.getValueType() == ResTy); in selectShuffle()
2639 if (!Vec1.isUndef()) { in selectShuffle()
2640 Results.push(TargetOpcode::COPY, ResTy, {Vec1}); in selectShuffle()
2653 Done = scalarizeShuffle(Mask, SDLoc(N), ResTy, Vec0, Vec1, N); in selectShuffle()
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| H A D | HexagonISelLoweringHVX.cpp | 1895 SDValue Vec1 = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in LowerHvxCttz() local
1907 DAG.getNode(ISD::SUB, dl, ResTy, {InpV, Vec1})}); in LowerHvxCttz()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | OpenCLBuiltins.td | 444 def Vec1 : IntList<"Vec1", [1]>;
465 def AGenType1 : GenericType<"AGenType1", TLAll, Vec1>;
469 def AIGenType1 : GenericType<"AIGenType1", TLAllInts, Vec1>;
481 def IntLongFloatGenType1 : GenericType<"IntLongFloatGenType1", TLIntLongFloats, Vec1>;
484 TypeList<[Char, UChar, Short, UShort]>, Vec1>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrMMA.td | 1082 dag Vec1 = (v4i32 (EXTRACT_SUBREG Pair0, sub_vsx1));
1097 Extracts.Vec1>;
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| /freebsd/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 5482 Value *Vec1, *Vec2, *Mask; in parseFunctionBody() local
5484 if (getValueTypePair(Record, OpNum, NextValueNo, Vec1, Vec1TypeID, in parseFunctionBody()
5486 popValue(Record, OpNum, NextValueNo, Vec1->getType(), Vec1TypeID, in parseFunctionBody()
5493 if (!Vec1->getType()->isVectorTy() || !Vec2->getType()->isVectorTy()) in parseFunctionBody()
5496 I = new ShuffleVectorInst(Vec1, Vec2, Mask); in parseFunctionBody()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 769 Value *Vec1 = nullptr; in isFixedVectorShuffle() local
813 if (!Vec1 || Vec1 == Vec) { in isFixedVectorShuffle()
814 Vec1 = Vec; in isFixedVectorShuffle()
17268 Value *Vec1 = nullptr; in processBuildVector() local
17279 Vec1 = ExtractVecBase; in processBuildVector()
17291 if (!Vec1) { in processBuildVector()
17292 Vec1 = VecOp; in processBuildVector()
17293 } else if (Vec1 != VecOp) { in processBuildVector()
17302 IsNonPoisoned &= isGuaranteedNotToBePoison(Vec1, AC) && in processBuildVector()
17304 ShuffleBuilder.add(Vec1, Vec2, ExtractMask); in processBuildVector()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2075 SDValue Vec1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i8, in LowerBITCAST() local
2078 SDValue Extend1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i16, Vec1); in LowerBITCAST()
5850 SDValue Vec1 = in ReplaceBITCAST() local
5854 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2i8, {Vec0, Vec1})); in ReplaceBITCAST()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1977 SDValue Vec1 = IntermedVals[0].first; in ExpandBVWithShuffles() local
1991 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBVWithShuffles()
2092 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1); in ExpandBUILD_VECTOR() local
2100 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBUILD_VECTOR()
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| H A D | SelectionDAG.cpp | 12988 SDValue Vec1 = getBuildVector(VecVT1, dl, Scalars1); in UnrollVectorOp() local
12989 return getMergeValues({Vec0, Vec1}, dl); in UnrollVectorOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 8040 SDValue Vec1 = SVN->getOperand(VecIdx1); in lowerVECTOR_SHUFFLE() local
8041 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, Vec1, in lowerVECTOR_SHUFFLE()
15461 SDValue Vec1 = Op1.getOperand(0); in performFMACombine() local
15488 if (Vec1 == Vec2 || Vec3 == Vec4) in performFMACombine()
15491 if (Vec1.getValueType() != MVT::v2f16 || Vec2.getValueType() != MVT::v2f16) in performFMACombine()
15494 if ((Vec1 == Vec3 && Vec2 == Vec4) || (Vec1 == Vec4 && Vec2 == Vec3)) { in performFMACombine()
15495 return DAG.getNode(AMDGPUISD::FDOT2, SL, MVT::f32, Vec1, Vec2, FMAAcc, in performFMACombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 1974 Register Vec1 = I.getOperand(3).getReg(); in selectIntegerDotExpansion() local
1982 .addUse(Vec1) in selectIntegerDotExpansion()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15468 SDValue Vec1 = Op.getOperand(1); in LowerINSERT_SUBVECTOR() local
15487 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Lo, Vec1, in LowerINSERT_SUBVECTOR()
15490 Hi = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Hi, Vec1, in LowerINSERT_SUBVECTOR()
15513 Vec1 = getSVESafeBitCast(NarrowVT, Vec1, DAG); in LowerINSERT_SUBVECTOR()
15516 Vec1 = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR()
15517 Vec1 = DAG.getNode(AArch64ISD::NVCAST, DL, NarrowVT, Vec1); in LowerINSERT_SUBVECTOR()
15527 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, Vec1, HiVec0); in LowerINSERT_SUBVECTOR()
15533 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, LoVec0, Vec1); in LowerINSERT_SUBVECTOR()
15548 SDValue ScalableVec1 = convertToScalableVector(DAG, VT, Vec1); in LowerINSERT_SUBVECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 51035 SDValue Vec1 = N1.getOperand(0); in combineBitOpWithMOVMSK() local
51037 EVT VecVT1 = Vec1.getValueType(); in combineBitOpWithMOVMSK()
51048 DAG.getNode(VecOpc, DL, VecVT0, Vec0, DAG.getBitcast(VecVT0, Vec1)); in combineBitOpWithMOVMSK()
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