| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTStructuralEquivalence.cpp | 956 const auto *Vec1 = cast<DependentSizedExtVectorType>(T1); in IsStructurallyEquivalent() local
958 if (!IsStructurallyEquivalent(Context, Vec1->getSizeExpr(), in IsStructurallyEquivalent()
961 if (!IsStructurallyEquivalent(Context, Vec1->getElementType(), in IsStructurallyEquivalent()
968 const auto *Vec1 = cast<DependentVectorType>(T1); in IsStructurallyEquivalent() local
970 if (Vec1->getVectorKind() != Vec2->getVectorKind()) in IsStructurallyEquivalent()
972 if (!IsStructurallyEquivalent(Context, Vec1->getSizeExpr(), in IsStructurallyEquivalent()
975 if (!IsStructurallyEquivalent(Context, Vec1->getElementType(), in IsStructurallyEquivalent()
983 const auto *Vec1 = cast<VectorType>(T1); in IsStructurallyEquivalent() local
985 if (!IsStructurallyEquivalent(Context, Vec1->getElementType(), in IsStructurallyEquivalent()
988 if (Vec1->getNumElements() != Vec2->getNumElements()) in IsStructurallyEquivalent()
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| H A D | ExprConstant.cpp | 11087 const Expr *Vec1 = E->getExpr(0); in VisitShuffleVectorExpr() local
11088 if (!EvaluateAsRValue(Info, Vec1, VecVal1)) in VisitShuffleVectorExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 1012 auto *Vec1 = dyn_cast<ConstantVector>(Mask1); in isNonTargetIntrinsicMatch() local
1013 if (!Vec0 || !Vec1) in isNonTargetIntrinsicMatch()
1015 if (Vec0->getType() != Vec1->getType()) in isNonTargetIntrinsicMatch()
1019 Constant *Elem1 = Vec1->getOperand(i); in isNonTargetIntrinsicMatch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 2637 SDValue Vec1 = N->getOperand(1); in selectShuffle()
2638 assert(Vec0.getValueType() == ResTy && Vec1.getValueType() == ResTy); in selectShuffle()
2648 if (!Vec1.isUndef()) { in selectShuffle()
2649 Results.push(TargetOpcode::COPY, ResTy, {Vec1}); in selectShuffle()
2662 Done = scalarizeShuffle(Mask, SDLoc(N), ResTy, Vec0, Vec1, N); in selectShuffle()
2640 SDValue Vec1 = N->getOperand(1); selectShuffle() local
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| H A D | HexagonISelLoweringHVX.cpp | 1880 SDValue Vec1 = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in LowerHvxCttz()
1892 DAG.getNode(ISD::SUB, dl, ResTy, {InpV, Vec1})}); in LowerHvxCttz()
1881 SDValue Vec1 = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, LowerHvxCttz() local
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | OpenCLBuiltins.td | 440 def Vec1 : IntList<"Vec1", [1]>;
461 def AGenType1 : GenericType<"AGenType1", TLAll, Vec1>;
465 def AIGenType1 : GenericType<"AIGenType1", TLAllInts, Vec1>;
477 def IntLongFloatGenType1 : GenericType<"IntLongFloatGenType1", TLIntLongFloats, Vec1>;
480 TypeList<[Char, UChar, Short, UShort]>, Vec1>;
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 565 Value *Vec1 = nullptr; in isFixedVectorShuffle() local
609 if (!Vec1 || Vec1 == Vec) { in isFixedVectorShuffle()
610 Vec1 = Vec; in isFixedVectorShuffle()
12576 Value *Vec1 = nullptr; in processBuildVector() local
12587 Vec1 = ExtractVecBase; in processBuildVector()
12599 if (!Vec1) { in processBuildVector()
12600 Vec1 = VecOp; in processBuildVector()
12601 } else if (Vec1 != VecOp) { in processBuildVector()
12611 isGuaranteedNotToBePoison(Vec1) && isGuaranteedNotToBePoison(Vec2); in processBuildVector()
12612 ShuffleBuilder.add(Vec1, Vec2, ExtractMask); in processBuildVector()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrMMA.td | 1077 dag Vec1 = (v4i32 (EXTRACT_SUBREG Pair0, sub_vsx1));
1092 Extracts.Vec1>;
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| /freebsd/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 5393 Value *Vec1, *Vec2, *Mask; in parseFunctionBody() local
5395 if (getValueTypePair(Record, OpNum, NextValueNo, Vec1, Vec1TypeID, in parseFunctionBody()
5397 popValue(Record, OpNum, NextValueNo, Vec1->getType(), Vec1TypeID, in parseFunctionBody()
5404 if (!Vec1->getType()->isVectorTy() || !Vec2->getType()->isVectorTy()) in parseFunctionBody()
5407 I = new ShuffleVectorInst(Vec1, Vec2, Mask); in parseFunctionBody()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1913 SDValue Vec1 = IntermedVals[0].first; in ExpandBVWithShuffles() local
1927 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBVWithShuffles()
2028 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1); in ExpandBUILD_VECTOR() local
2036 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBUILD_VECTOR()
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| H A D | SelectionDAG.cpp | 12417 SDValue Vec1 = getBuildVector(VT1, dl, Scalars1); in UnrollVectorOp() local
12418 return getMergeValues({Vec0, Vec1}, dl); in UnrollVectorOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7426 SDValue Vec1 = SVN->getOperand(VecIdx1); in lowerVECTOR_SHUFFLE() local
7428 Vec1, DAG.getConstant(EltIdx1, SL, MVT::i32)); in lowerVECTOR_SHUFFLE()
14461 SDValue Vec1 = Op1.getOperand(0); in performFMACombine() local
14488 if (Vec1 == Vec2 || Vec3 == Vec4) in performFMACombine()
14491 if (Vec1.getValueType() != MVT::v2f16 || Vec2.getValueType() != MVT::v2f16) in performFMACombine()
14494 if ((Vec1 == Vec3 && Vec2 == Vec4) || in performFMACombine()
14495 (Vec1 == Vec4 && Vec2 == Vec3)) { in performFMACombine()
14496 return DAG.getNode(AMDGPUISD::FDOT2, SL, MVT::f32, Vec1, Vec2, FMAAcc, in performFMACombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14569 SDValue Vec1 = Op.getOperand(1); in LowerINSERT_SUBVECTOR() local
14588 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Lo, Vec1, in LowerINSERT_SUBVECTOR()
14591 Hi = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Hi, Vec1, in LowerINSERT_SUBVECTOR()
14610 Vec1 = getSVESafeBitCast(WideVT, Vec1, DAG); in LowerINSERT_SUBVECTOR()
14613 Vec1 = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR()
14622 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, Vec1, HiVec0); in LowerINSERT_SUBVECTOR()
14627 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, LoVec0, Vec1); in LowerINSERT_SUBVECTOR()
14642 SDValue ScalableVec1 = convertToScalableVector(DAG, VT, Vec1); in LowerINSERT_SUBVECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 49281 SDValue Vec1 = N1.getOperand(0); in combineBitOpWithMOVMSK() local
49283 EVT VecVT1 = Vec1.getValueType(); in combineBitOpWithMOVMSK()
49295 DAG.getNode(VecOpc, DL, VecVT0, Vec0, DAG.getBitcast(VecVT0, Vec1)); in combineBitOpWithMOVMSK()
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