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Searched refs:ValVT (Results 1 – 25 of 50) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.cpp26 static bool CC_X86_32_RegCall_Assign2Regs(unsigned &ValNo, MVT &ValVT, in CC_X86_32_RegCall_Assign2Regs() argument
60 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_X86_32_RegCall_Assign2Regs()
67 static ArrayRef<MCPhysReg> CC_X86_VectorCallGetSSEs(const MVT &ValVT) { in CC_X86_VectorCallGetSSEs() argument
68 if (ValVT.is512BitVector()) { in CC_X86_VectorCallGetSSEs()
74 if (ValVT.is256BitVector()) { in CC_X86_VectorCallGetSSEs()
90 static bool CC_X86_VectorCallAssignRegister(unsigned &ValNo, MVT &ValVT, in CC_X86_VectorCallAssignRegister() argument
96 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister()
107 CCValAssign::getReg(ValNo, ValVT, AssigedReg, LocVT, LocInfo)); in CC_X86_VectorCallAssignRegister()
112 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_X86_VectorCallAssignRegister()
128 static bool CC_X86_64_VectorCall(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_X86_64_VectorCall() argument
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H A DX86CallingConv.h23 bool RetCC_X86(unsigned ValNo, MVT ValVT, MVT LocVT,
27 bool CC_X86(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo,
H A DX86ISelLoweringCall.cpp701 EVT ValVT = ValArg.getValueType(); in lowerMasksToReg() local
703 if (ValVT == MVT::v1i1) in lowerMasksToReg()
707 if ((ValVT == MVT::v8i1 && (ValLoc == MVT::i8 || ValLoc == MVT::i32)) || in lowerMasksToReg()
708 (ValVT == MVT::v16i1 && (ValLoc == MVT::i16 || ValLoc == MVT::i32))) { in lowerMasksToReg()
712 EVT TempValLoc = ValVT == MVT::v8i1 ? MVT::i8 : MVT::i16; in lowerMasksToReg()
719 if ((ValVT == MVT::v32i1 && ValLoc == MVT::i32) || in lowerMasksToReg()
720 (ValVT == MVT::v64i1 && ValLoc == MVT::i64)) { in lowerMasksToReg()
786 EVT ValVT = ValToCopy.getValueType(); in LowerReturn() local
794 if (ValVT.isVector() && ValVT.getVectorElementType() == MVT::i1) in LowerReturn()
812 ValVT == MVT::f64) { in LowerReturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp20 static bool f64AssignAPCS(unsigned ValNo, MVT ValVT, MVT LocVT, in f64AssignAPCS() argument
27 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in f64AssignAPCS()
35 ValNo, ValVT, State.AllocateStack(8, Align(4)), LocVT, LocInfo)); in f64AssignAPCS()
41 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in f64AssignAPCS()
44 ValNo, ValVT, State.AllocateStack(4, Align(4)), LocVT, LocInfo)); in f64AssignAPCS()
48 static bool CC_ARM_APCS_Custom_f64(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_ARM_APCS_Custom_f64() argument
52 if (!f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, true)) in CC_ARM_APCS_Custom_f64()
55 !f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, false)) in CC_ARM_APCS_Custom_f64()
61 static bool f64AssignAAPCS(unsigned ValNo, MVT ValVT, MVT LocVT, in f64AssignAAPCS() argument
82 ValNo, ValVT, State.AllocateStack(8, Align(8)), LocVT, LocInfo)); in f64AssignAAPCS()
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H A DARMCallingConv.h20 bool CC_ARM_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
23 bool CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT, MVT LocVT,
26 bool CC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
29 bool CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
32 bool FastCC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
35 bool CC_ARM_Win32_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
38 bool RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
41 bool RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT, MVT LocVT,
44 bool RetCC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
47 bool RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
H A DARMTargetTransformInfo.cpp1769 EVT ValVT = TLI->getValueType(DL, ValTy); in getArithmeticReductionCost() local
1771 unsigned EltSize = ValVT.getScalarSizeInBits(); in getArithmeticReductionCost()
1794 ValVT.getVectorElementType() == MVT::f16 && NumElts == 8) { in getArithmeticReductionCost()
1797 } else if (ValVT.getVectorElementType() == MVT::f16) in getArithmeticReductionCost()
1818 if (ST->hasMVEIntegerOps() && ValVT.getScalarSizeInBits() <= 16 && in getArithmeticReductionCost()
1833 if (!ST->hasMVEIntegerOps() || !ValVT.isSimple() || ISD != ISD::ADD || in getArithmeticReductionCost()
1853 EVT ValVT = TLI->getValueType(DL, ValTy); in getExtendedReductionCost() local
1860 if (ST->hasMVEIntegerOps() && ValVT.isSimple() && ResVT.isSimple()) { in getExtendedReductionCost()
1870 if (ValVT.getSizeInBits() <= 128 && in getExtendedReductionCost()
1888 EVT ValVT = TLI->getValueType(DL, ValTy); in getMulAccReductionCost() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.h19 bool CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
22 bool CC_AArch64_Arm64EC_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
25 bool CC_AArch64_Arm64EC_Thunk(unsigned ValNo, MVT ValVT, MVT LocVT,
28 bool CC_AArch64_Arm64EC_Thunk_Native(unsigned ValNo, MVT ValVT, MVT LocVT,
31 bool CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
34 bool CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
37 bool CC_AArch64_DarwinPCS_ILP32_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
40 bool CC_AArch64_Win64PCS(unsigned ValNo, MVT ValVT, MVT LocVT,
43 bool CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
46 bool CC_AArch64_Win64_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
[all …]
H A DAArch64CallingConvention.cpp115 unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_AArch64_Custom_Stack_Block() argument
122 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo)); in CC_AArch64_Custom_Stack_Block()
133 static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_AArch64_Custom_Block() argument
171 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo)); in CC_AArch64_Custom_Block()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVCallingConv.cpp281 static MCRegister allocateRVVReg(MVT ValVT, unsigned ValNo, CCState &State, in allocateRVVReg() argument
283 const TargetRegisterClass *RC = TLI.getRegClassFor(ValVT); in allocateRVVReg()
288 if (ValVT.getVectorElementType() == MVT::i1) in allocateRVVReg()
325 bool llvm::CC_RISCV(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_RISCV() argument
354 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_RISCV()
393 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_RISCV()
400 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_RISCV()
407 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_RISCV()
412 if ((ValVT == MVT::f16 && Subtarget.hasStdExtZhinxmin())) { in CC_RISCV()
414 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_RISCV()
[all …]
H A DRISCVCallingConv.h21 typedef bool RISCVCCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT,
26 bool CC_RISCV(unsigned ValNo, MVT ValVT, MVT LocVT,
30 bool CC_RISCV_FastCC(unsigned ValNo, MVT ValVT, MVT LocVT,
34 bool CC_RISCV_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.h22 bool RetCC_PPC(unsigned ValNo, MVT ValVT, MVT LocVT,
25 bool RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT, MVT LocVT,
28 bool RetCC_PPC_Cold(unsigned ValNo, MVT ValVT, MVT LocVT,
31 bool CC_PPC32_SVR4(unsigned ValNo, MVT ValVT, MVT LocVT,
34 bool CC_PPC64_ELF(unsigned ValNo, MVT ValVT, MVT LocVT,
37 bool CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT, MVT LocVT,
40 bool CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
43 bool CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
H A DPPCCallingConv.cpp26 inline bool CC_PPC64_ELF_Shadow_GPR_Regs(unsigned &ValNo, MVT &ValVT, in CC_PPC64_ELF_Shadow_GPR_Regs() argument
59 static bool CC_PPC32_SVR4_Custom_Dummy(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_PPC32_SVR4_Custom_Dummy() argument
66 static bool CC_PPC32_SVR4_Custom_AlignArgRegs(unsigned &ValNo, MVT &ValVT, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
94 unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() argument
116 static bool CC_PPC32_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, MVT &ValVT, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
144 static bool CC_PPC32_SPE_CustomSplitFP64(unsigned &ValNo, MVT &ValVT, in CC_PPC32_SPE_CustomSplitFP64() argument
166 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_PPC32_SPE_CustomSplitFP64()
167 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i], in CC_PPC32_SPE_CustomSplitFP64()
173 static bool CC_PPC32_SPE_RetF64(unsigned &ValNo, MVT &ValVT, in CC_PPC32_SPE_RetF64() argument
191 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_PPC32_SPE_RetF64()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h75 MVT ValVT; variable
80 CCValAssign(LocInfo HTP, unsigned ValNo, MVT ValVT, MVT LocVT, bool IsCustom) in CCValAssign() argument
81 : ValNo(ValNo), isCustom(IsCustom), HTP(HTP), ValVT(ValVT), LocVT(LocVT) { in CCValAssign()
85 static CCValAssign getReg(unsigned ValNo, MVT ValVT, MCRegister Reg,
87 CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
92 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, MCRegister Reg, in getCustomReg() argument
94 return getReg(ValNo, ValVT, Reg, LocVT, HTP, /*IsCustom=*/true); in getCustomReg()
97 static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset,
99 CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
104 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, int64_t Offset, in getCustomMem() argument
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H A DTargetLowering.h1034 EVT ValVT) const { in promoteTargetBoolean() argument
1037 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), ValVT); in promoteTargetBoolean()
1038 ISD::NodeType ExtendCode = getExtendForContent(getBooleanContents(ValVT)); in promoteTargetBoolean()
1469 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
1471 if (ValVT.isExtended() || MemVT.isExtended()) return Expand; in getLoadExtAction()
1472 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction()
1481 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1482 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1487 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegalOrCustom() argument
1488 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYCallingConv.h25 static bool CC_CSKY_ABIV2_SOFT_64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_CSKY_ABIV2_SOFT_64() argument
35 CCValAssign::getMem(ValNo, ValVT, StackOffset, LocVT, LocInfo)); in CC_CSKY_ABIV2_SOFT_64()
40 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_CSKY_ABIV2_SOFT_64()
44 static bool Ret_CSKY_ABIV2_SOFT_64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in Ret_CSKY_ABIV2_SOFT_64() argument
57 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in Ret_CSKY_ABIV2_SOFT_64()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h94 inline bool CC_SystemZ_I128Indirect(unsigned &ValNo, MVT &ValVT, in CC_SystemZ_I128Indirect() argument
109 PendingMembers.push_back(CCValAssign::getPending(ValNo, ValVT, in CC_SystemZ_I128Indirect()
146 inline bool CC_XPLINK64_Pointer(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_XPLINK64_Pointer() argument
156 inline bool CC_XPLINK64_Shadow_Reg(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_XPLINK64_Shadow_Reg() argument
178 inline bool CC_XPLINK64_Allocate128BitVararg(unsigned &ValNo, MVT &ValVT, in CC_XPLINK64_Allocate128BitVararg() argument
206 CCValAssign::getReg(ValNo, ValVT, SystemZ::R2Q, LocVT, LocInfo)); in CC_XPLINK64_Allocate128BitVararg()
209 CCValAssign::getCustomMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in CC_XPLINK64_Allocate128BitVararg()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kCallingConv.h38 inline bool CC_M68k_Any_AssignToReg(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_M68k_Any_AssignToReg() argument
68 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_M68k_Any_AssignToReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp63 static void applyStackPassedSmallTypeDAGHack(EVT OrigVT, MVT &ValVT, in applyStackPassedSmallTypeDAGHack() argument
72 ValVT = LocVT = MVT::i8; in applyStackPassedSmallTypeDAGHack()
74 ValVT = LocVT = MVT::i16; in applyStackPassedSmallTypeDAGHack()
79 const MVT ValVT = VA.getValVT(); in getStackValueStoreTypeHack() local
80 return (ValVT == MVT::i8 || ValVT == MVT::i16) ? LLT(ValVT) in getStackValueStoreTypeHack()
92 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
96 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
97 return IncomingValueAssigner::assignArg(ValNo, OrigVT, ValVT, LocVT, in assignArg()
118 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
130 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.h57 bool canCombineTruncStore(EVT ValVT, EVT MemVT, in canCombineTruncStore() argument
63 return isTruncStoreLegal(ValVT, MemVT); in canCombineTruncStore()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp3041 static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_MipsO32() argument
3091 bool isI64 = (ValVT == MVT::i32 && OrigAlign == Align(8)); in CC_MipsO32()
3095 if (ValVT == MVT::i32 && isVectorFloat) { in CC_MipsO32()
3111 } else if (ValVT == MVT::i32 || in CC_MipsO32()
3112 (ValVT == MVT::f32 && AllocateFloatsInIntReg)) { in CC_MipsO32()
3119 } else if (ValVT == MVT::f64 && AllocateFloatsInIntReg) { in CC_MipsO32()
3130 CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_MipsO32()
3134 CCValAssign::getCustomReg(ValNo, ValVT, HiReg, LocVT, LocInfo)); in CC_MipsO32()
3137 } else if (ValVT.isFloatingPoint() && !AllocateFloatsInIntReg) { in CC_MipsO32()
3139 if (ValVT == MVT::f32) { in CC_MipsO32()
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H A DMipsCallLowering.cpp41 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
53 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
69 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
81 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp339 static bool CC_Xtensa_Custom(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_Xtensa_Custom() argument
352 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in CC_Xtensa_Custom()
374 bool needs64BitAlign = (ValVT == MVT::i32 && OrigAlign == Align(8)); in CC_Xtensa_Custom()
375 bool needs128BitAlign = (ValVT == MVT::i32 && OrigAlign == Align(16)); in CC_Xtensa_Custom()
377 if (ValVT == MVT::i32) { in CC_Xtensa_Custom()
390 } else if (ValVT == MVT::f64) { in CC_Xtensa_Custom()
403 unsigned Offset = State.AllocateStack(ValVT.getStoreSize(), OrigAlign); in CC_Xtensa_Custom()
404 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in CC_Xtensa_Custom()
406 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Register, LocVT, LocInfo)); in CC_Xtensa_Custom()
492 EVT ValVT = VA.getValVT(); in LowerFormalArguments() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp46 static bool CC_Sparc_Assign_SRet(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_SRet() argument
53 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in CC_Sparc_Assign_SRet()
59 static bool CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_Split_64() argument
68 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Split_64()
72 ValNo, ValVT, State.AllocateStack(8, Align(4)), LocVT, LocInfo)); in CC_Sparc_Assign_Split_64()
78 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Split_64()
81 ValNo, ValVT, State.AllocateStack(4, Align(4)), LocVT, LocInfo)); in CC_Sparc_Assign_Split_64()
85 static bool CC_Sparc_Assign_Ret_Split_64(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_Ret_Split_64() argument
95 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Ret_Split_64()
101 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Ret_Split_64()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp44 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
48 if (RISCVAssignFn(ValNo, ValVT, LocVT, LocInfo, Flags, State, Info.IsFixed, in assignArg()
190 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
199 if (RISCVAssignFn(ValNo, ValVT, LocVT, LocInfo, Flags, State, in assignArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp45 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, in HandleByVal() argument
58 addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in HandleByVal()

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