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Searched refs:VT2 (Results 1 – 25 of 27) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.h149 bool isTruncateFree(EVT VT1, EVT VT2) const override;
153 bool isZExtFree(EVT VT1, EVT VT2) const override;
154 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DBPFISelLowering.cpp205 bool BPFTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree()
206 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree()
209 unsigned NumBits2 = VT2.getSizeInBits(); in isTruncateFree()
221 bool BPFTargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree()
222 if (!getHasAlu32() || !VT1.isInteger() || !VT2.isInteger()) in isZExtFree()
225 unsigned NumBits2 = VT2.getSizeInBits(); in isZExtFree()
229 bool BPFTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
231 if (Val.getOpcode() == ISD::LOAD && VT1.isSimple() && VT2.isSimple()) { in isZExtFree()
233 MVT MT2 = VT2.getSimpleVT().SimpleTy; in isZExtFree()
238 return TargetLoweringBase::isZExtFree(Val, VT2); in isZExtFree()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DLegacyPassNameParser.h90 const PassNameParser::OptionInfo *VT2) { in ValCompare() argument
91 return VT1->Name.compare(VT2->Name); in ValCompare()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h117 bool isTruncateFree(EVT VT1, EVT VT2) const override;
128 bool isZExtFree(EVT VT1, EVT VT2) const override;
H A DMSP430ISelLowering.cpp1395 bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree()
1396 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree()
1399 return (VT1.getFixedSizeInBits() > VT2.getFixedSizeInBits()); in isTruncateFree()
1407 bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree()
1409 return false && VT1 == MVT::i8 && VT2 == MVT::i16; in isZExtFree()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h654 SDVTList getVTList(EVT VT1, EVT VT2);
655 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
656 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
1647 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
1649 EVT VT2, ArrayRef<SDValue> Ops);
1651 EVT VT2, EVT VT3, ArrayRef<SDValue> Ops);
1653 EVT VT2, SDValue Op1, SDValue Op2);
1683 EVT VT2, SDValue Op1, SDValue Op2);
1685 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
1687 EVT VT2, ArrayRef<SDValue> Ops);
[all …]
H A DTargetLowering.h1755 MVT VT2; variable
1757 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
2974 virtual bool isTruncateFree(SDValue Val, EVT VT2) const { in isTruncateFree() argument
2976 return isTruncateFree(Val.getValueType(), VT2); in isTruncateFree()
3062 virtual bool isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() argument
3063 return isZExtFree(Val.getValueType(), VT2); in isZExtFree()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h95 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DXCoreISelLowering.cpp174 bool XCoreTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
180 !VT2.isSimple() || !VT2.isInteger()) in isZExtFree()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1352 bool isTruncateFree(EVT VT1, EVT VT2) const override;
1365 bool isZExtFree(EVT VT1, EVT VT2) const override;
1366 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DX86ISelLowering.cpp34221 bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree()
34222 if (!VT1.isScalarInteger() || !VT2.isScalarInteger()) in isTruncateFree()
34225 unsigned NumBits2 = VT2.getSizeInBits(); in isTruncateFree()
34234 bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree()
34236 return VT1 == MVT::i32 && VT2 == MVT::i64 && Subtarget.is64Bit(); in isZExtFree()
34239 bool X86TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
34241 if (isZExtFree(VT1, VT2)) in isZExtFree()
34248 !VT2.isSimple() || !VT2.isInteger()) in isZExtFree()
38532 MVT VT2 = V2.getSimpleValueType(); in combineX86ShuffleChain() local
38534 (RootSizeInBits % VT2.getSizeInBits()) == 0 && "Vector size mismatch"); in combineX86ShuffleChain()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h681 bool isTruncateFree(EVT VT1, EVT VT2) const override;
686 bool isZExtFree(EVT VT1, EVT VT2) const override;
687 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DAArch64ISelLowering.cpp15750 bool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree()
15751 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) in isTruncateFree()
15754 uint64_t NumBits2 = VT2.getFixedSizeInBits(); in isTruncateFree()
15794 bool AArch64TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree()
15795 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) in isZExtFree()
15798 unsigned NumBits2 = VT2.getSizeInBits(); in isZExtFree()
15802 bool AArch64TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
15804 if (isZExtFree(VT1, VT2)) { in isZExtFree()
15813 VT2.isSimple() && !VT2.isVector() && VT2.isInteger() && in isZExtFree()
28647 MVT VT2; in getNumRegistersForCallingConv() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h240 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DLoongArchISelLowering.cpp6114 bool LoongArchTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
6126 return TargetLowering::isZExtFree(Val, VT2); in isZExtFree()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp2510 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { in CreateStackTemporary() argument
2512 TypeSize VT2Size = VT2.getStoreSize(); in CreateStackTemporary()
2521 Type *Ty2 = VT2.getTypeForEVT(*getContext()); in CreateStackTemporary()
10394 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { in getVTList() argument
10398 ID.AddInteger(VT2.getRawBits()); in getVTList()
10405 Array[1] = VT2; in getVTList()
10412 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { in getVTList() argument
10416 ID.AddInteger(VT2.getRawBits()); in getVTList()
10424 Array[1] = VT2; in getVTList()
10432 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { in getVTList() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h500 bool isTruncateFree(SDValue Val, EVT VT2) const override;
501 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DRISCVISelLowering.cpp1899 bool RISCVTargetLowering::isTruncateFree(SDValue Val, EVT VT2) const { in isTruncateFree()
1904 SrcVT.isVector() && VT2.isVector()) { in isTruncateFree()
1906 unsigned DestBits = VT2.getVectorElementType().getSizeInBits(); in isTruncateFree()
1911 return TargetLowering::isTruncateFree(Val, VT2); in isTruncateFree()
1914 bool RISCVTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
1926 return TargetLowering::isZExtFree(Val, VT2); in isZExtFree()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h1032 bool isTruncateFree(EVT VT1, EVT VT2) const override;
1034 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DPPCISelLowering.cpp17395 bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree()
17396 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree()
17399 unsigned NumBits2 = VT2.getSizeInBits(); in isTruncateFree()
17403 bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
17420 return TargetLowering::isZExtFree(Val, VT2); in isZExtFree()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h462 bool isZExtFree(SDValue Val, EVT VT2) const override;
H A DARMInstrMVE.td4499 foreach VT2 = [ v2i1, v4i1, v8i1, v16i1 ] in
4500 def : Pat<(VT (predicate_cast (VT2 VCCR:$src))),
4501 (VT (COPY_TO_REGCLASS (VT2 VCCR:$src), VCCR))>;
4518 foreach VT2 = [ v16i8, v8i16, v8f16, v4i32, v4f32, v2i64, v2f64 ] in
4519 def : Pat<(VT (ARMVectorRegCastImpl (VT2 MQPR:$src))),
H A DARMInstrNEON.td7772 foreach VT2 = [ v16i8, v8i16, v8f16, v8bf16, v4i32, v4f32, v2i64, v2f64 ] in
7773 def : Pat<(VT (ARMVectorRegCastImpl (VT2 QPR:$src))), (VT QPR:$src)>;
7776 foreach VT2 = [ v8i8, v4i16, v4f16, v4bf16, v2i32, v2f32, v1i64, f64 ] in
7777 def : Pat<(VT (ARMVectorRegCastImpl (VT2 DPR:$src))), (VT DPR:$src)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h150 bool isTruncateFree(EVT VT1, EVT VT2) const override;
H A DHexagonISelLowering.cpp2163 bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree()
2164 if (!VT1.isSimple() || !VT2.isSimple()) in isTruncateFree()
2166 return VT1.getSimpleVT() == MVT::i64 && VT2.getSimpleVT() == MVT::i32; in isTruncateFree()

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