| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 74 for (MVT VT0 : MVT::fixedlen_vector_valuetypes()) { in MipsSETargetLowering() local
76 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
77 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
78 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
79 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 715 EVT VT0 = N->getValueType(0); in SoftenFloatRes_FFREXP() local
717 RTLIB::Libcall LC = RTLIB::getFREXP(VT0); in SoftenFloatRes_FFREXP()
727 EVT NVT0 = TLI.getTypeToTransformTo(*DAG.getContext(), VT0); in SoftenFloatRes_FFREXP()
734 EVT OpsVT[2] = {VT0, StackSlot.getValueType()}; in SoftenFloatRes_FFREXP()
738 CallOptions.setTypeListBeforeSoften({OpsVT}, VT0, true); in SoftenFloatRes_FFREXP()
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| H A D | LegalizeVectorTypes.cpp | 283 EVT VT0 = N->getValueType(0); in ScalarizeVecRes_FFREXP()
289 {VT0.getScalarType(), VT1.getScalarType()}, Elt) in ScalarizeVecRes_FFREXP()
6087 EVT VT0 = getSetCCResultType(getSETCCOperandType(SETCC0)); in WidenVSELECTMask()
6089 unsigned ScalarBits0 = VT0.getScalarSizeInBits(); in WidenVSELECTMask()
6097 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTMask()
6098 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask()
6107 MaskVT = VT0; in WidenVSELECTMask()
6110 SETCC0 = convertMask(SETCC0, VT0, MaskVT); in WidenVSELECTMask()
279 EVT VT0 = N->getValueType(0); ScalarizeVecRes_FFREXP() local
6083 EVT VT0 = getSetCCResultType(getSETCCOperandType(SETCC0)); WidenVSELECTMask() local
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| H A D | DAGCombiner.cpp | 10959 EVT VT0, VT1; in foldABSToABD() local
10961 VT0 = cast<VTSDNode>(Op0.getOperand(1))->getVT(); in foldABSToABD()
10964 VT0 = Op0.getOperand(0).getValueType(); in foldABSToABD()
10971 EVT MaxVT = VT0.bitsGT(VT1) ? VT0 : VT1; in foldABSToABD()
10972 if ((VT0 == MaxVT || Op0->hasOneUse()) && in foldABSToABD()
11600 EVT VT0 = N0.getValueType(); in visitSELECT() local
11624 if (VT0 == MVT::i1) { in visitSELECT()
11739 SDVTList VTs = DAG.getVTList(VT, VT0); in visitSELECT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2805 EVT VT0 = Cond.getValueType(); in combineSelect() local
2812 CC = getSetCCInverse(CC, VT0); in combineSelect()
2818 if (VT0.isFloatingPoint()) { in combineSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5792 MVT VT0 = Op.getOperand(0).getSimpleValueType(); in LowerIS_FPCLASS()
5795 MVT DstVT = VT0.changeVectorElementTypeToInteger(); in LowerIS_FPCLASS()
5796 auto [Mask, VL] = getDefaultScalableVLOps(VT0, DL, DAG, Subtarget); in LowerIS_FPCLASS()
5813 MVT ContainerVT0 = getContainerForFixedLengthVector(VT0); in LowerIS_FPCLASS()
5816 auto [Mask, VL] = getDefaultVLOps(VT0, ContainerVT0, DL, DAG, Subtarget); in LowerIS_FPCLASS()
5791 MVT VT0 = Op.getOperand(0).getSimpleValueType(); LowerIS_FPCLASS() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 39381 EVT VT0 = BC0.getValueType(); in canonicalizeShuffleMaskWithHorizOp() local
39383 if (VT0.getSizeInBits() != RootSizeInBits || llvm::any_of(BC, [&](SDValue V) { in canonicalizeShuffleMaskWithHorizOp()
39384 return V.getOpcode() != Opcode0 || V.getValueType() != VT0; in canonicalizeShuffleMaskWithHorizOp()
39400 int NumElts = VT0.getVectorNumElements(); in canonicalizeShuffleMaskWithHorizOp()
39401 int NumLanes = VT0.getSizeInBits() / 128; in canonicalizeShuffleMaskWithHorizOp()
39420 return DAG.getUNDEF(VT0); in canonicalizeShuffleMaskWithHorizOp()
39422 return getZeroVector(VT0.getSimpleVT(), Subtarget, DAG, DL); in canonicalizeShuffleMaskWithHorizOp()
39436 return DAG.getNode(Opcode0, DL, VT0, LHS, RHS); in canonicalizeShuffleMaskWithHorizOp()
39466 SDValue Res = DAG.getNode(Opcode0, DL, VT0, LHS, RHS); in canonicalizeShuffleMaskWithHorizOp()
39482 if (Mask.size() == VT0.getVectorNumElements()) { in canonicalizeShuffleMaskWithHorizOp()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4188 EVT VT0 = Op.getValue(0).getValueType(); in lowerADDSUBO_CARRY() local
4191 if (VT0 != MVT::i32 && VT0 != MVT::i64) in lowerADDSUBO_CARRY()
4200 SDVTList VTs = DAG.getVTList(VT0, VT1); in lowerADDSUBO_CARRY()
4202 SDValue Sum = DAG.getNode(Opcode, DL, DAG.getVTList(VT0, MVT::Glue), OpLHS, in lowerADDSUBO_CARRY()
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