| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 2492 const auto &VSR = VSRContainingGPRs[Dst]; in spillCalleeSavedRegisters() local
2493 if (VSR.second != 0) { in spillCalleeSavedRegisters()
2499 .addReg(VSR.first, getKillRegState(true)) in spillCalleeSavedRegisters()
2500 .addReg(VSR.second, getKillRegState(true)); in spillCalleeSavedRegisters()
2501 } else if (VSR.second == 0) { in spillCalleeSavedRegisters()
2508 .addReg(VSR.first, getKillRegState(true)); in spillCalleeSavedRegisters()
2666 const auto &VSR = VSRContainingGPRs[Dst]; in restoreCalleeSavedRegisters() local
2667 if (VSR.second != 0) { in restoreCalleeSavedRegisters()
2670 BuildMI(MBB, I, DL, TII.get(PPC::MFVSRLD), VSR.second).addReg(Dst); in restoreCalleeSavedRegisters()
2671 BuildMI(MBB, I, DL, TII.get(PPC::MFVSRD), VSR.first) in restoreCalleeSavedRegisters()
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| H A D | PPCRegisterInfoDMR.td | 50 // These ACC registers no longer include VSR regs as subregs.
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| H A D | PPCRegisterInfo.td | 113 // VSR Pairs - One of the 32 paired even-odd consecutive VSRs.
209 // VSR pairs 0 - 15 (corresponding to VSRs 0 - 30 paired with 1 - 31).
216 // VSR pairs 16 - 31 (corresponding to VSRs 32 - 62 paired with 33 - 63).
442 // Allow spilling GPR's into caller-saved VSR's.
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| H A D | PPCVSXSwapRemoval.cpp | 497 case PPC::VSR: in gatherVectorInstructions()
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| H A D | PPCScheduleP7.td | 296 VSR, VSRAB, VSRAH, VSRAW, VSRB, VSRH, VSRO, VSRW, VSUBCUW, VSL, VSLB,
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| H A D | PPCInstrAltivec.td | 723 def VSR : VX1_Int_Ty< 708, "vsr" , int_ppc_altivec_vsr, v4i32>;
1091 (v1i128 (VSR (v16i8 (VSRO $vA, $vB)), (v16i8 (VSPLTB 15, $vB))))>;
1099 (v1i128 (VSR (v16i8 (VSRO $vA, $vB)), (v16i8 (VSPLTB 15, $vB))))>;
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| H A D | P10InstrResources.td | 1704 VSR,
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| H A D | P9InstrResources.td | 576 VSR,
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| H A D | PPCInstrP10.td | 25 // (FPR, GPR, VR, VSR, CR-bit respectively)
36 // * N - the Nth bit in a VSR
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| H A D | PPCInstrVSX.td | 1879 /* Direct moves of various widths from GPR's into VSR's. Each move lines
1882 swapped to go into the least significant element of the VSR.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZ13.td | 1292 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1293 def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSR(A|L)B$")>;
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| H A D | SystemZScheduleZ17.td | 1378 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1379 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;
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| H A D | SystemZScheduleZ15.td | 1351 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1352 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;
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| H A D | SystemZScheduleZ14.td | 1314 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1315 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;
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| H A D | SystemZScheduleZ16.td | 1357 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1358 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>;
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsPPC.def | 666 // P10 Move to VSR with Mask built-ins.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsPowerPC.td | 734 // P10 Move to VSR with Mask Intrinsics.
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