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Searched refs:VR2 (Results 1 – 10 of 10) sorted by relevance

/freebsd/sys/contrib/openzfs/module/zfs/
H A Dvdev_raidz_math_powerpc_altivec_common.h52 #define VR2(r...) VR2_(r, 36) macro
148 "vxor " VR2(r) "," VR2(r) ",19\n" \
178 "vxor " VR2(r) "," VR2(r) ",19\n" \
210 "vxor " VR6(r) "," VR6(r) "," VR2(r) "\n" \
217 "vxor " VR2(r) "," VR2(r) "," VR0(r) "\n" \
234 "vxor " VR2(r) "," VR2(r) "," VR2(r) "\n" \
247 "vxor " VR2(r) "," VR2(r) "," VR2(r) "\n" \
269 "vor " VR6(r) "," VR2(r) "," VR2(r) "\n" \
276 "vor " VR2(r) "," VR0(r) "," VR0(r) "\n" \
293 "lvx " VR2(r) " ,0,%[SRC2]\n" \
[all …]
H A Dvdev_raidz_math_aarch64_neon_common.h55 #define VR2(r...) VR2_(r, 36) macro
151 "eor " VR2(r) ".16b," VR2(r) ".16b,v19.16b\n" \
181 "eor " VR2(r) ".16b," VR2(r) ".16b,v19.16b\n" \
213 "eor " VR6(r) ".16b," VR6(r) ".16b," VR2(r) ".16b\n" \
220 "eor " VR2(r) ".16b," VR2(r) ".16b," VR0(r) ".16b\n" \
237 "eor " VR2(r) ".16b," VR2(r) ".16b," VR2(r) ".16b\n" \
250 "eor " VR2(r) ".16b," VR2(r) ".16b," VR2(r) ".16b\n" \
272 "mov " VR6(r) ".16b," VR2(r) ".16b\n" \
279 "mov " VR2(r) ".16b," VR0(r) ".16b\n" \
296 "ld1 { " VR2(r) ".4s },%[SRC2]\n" \
[all …]
H A Dvdev_raidz_math_avx2.c49 #define VR2(r...) VR2_(r, 1) macro
78 "vpxor 0x40(%[SRC]), %%" VR2(r)", %%" VR2(r) "\n" \
100 "vpxor %" VR2(r) ", %" VR6(r)", %" VR6(r) "\n" \
105 "vpxor %" VR0(r) ", %" VR2(r)", %" VR2(r) "\n" \
122 "vmovdqa %" VR2(r) ", %" VR6(r) "\n" \
127 "vmovdqa %" VR0(r) ", %" VR2(r) "\n" \
142 "vmovdqa 0x40(%[SRC]), %%" VR2(r) "\n" \
164 "vmovdqa %%" VR2(r) ", 0x40(%[DST])\n" \
H A Dvdev_raidz_math_avx512bw.c53 #define VR2(r...) VR2_(r, 1) macro
81 "vpxorq 0x80(%[SRC]), %%" VR2(r)", %%" VR2(r) "\n" \
103 "vpxorq %" VR2(r) ", %" VR6(r)", %" VR6(r) "\n" \
108 "vpxorq %" VR0(r) ", %" VR2(r)", %" VR2(r) "\n" \
125 "vmovdqa64 %" VR2(r) ", %" VR6(r) "\n" \
130 "vmovdqa64 %" VR0(r) ", %" VR2(r) "\n" \
145 "vmovdqa64 0x80(%[SRC]), %%" VR2(r) "\n" \
167 "vmovdqa64 %%" VR2(r) ", 0x80(%[DST])\n" \
H A Dvdev_raidz_math_ssse3.c50 #define VR2(r...) VR2_(r, 1) macro
79 "pxor 0x20(%[SRC]), %%" VR2(r) "\n" \
101 "pxor %" VR2(r) ", %" VR6(r) "\n" \
106 "pxor %" VR0(r) ", %" VR2(r) "\n" \
123 "movdqa %" VR2(r) ", %" VR6(r) "\n" \
128 "movdqa %" VR0(r) ", %" VR2(r) "\n" \
143 "movdqa 0x20(%[SRC]), %%" VR2(r) "\n" \
165 "movdqa %%" VR2(r)", 0x20(%[DST])\n" \
H A Dvdev_raidz_math_avx512f.c52 #define VR2(r...) VR2_(r, 1) macro
95 "vpxorq 0x80(%[SRC]), %%" VR2(r)", %%" VR2(r) "\n" \
109 "vpxorq %" VR2(r) ", %" VR6(r)", %" VR6(r) "\n" \
114 "vpxorq %" VR0(r) ", %" VR2(r)", %" VR2(r) "\n" \
131 "vmovdqa64 %" VR2(r) ", %" VR6(r) "\n" \
136 "vmovdqa64 %" VR0(r) ", %" VR2(r) "\n" \
149 "vmovdqa64 0x80(%[SRC]), %%" VR2(r) "\n" \
163 "vmovdqa64 %%" VR2(r) ", 0x80(%[DST])\n" \
H A Dvdev_raidz_math_sse2.c51 #define VR2(r...) VR2_(r, 1, 2, 3, 4, 5, 6) macro
71 "pxor 0x20(%[SRC]), %%" VR2(r) "\n" \
95 "pxor %" VR2(r) ", %" VR6(r) "\n" \
100 "pxor %" VR0(r) ", %" VR2(r) "\n" \
119 "movdqa %" VR2(r) ", %" VR6(r) "\n" \
124 "movdqa %" VR0(r) ", %" VR2(r) "\n" \
143 "movdqa 0x20(%[SRC]), %%" VR2(r) "\n" \
168 "movdqa %%" VR2(r)", 0x20(%[DST])\n" \
226 _MUL2_x2(VR2(r), VR3(r)); \
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp223 bool operator() (unsigned VR1, unsigned VR2) const { in operator ()()
224 return operator[](VR1) < operator[](VR2); in operator ()()
298 bool operator() (unsigned VR1, unsigned VR2) const;
316 bool operator() (unsigned VR1, unsigned VR2) const;
327 bool RegisterCellLexCompare::operator() (unsigned VR1, unsigned VR2) const { in operator ()()
337 if (VR1 == VR2) in operator ()()
340 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2); in operator ()()
351 return BitOrd.BaseOrd[VR1] < BitOrd.BaseOrd[VR2]; in operator ()()
354 bool RegisterCellBitCompareSel::operator() (unsigned VR1, unsigned VR2) const { in operator ()()
355 if (VR1 == VR2) in operator ()()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3061 Register VR2 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32() local
3062 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), VR2) in emitBPOSGE32()
3074 .addReg(VR2) in emitBPOSGE32()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp4670 const MCPhysReg ArgVRs[] = {LoongArch::VR0, LoongArch::VR1, LoongArch::VR2,