| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSchedSiFive7.td | 29 /// Number of DLEN parts = (LMUL * VLEN) / DLEN.
30 /// Since DLEN = VLEN / 2, Num DLEN parts = 2 * LMUL.
76 // formula (2 * VLEN * LMUL) / DLEN = 4 * LMUL
92 defvar VLEN = 512;
94 // (VLEN * LMUL) / SEW
96 !eq(mx, "M1") : !div(VLEN, sew),
97 !eq(mx, "M2") : !div(!mul(VLEN, 2), sew),
98 !eq(mx, "M4") : !div(!mul(VLEN, 4), sew),
99 !eq(mx, "M8") : !div(!mul(VLEN, 8), sew),
100 !eq(mx, "MF2") : !div(!div(VLEN, 2), sew),
[all …]
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| H A D | RISCVSchedSiFiveP600.td | 40 defvar VLEN = 128;
42 !eq(mx, "M1") : !div(VLEN, sew),
43 !eq(mx, "M2") : !div(!mul(VLEN, 2), sew),
44 !eq(mx, "M4") : !div(!mul(VLEN, 4), sew),
45 !eq(mx, "M8") : !div(!mul(VLEN, 8), sew),
46 !eq(mx, "MF2") : !div(!div(VLEN, 2), sew),
47 !eq(mx, "MF4") : !div(!div(VLEN, 4), sew),
48 !eq(mx, "MF8") : !div(!div(VLEN, 8), sew),
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| H A D | RISCVInsertVSETVLI.cpp | 986 static unsigned computeVLMAX(unsigned VLEN, unsigned SEW, in computeVLMAX() argument
990 VLEN = VLEN / LMul; in computeVLMAX()
992 VLEN = VLEN * LMul; in computeVLMAX()
993 return VLEN/SEW; in computeVLMAX()
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| H A D | RISCVRegisterInfo.cpp | 344 if (auto VLEN = STI.getRealVLen()) { in lowerVSPILL() local
345 const int64_t VLENB = *VLEN / 8; in lowerVSPILL()
421 if (auto VLEN = STI.getRealVLen()) { in lowerVRELOAD() local
422 const int64_t VLENB = *VLEN / 8; in lowerVRELOAD()
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| H A D | RISCVRegisterInfo.td | 291 // The V vector extension requires that VLEN >= 128 and <= 65536.
293 // thus `vscale` can be defined as VLEN/64,
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| H A D | RISCVFrameLowering.cpp | 422 if (auto VLEN = STI.getRealVLen()) { in adjustStackForRVV() local
424 const int64_t VLENB = *VLEN / 8; in adjustStackForRVV()
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| H A D | RISCVFeatures.td | 1336 // Some vector hardware implementations do not process all VLEN bits in parallel
1341 "Vector unit DLEN(data path width) is half of VLEN">;
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| H A D | RISCVISelDAGToDAG.cpp | 579 if (auto VLEN = Subtarget->getRealVLen()) in selectVSETVLI() local
580 if (*VLEN / RISCVVType::getSEWLMULRatio(SEW, VLMul) == C->getZExtValue()) in selectVSETVLI()
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| H A D | RISCVISelLowering.cpp | 1550 // VLEN=32 support is incomplete. in shouldExpandGetVectorLength()
2315 // If we're extracting only data from the first VLEN bits of the source in isExtractSubvectorCheap()
2318 // TODO: We can generalize this when the exact VLEN is known. in isExtractSubvectorCheap()
2323 // TODO: For sizes which aren't multiples of VLEN sizes, this may not be in isExtractSubvectorCheap()
2705 // We prefer to use LMUL=1 for VLEN sized types. Use fractional lmuls for in getContainerForFixedLengthVector()
2770 // If we know the exact VLEN, and our VL is exactly equal to VLMAX, in getVLOp()
4070 // If we're compiling for an exact VLEN value, we can split our work per in lowerBUILD_VECTOR()
4993 // If compiling with an exactly known VLEN, see if we can split a
5194 // For exact VLEN m2 or greater, try to split to m1 operations if we in lowerVECTOR_SHUFFLE()
6445 report_fatal_error("Support for VLEN in LowerOperation()
8486 if (auto VLEN = Subtarget.getRealVLen(); lowerINSERT_VECTOR_ELT() local
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGOpenMPRuntime.cpp | 10801 static void addAArch64VectorName(T VLEN, StringRef LMask, StringRef Prefix, in addAArch64VectorName() argument
10807 Out << Prefix << ISA << LMask << VLEN; in addAArch64VectorName()
11098 unsigned VLEN = VLENVal.getExtValue(); in emitDeclareSimdFunction() local
11101 emitAArch64DeclareSimdFunction(CGM, FD, VLEN, ParamAttrs, State, in emitDeclareSimdFunction()
11104 emitAArch64DeclareSimdFunction(CGM, FD, VLEN, ParamAttrs, State, in emitDeclareSimdFunction()
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