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Searched refs:VEXT (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleA8.td1023 // Double-register VEXT
1027 // Quad-register VEXT
H A DARMISelLowering.h204 VEXT, // extract enumerator
H A DARMScheduleSwift.td565 (instregex "VEXT", "VREV16", "VREV32", "VREV64")>;
H A DARMScheduleA9.td1798 // Double-register VEXT
1807 // Quad-register VEXT
H A DARMScheduleA57.td1208 def : InstRW<[A57Write_3cyc_1V], (instregex "VEXT(d|q)(8|16|32|64)")>;
H A DARMISelLowering.cpp1787 MAKE_CASE(ARMISD::VEXT) in getTargetNodeName()
8368 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
8569 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
8918 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8930 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
H A DARMInstrNEON.td520 def NEONvext : SDNode<"ARMISD::VEXT", SDTARMVEXT>;
7057 // VEXT : Vector Extract
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_neon.td679 def VEXT : WInst<"vext", "...I",