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Searched refs:UseMO (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DInitUndef.cpp116 for (auto &UseMO : MI->uses()) { in handleReg() local
117 if (!UseMO.isReg()) in handleReg()
119 if (UseMO.isTied()) in handleReg()
121 if (!UseMO.getReg().isVirtual()) in handleReg()
123 if (!TRI->doesRegClassHavePseudoInitUndef(MRI->getRegClass(UseMO.getReg()))) in handleReg()
126 if (UseMO.isUndef() || findImplictDefMIFromReg(UseMO.getReg(), MRI)) in handleReg()
127 Changed |= fixupIllOperand(MI, UseMO); in handleReg()
136 for (MachineOperand &UseMO : MI.uses()) { in handleSubReg()
137 if (!UseMO.isReg()) in handleSubReg()
139 if (!UseMO.getReg().isVirtual()) in handleSubReg()
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H A DCodeGenCommonISel.cpp286 auto &UseMO = DbgMI->getOperand(UseMOIdx); in salvageDebugInfoForDbgValue() local
287 UseMO.setReg(Op0->getReg()); in salvageDebugInfoForDbgValue()
288 UseMO.setSubReg(Op0->getSubReg()); in salvageDebugInfoForDbgValue()
H A DTailDuplicator.cpp226 for (MachineOperand &UseMO : in tailDuplicateAndUpdate()
228 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate()
234 DebugUses.push_back(&UseMO); in tailDuplicateAndUpdate()
239 SSAUpdate.RewriteUse(UseMO); in tailDuplicateAndUpdate()
241 for (auto *UseMO : DebugUses) { in tailDuplicateAndUpdate() local
242 MachineInstr *UseMI = UseMO->getParent(); in tailDuplicateAndUpdate()
243 UseMO->setReg( in tailDuplicateAndUpdate()
H A DPeepholeOptimizer.cpp546 for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg)) { in INITIALIZE_PASS_DEPENDENCY()
547 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY()
557 if (UseSrcSubIdx && UseMO.getSubReg() != SubIdx) in INITIALIZE_PASS_DEPENDENCY()
584 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
588 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
592 ExtendedUses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
618 for (MachineOperand *UseMO : Uses) { in INITIALIZE_PASS_DEPENDENCY()
619 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY()
652 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY()
654 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
H A DMachineCombiner.cpp285 MachineInstr *UseMO = RI->getParent(); in getLatency() local
287 if (UseMO && BlockTrace.isDepInTrace(*Root, *UseMO)) { in getLatency()
291 UseMO, in getLatency()
292 UseMO->findRegisterUseOperandIdx(MO.getReg(), /*TRI=*/nullptr)); in getLatency()
H A DLiveVariables.cpp701 for (auto &UseMO : MRI->use_nodbg_operands(Reg)) { in recomputeForSingleDefVirtReg() local
702 UseMO.setIsKill(false); in recomputeForSingleDefVirtReg()
703 if (!UseMO.readsReg()) in recomputeForSingleDefVirtReg()
706 MachineInstr &UseMI = *UseMO.getParent(); in recomputeForSingleDefVirtReg()
712 unsigned Idx = UseMO.getOperandNo(); in recomputeForSingleDefVirtReg()
H A DRegisterCoalescer.cpp925 for (MachineOperand &UseMO : in removeCopyByCommutingDef()
927 if (UseMO.isUndef()) in removeCopyByCommutingDef()
929 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef()
933 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
942 UseMO.setIsKill(false); in removeCopyByCommutingDef()
944 UseMO.substPhysReg(NewReg, *TRI); in removeCopyByCommutingDef()
946 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
1634 for (MachineOperand &UseMO : in reMaterializeTrivialDef()
1636 MachineInstr *UseMI = UseMO.getParent(); in reMaterializeTrivialDef()
1639 UseMO.substPhysReg(DstReg, *TRI); in reMaterializeTrivialDef()
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H A DMachineInstr.cpp1164 MachineOperand &UseMO = getOperand(UseIdx); in tieOperands() local
1166 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands()
1168 assert(!UseMO.isTied() && "Use is already tied to another def"); in tieOperands()
1171 UseMO.TiedTo = DefIdx + 1; in tieOperands()
1179 UseMO.TiedTo = TiedMax; in tieOperands()
1204 const MachineOperand &UseMO = getOperand(i); in findTiedOperandIdx() local
1205 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
H A DTwoAddressInstructionPass.cpp2004 MachineOperand &UseMO = MI.getOperand(i); in eliminateRegSequence() local
2005 Register SrcReg = UseMO.getReg(); in eliminateRegSequence()
2008 if (UseMO.isUndef()) { in eliminateRegSequence()
2015 bool isKill = UseMO.isKill(); in eliminateRegSequence()
2020 UseMO.setIsKill(false); in eliminateRegSequence()
2029 .add(UseMO); in eliminateRegSequence()
H A DModuloSchedule.cpp2313 for (MachineOperand &UseMO : MI->uses()) { in updateInstrUse()
2314 if (!UseMO.isReg() || !UseMO.getReg().isVirtual()) in updateInstrUse()
2317 Register OrigReg = UseMO.getReg(); in updateInstrUse()
2351 UseMO.setReg(NewReg); in updateInstrUse()
2357 UseMO.setReg(SplitReg); in updateInstrUse()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp285 MachineOperand &UseMO = *UI; in processBlock() local
286 MachineInstr *UseMI = UseMO.getParent(); in processBlock()
293 UseMO.substVirtReg(KilledProdReg, KilledProdSubReg, *TRI); in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LoadValueInjectionLoadHardening.cpp394 MachineOperand &UseMO = Use.Addr->getOp(); in getGadgetGraph() local
395 MachineInstr &UseMI = *UseMO.getParent(); in getGadgetGraph()
396 assert(UseMO.isReg()); in getGadgetGraph()
406 if (instrUsesRegToAccessMemory(UseMI, UseMO.getReg()) || in getGadgetGraph()
408 instrUsesRegToBranch(UseMI, UseMO.getReg()))) { in getGadgetGraph()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp278 for (MachineOperand &UseMO : MRI->use_nodbg_operands(Reg->getReg())) { in findSingleRegUse()
280 if (!isSameReg(UseMO, *Reg)) in findSingleRegUse()
285 ResMO = &UseMO; in findSingleRegUse()
286 } else if (ResMO->getParent() != UseMO.getParent()) { in findSingleRegUse()
353 for (MachineOperand &UseMO : getMRI()->use_nodbg_operands(Reg->getReg())) { in potentialToConvert()
355 assert(isSameReg(UseMO, *Reg)); in potentialToConvert()
358 MachineInstr *UseMI = UseMO.getParent(); in potentialToConvert()
H A DSIInstrInfo.h1064 const MachineOperand &UseMO, in isInlineConstant() argument
1066 assert(UseMO.getParent() == &MI); in isInlineConstant()
1067 int OpIdx = UseMO.getOperandNo(); in isInlineConstant()
H A DSIInstrInfo.cpp2583 MachineOperand *UseMO = nullptr; in reMaterialize() local
2587 if (UseMO) { in reMaterialize()
2588 UseMO = nullptr; in reMaterialize()
2591 UseMO = &CandMO; in reMaterialize()
2593 if (!UseMO || UseMO->getSubReg() == AMDGPU::NoSubRegister) in reMaterialize()
2596 unsigned Offset = RI.getSubRegIdxOffset(UseMO->getSubReg()); in reMaterialize()
2597 unsigned SubregSize = RI.getSubRegIdxSize(UseMO->getSubReg()); in reMaterialize()
2616 UseMO->setReg(DestReg); in reMaterialize()
2617 UseMO->setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
H A DSIFoldOperands.cpp91 const MachineOperand &UseMO) const;
649 const MachineOperand &UseMO) const { in isUseSafeToFold()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp650 MachineIRBuilder &Builder, MachineInstr &DefMI, MachineOperand &UseMO, in InsertInsnsWithoutSideEffectsBeforeUse() argument
652 MachineOperand &UseMO)> in InsertInsnsWithoutSideEffectsBeforeUse()
654 MachineInstr &UseMI = *UseMO.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse()
660 MachineOperand *PredBB = std::next(&UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
668 Inserter(InsertBB, std::next(InsertPt), UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
673 Inserter(InsertBB, InsertBB->getFirstNonPHI(), UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
790 MachineOperand &UseMO) { in applyCombineExtendingLoads() argument
793 Observer.changingInstr(*UseMO.getParent()); in applyCombineExtendingLoads()
794 UseMO.setReg(PreviouslyEmitted->getOperand(0).getReg()); in applyCombineExtendingLoads()
795 Observer.changedInstr(*UseMO.getParent()); in applyCombineExtendingLoads()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp195 const MachineOperand &UseMO = MI.getOperand(UseOpIdx); in hasUndefinedMergeOp() local
196 return UseMO.getReg() == RISCV::NoRegister || UseMO.isUndef(); in hasUndefinedMergeOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp4346 const MachineOperand &UseMO = UseMI.getOperand(UseIdx); in getOperandLatency() local
4347 if (UseMO.isImplicit()) { in getOperandLatency()
4348 for (MCPhysReg SR : HRI.superregs(UseMO.getReg())) { in getOperandLatency()