| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips.h | 25 instr == Mips::PseudoDSDIV || instr == Mips::UDIV || \
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| H A D | MipsFastISel.cpp | 1938 case ISD::UDIV: in selectDivRem()
1940 DivOpc = Mips::UDIV; in selectDivRem()
2056 if (!selectBinaryOp(I, ISD::UDIV)) in fastSelectInstruction()
2057 return selectDivRem(I, ISD::UDIV); in fastSelectInstruction()
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| H A D | MipsSEISelLowering.cpp | 277 setOperationAction(ISD::UDIV, MVT::i32, Legal); in MipsSETargetLowering()
324 setOperationAction(ISD::UDIV, MVT::i64, Legal); in MipsSETargetLowering()
383 setOperationAction(ISD::UDIV, Ty, Legal); in addMSAIntType()
1855 return DAG.getNode(ISD::UDIV, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
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| H A D | MipsScheduleP5600.td | 193 def : InstRW<[P5600WriteAL2DivU], (instrs DIVU, PseudoUDIV, UDIV)>;
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| /freebsd/crypto/openssl/crypto/bn/asm/ |
| H A D | ppc.pl | 122 $UDIV= "divwu"; # unsigned divide
146 $UDIV= "divdu"; # unsigned divide
1684 $UDIV r8,r3,r9 #q = h/dh
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiTargetTransformInfo.h | 108 case ISD::UDIV:
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/ |
| H A D | umodsi3.S | 70 # error THUMB mode requires CLZ or UDIV
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| H A D | udivmodsi4.S | 73 # error THUMB mode requires CLZ or UDIV
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPNodes.def | 99 ADD_BINARY_VVP_OP_COMPACT(UDIV)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 1387 { ISD::UDIV, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
1391 { ISD::UDIV, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
1395 { ISD::UDIV, MVT::v4i16, ReciprocalDivCost}, in getArithmeticInstrCost()
1399 { ISD::UDIV, MVT::v8i8, ReciprocalDivCost}, in getArithmeticInstrCost()
1404 { ISD::UDIV, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
1408 { ISD::UDIV, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
1412 { ISD::UDIV, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
1416 { ISD::UDIV, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
2227 case ISD::UDIV: in maybeLoweredToCall()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 263 UDIV, enumerator
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| H A D | SelectionDAG.h | 2576 case ISD::UDIV:
2591 case ISD::UDIV:
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 363 if ((ISD == ISD::UDIV || ISD == ISD::UREM) && in getArithmeticInstrCost()
365 if (ISD == ISD::UDIV) in getArithmeticInstrCost()
442 { ISD::UDIV, MVT::v16i32, { 5 } }, // pmuludq sequence in getArithmeticInstrCost()
483 { ISD::UDIV, MVT::v8i32, { 5 } }, // pmuludq sequence in getArithmeticInstrCost()
524 { ISD::UDIV, MVT::v8i32, { 12 } }, // 2*pmuludq sequence + split. in getArithmeticInstrCost()
555 { ISD::UDIV, MVT::v4i32, { 5 } }, // pmuludq sequence in getArithmeticInstrCost()
570 { ISD::UDIV, MVT::v64i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
575 { ISD::UDIV, MVT::v32i16, { 6 } }, // vpmulhuw sequence in getArithmeticInstrCost()
588 { ISD::UDIV, MVT::v64i8, { 28 } }, // 4*ext+4*pmulhw sequence in getArithmeticInstrCost()
593 { ISD::UDIV, MVT::v32i16, { 12 } }, // 2*vpmulhuw sequence in getArithmeticInstrCost()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 348 case ISD::UDIV: { in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 4079 case ISD::UDIV: in getArithmeticInstrCost()
4084 if (ISD == ISD::UDIV && Op2Info.isPowerOf2()) in getArithmeticInstrCost()
4093 if (ISD == ISD::UDIV || ISD == ISD::UREM) { in getArithmeticInstrCost()
4126 if (Ty->isVectorTy() && (ISD == ISD::SDIV || ISD == ISD::UDIV)) { in getArithmeticInstrCost()
4136 {ISD::UDIV, MVT::v2i8, 5}, {ISD::UDIV, MVT::v4i8, 8}, in getArithmeticInstrCost()
4137 {ISD::UDIV, MVT::v8i8, 8}, {ISD::UDIV, MVT::v2i16, 5}, in getArithmeticInstrCost()
4138 {ISD::UDIV, MVT::v4i16, 5}, {ISD::UDIV, MVT::v2i32, 1}}; in getArithmeticInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.h | 556 void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } in visitUDiv()
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| H A D | SelectionDAGDumper.cpp | 285 case ISD::UDIV: return "udiv"; in getOperationName()
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| H A D | FastISel.cpp | 1765 return selectBinaryOp(I, ISD::UDIV); in selectOperator()
1936 } else if (Opcode == ISD::UDIV && isPowerOf2_64(Imm)) { in fastEmit_ri_()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 131 setOperationAction(ISD::UDIV, MVT::i8, Promote); in MSP430TargetLowering()
137 setOperationAction(ISD::UDIV, MVT::i16, LibCall); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 78 setOperationAction({ISD::MUL, ISD::SDIV, ISD::UDIV}, MVT::i8, Promote); in M68kTargetLowering()
79 setOperationAction({ISD::MUL, ISD::SDIV, ISD::UDIV}, MVT::i16, Legal); in M68kTargetLowering()
81 setOperationAction({ISD::MUL, ISD::SDIV, ISD::UDIV}, MVT::i32, Legal); in M68kTargetLowering()
83 setOperationAction({ISD::MUL, ISD::SDIV, ISD::UDIV}, MVT::i32, LibCall); in M68kTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 153 setOperationAction(ISD::UDIV, MVT::i32, Legal); in XtensaTargetLowering()
158 setOperationAction(ISD::UDIV, MVT::i32, Expand); in XtensaTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 986 case ISD::UDIV: in canOpTrap()
1867 case UDiv: return ISD::UDIV; in InstructionOpcodeToISD()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 173 HELPER_REGISTER_BINARY_INT_VP(vp_udiv, VP_UDIV, UDiv, UDIV)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 150 setOperationAction(ISD::UDIV, MVT::i8, Expand); in AVRTargetLowering()
151 setOperationAction(ISD::UDIV, MVT::i16, Expand); in AVRTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 159 setOperationAction({ISD::SDIV, ISD::UDIV, ISD::SREM, ISD::UREM}, MVT::i32, in LoongArchTargetLowering()
300 setOperationAction({ISD::MUL, ISD::SDIV, ISD::SREM, ISD::UDIV, ISD::UREM}, in LoongArchTargetLowering()
367 setOperationAction({ISD::MUL, ISD::SDIV, ISD::SREM, ISD::UDIV, ISD::UREM}, in LoongArchTargetLowering()
3789 case ISD::UDIV: in getLoongArchWOpcode()
4027 case ISD::UDIV: in ReplaceNodeResults()
5428 return DAG.getNode(ISD::UDIV, DL, N->getValueType(0), N->getOperand(1), in performINTRINSIC_WO_CHAINCombine()
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