| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMemIntrinsicResults.cpp | 85 unsigned FromReg, unsigned ToReg, in replaceDominatedUses() argument
92 LiveInterval *ToLI = &LIS.getInterval(ToReg); in replaceDominatedUses()
121 O.setReg(ToReg); in replaceDominatedUses()
169 Register ToReg = MI.getOperand(0).getReg(); in optimizeCall() local
170 if (MRI.getRegClass(FromReg) != MRI.getRegClass(ToReg)) in optimizeCall()
173 return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); in optimizeCall()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 388 void MachineRegisterInfo::replaceRegWith(Register FromReg, Register ToReg) { in replaceRegWith() argument
389 assert(FromReg != ToReg && "Cannot replace a reg with itself"); in replaceRegWith()
395 if (ToReg.isPhysical()) { in replaceRegWith()
396 O.substPhysReg(ToReg, *TRI); in replaceRegWith()
398 O.setReg(ToReg); in replaceRegWith()
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| H A D | TwoAddressInstructionPass.cpp | 124 bool isRevCopyChain(Register FromReg, Register ToReg, int Maxlen);
319 bool TwoAddressInstructionImpl::isRevCopyChain(Register FromReg, Register ToReg, in isRevCopyChain() argument
329 if (TmpReg == ToReg) in isRevCopyChain()
565 Register ToReg = SI.second; in removeMapRegEntry() local
566 if (ToReg.isVirtual()) in removeMapRegEntry()
571 if (TRI->regsOverlap(ToReg, Reg)) in removeMapRegEntry()
573 } else if (MO.clobbersPhysReg(ToReg)) in removeMapRegEntry()
857 Register ToReg = VirtRegPairs.pop_back_val(); in scanUses() local
860 bool isNew = DstRegMap.insert(std::make_pair(FromReg, ToReg)).second; in scanUses()
862 assert(DstRegMap[FromReg] == ToReg &&"Can't map to two dst registers!"); in scanUses()
[all …]
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| H A D | SplitKit.h | 438 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
442 SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
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| H A D | SplitKit.cpp | 527 Register FromReg, Register ToReg, MachineBasicBlock &MBB, in buildSingleSubRegCopy() argument
532 .addReg(ToReg, RegState::Define | getUndefRegState(FirstCopy) in buildSingleSubRegCopy()
545 SlotIndex SplitEditor::buildCopy(Register FromReg, Register ToReg, in buildCopy() argument
554 BuildMI(MBB, InsertBefore, DebugLoc(), Desc, ToReg).addReg(FromReg); in buildCopy()
566 assert(RC == MRI.getRegClass(ToReg) && "Should have same reg class"); in buildCopy()
576 Def = buildSingleSubRegCopy(FromReg, ToReg, MBB, InsertBefore, BestIdx, in buildCopy()
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| H A D | MachineInstr.cpp | 1300 void MachineInstr::substituteRegister(Register FromReg, Register ToReg, in substituteRegister() argument
1303 if (ToReg.isPhysical()) { in substituteRegister()
1305 ToReg = RegInfo.getSubReg(ToReg, SubIdx); in substituteRegister()
1309 MO.substPhysReg(ToReg, RegInfo); in substituteRegister()
1315 MO.substVirtReg(ToReg, SubIdx, RegInfo); in substituteRegister()
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| H A D | ModuloSchedule.cpp | 348 static void replaceRegUsesAfterLoop(Register FromReg, Register ToReg, in replaceRegUsesAfterLoop() argument
354 O.setReg(ToReg); in replaceRegUsesAfterLoop()
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 158 return int64_t(int(I->ToReg)); in getDwarfRegNum()
171 return MCRegister::from(I->ToReg); in getLLVMRegNum()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 155 void replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const;
160 Register ToReg) const;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 158 unsigned ToReg; member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1876 void replaceAllRegUsesWith(Register FromReg, Register ToReg);
3129 Register ToReg) { in replaceAllRegUsesWith() argument
3131 assert(ToReg.isVirtual()); in replaceAllRegUsesWith()
3134 O.setReg(ToReg); in replaceAllRegUsesWith()
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| H A D | HexagonISelLowering.cpp | 2849 SDValue ToReg = getInstr(Hexagon::C2_tfrpr, dl, MVT::i32, {VecV}, DAG); in insertVectorPred() local
2854 DAG.getNode(HexagonISD::INSERT, dl, MVT::i32, {ToReg, Ext, Width, Idx}); in insertVectorPred()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 5783 Register ToReg = UseMI.getOperand(0).getReg(); in foldImmediateImpl() local
5785 if (ToReg.isVirtual()) in foldImmediateImpl()
5786 RC = MRI->getRegClass(ToReg); in foldImmediateImpl()
5787 bool GR32Reg = (ToReg.isVirtual() && X86::GR32RegClass.hasSubClassEq(RC)) || in foldImmediateImpl()
5788 (ToReg.isPhysical() && X86::GR32RegClass.contains(ToReg)); in foldImmediateImpl()
5789 bool GR64Reg = (ToReg.isVirtual() && X86::GR64RegClass.hasSubClassEq(RC)) || in foldImmediateImpl()
5790 (ToReg.isPhysical() && X86::GR64RegClass.contains(ToReg)); in foldImmediateImpl()
5791 bool GR8Reg = (ToReg.isVirtual() && X86::GR8RegClass.hasSubClassEq(RC)) || in foldImmediateImpl()
5792 (ToReg.isPhysical() && X86::GR8RegClass.contains(ToReg)); in foldImmediateImpl()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 609 LLVM_ABI void replaceRegWith(Register FromReg, Register ToReg);
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| H A D | MachineInstr.h | 1688 LLVM_ABI void substituteRegister(Register FromReg, Register ToReg,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 182 Register ToReg) const { in replaceRegWith()
185 if (MRI.constrainRegAttrs(ToReg, FromReg)) in replaceRegWith()
186 MRI.replaceRegWith(FromReg, ToReg); in replaceRegWith()
188 Builder.buildCopy(FromReg, ToReg); in replaceRegWith()
195 Register ToReg) const { in replaceRegOpWith()
199 FromRegOp.setReg(ToReg); in replaceRegOpWith()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7470 SDValue ToReg = DAG.getCopyToReg(Chain, SL, SGPR01, QueuePtr, SDValue()); in lowerTrapHsaQueuePtr() local
7473 SDValue Ops[] = {ToReg, DAG.getTargetConstant(TrapID, SL, MVT::i16), SGPR01, in lowerTrapHsaQueuePtr()
7474 ToReg.getValue(1)}; in lowerTrapHsaQueuePtr()
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