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Searched refs:TargetOpcode (Results 1 – 25 of 276) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGenericMachineInstrs.h88 case TargetOpcode::G_LOAD: in classof()
89 case TargetOpcode::G_STORE: in classof()
90 case TargetOpcode::G_ZEXTLOAD: in classof()
91 case TargetOpcode::G_SEXTLOAD: in classof()
117 return MI->getOpcode() == TargetOpcode::G_INDEXED_LOAD; in classof()
125 return MI->getOpcode() == TargetOpcode::G_INDEXED_SEXTLOAD || in classof()
126 MI->getOpcode() == TargetOpcode::G_INDEXED_ZEXTLOAD; in classof()
135 case TargetOpcode::G_INDEXED_LOAD: in classof()
136 case TargetOpcode::G_INDEXED_ZEXTLOAD: in classof()
137 case TargetOpcode::G_INDEXED_SEXTLOAD: in classof()
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H A DMIPatternMatch.h379 return TmpMI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF;
450 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>
452 return BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>(L, R);
456 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR, false>
458 return BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR, false>(L, R);
462 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR_TRUNC, false>
464 return BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR_TRUNC, false>(L,
469 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, false>
471 return BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, false>(L, R);
475 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB> m_GSub(const LHS &L,
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H A DUtils.h55 case TargetOpcode::G_VECREDUCE_SEQ_FADD: \
56 case TargetOpcode::G_VECREDUCE_SEQ_FMUL: \
57 case TargetOpcode::G_VECREDUCE_FADD: \
58 case TargetOpcode::G_VECREDUCE_FMUL: \
59 case TargetOpcode::G_VECREDUCE_FMAX: \
60 case TargetOpcode::G_VECREDUCE_FMIN: \
61 case TargetOpcode::G_VECREDUCE_FMAXIMUM: \
62 case TargetOpcode::G_VECREDUCE_FMINIMUM: \
63 case TargetOpcode::G_VECREDUCE_ADD: \
64 case TargetOpcode::G_VECREDUCE_MUL: \
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H A DLegalizationArtifactCombiner.h43 case TargetOpcode::G_TRUNC: in isArtifactCast()
44 case TargetOpcode::G_SEXT: in isArtifactCast()
45 case TargetOpcode::G_ZEXT: in isArtifactCast()
46 case TargetOpcode::G_ANYEXT: in isArtifactCast()
64 assert(MI.getOpcode() == TargetOpcode::G_ANYEXT); in tryCombineAnyExt()
99 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineAnyExt()
101 if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) { in tryCombineAnyExt()
123 assert(MI.getOpcode() == TargetOpcode::G_ZEXT); in tryCombineZExt()
136 if (isInstUnsupported({TargetOpcode::G_AND, {DstTy}}) || in tryCombineZExt()
179 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineZExt()
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H A DMachineIRBuilder.h533 return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1}); in buildPtrMask()
594 return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1}); in buildUAddo()
600 return buildInstr(TargetOpcode::G_USUBO, {Res, CarryOut}, {Op0, Op1}); in buildUSubo()
606 return buildInstr(TargetOpcode::G_SADDO, {Res, CarryOut}, {Op0, Op1}); in buildSAddo()
612 return buildInstr(TargetOpcode::G_SSUBO, {Res, CarryOut}, {Op0, Op1}); in buildSSubo()
632 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut}, in buildUAdde()
640 return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut}, in buildUSube()
648 return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut}, in buildSAdde()
656 return buildInstr(TargetOpcode::G_SSUBE, {Res, CarryOut}, in buildSSube()
692 return buildInstr(TargetOpcode::G_SEXT_INREG, {Res}, {Op, SrcOp(ImmOp)}); in buildSExtInReg()
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H A DIRTranslator.h458 return translateBinaryOp(TargetOpcode::G_ADD, U, MIRBuilder); in translateAdd()
461 return translateBinaryOp(TargetOpcode::G_SUB, U, MIRBuilder); in translateSub()
464 return translateBinaryOp(TargetOpcode::G_AND, U, MIRBuilder); in translateAnd()
467 return translateBinaryOp(TargetOpcode::G_MUL, U, MIRBuilder); in translateMul()
470 return translateBinaryOp(TargetOpcode::G_OR, U, MIRBuilder); in translateOr()
473 return translateBinaryOp(TargetOpcode::G_XOR, U, MIRBuilder); in translateXor()
477 return translateBinaryOp(TargetOpcode::G_UDIV, U, MIRBuilder); in translateUDiv()
480 return translateBinaryOp(TargetOpcode::G_SDIV, U, MIRBuilder); in translateSDiv()
483 return translateBinaryOp(TargetOpcode::G_UREM, U, MIRBuilder); in translateURem()
486 return translateBinaryOp(TargetOpcode::G_SREM, U, MIRBuilder); in translateSRem()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp42 case TargetOpcode::COPY: in computeKnownAlignment()
44 case TargetOpcode::G_ASSERT_ALIGN: { in computeKnownAlignment()
48 case TargetOpcode::G_FRAME_INDEX: { in computeKnownAlignment()
52 case TargetOpcode::G_INTRINSIC: in computeKnownAlignment()
53 case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS: in computeKnownAlignment()
54 case TargetOpcode::G_INTRINSIC_CONVERGENT: in computeKnownAlignment()
55 case TargetOpcode::G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS: in computeKnownAlignment()
192 case TargetOpcode::G_BUILD_VECTOR: { in computeKnownBitsImpl()
211 case TargetOpcode::COPY: in computeKnownBitsImpl()
212 case TargetOpcode::G_PHI: in computeKnownBitsImpl()
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H A DUtils.cpp80 TII.get(TargetOpcode::COPY), ConstrainedReg) in constrainOperandRegClass()
85 TII.get(TargetOpcode::COPY), Reg) in constrainOperandRegClass()
229 if (MI.getOpcode() == TargetOpcode::LOCAL_ESCAPE) in isTriviallyDead()
232 if (MI.getOpcode() == TargetOpcode::LIFETIME_START || in isTriviallyDead()
233 MI.getOpcode() == TargetOpcode::LIFETIME_END) in isTriviallyDead()
338 case TargetOpcode::G_ANYEXT: in getConstantVRegValWithLookThrough()
342 case TargetOpcode::G_TRUNC: in getConstantVRegValWithLookThrough()
343 case TargetOpcode::G_SEXT: in getConstantVRegValWithLookThrough()
344 case TargetOpcode::G_ZEXT: in getConstantVRegValWithLookThrough()
350 case TargetOpcode::COPY: in getConstantVRegValWithLookThrough()
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H A DCSEMIRBuilder.cpp182 case TargetOpcode::G_ICMP: { in buildInstr()
196 case TargetOpcode::G_ADD: in buildInstr()
197 case TargetOpcode::G_PTR_ADD: in buildInstr()
198 case TargetOpcode::G_AND: in buildInstr()
199 case TargetOpcode::G_ASHR: in buildInstr()
200 case TargetOpcode::G_LSHR: in buildInstr()
201 case TargetOpcode::G_MUL: in buildInstr()
202 case TargetOpcode::G_OR: in buildInstr()
203 case TargetOpcode::G_SHL: in buildInstr()
204 case TargetOpcode::G_SUB: in buildInstr()
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H A DMachineIRBuilder.cpp60 getTII().get(TargetOpcode::DBG_VALUE), in buildDirectDbgValue()
73 getTII().get(TargetOpcode::DBG_VALUE), in buildIndirectDbgValue()
85 return insertInstr(buildInstrNoInsert(TargetOpcode::DBG_VALUE) in buildFIDbgValue()
100 auto MIB = buildInstrNoInsert(TargetOpcode::DBG_VALUE); in buildConstDbgValue()
131 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel()
140 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc()
150 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex()
163 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue()
172 auto MIB = buildInstr(TargetOpcode::G_CONSTANT_POOL); in buildConstantPool()
180 return buildInstr(TargetOpcode::G_JUMP_TABLE, {PtrTy}, {}) in buildJumpTable()
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H A DLegalizerHelper.cpp227 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES); in getUnmergeResults()
272 if (PadStrategy == TargetOpcode::G_ZEXT) in buildLCMMergePieces()
274 else if (PadStrategy == TargetOpcode::G_ANYEXT) in buildLCMMergePieces()
277 assert(PadStrategy == TargetOpcode::G_SEXT); in buildLCMMergePieces()
319 if (PadStrategy == TargetOpcode::G_ANYEXT) in buildLCMMergePieces()
321 else if (PadStrategy == TargetOpcode::G_ZEXT) in buildLCMMergePieces()
414 case TargetOpcode::G_MUL: in getRTLibDesc()
416 case TargetOpcode::G_SDIV: in getRTLibDesc()
418 case TargetOpcode::G_UDIV: in getRTLibDesc()
420 case TargetOpcode::G_SREM: in getRTLibDesc()
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H A DCSEInfo.cpp41 case TargetOpcode::G_ADD: in shouldCSEOpc()
42 case TargetOpcode::G_AND: in shouldCSEOpc()
43 case TargetOpcode::G_ASHR: in shouldCSEOpc()
44 case TargetOpcode::G_LSHR: in shouldCSEOpc()
45 case TargetOpcode::G_MUL: in shouldCSEOpc()
46 case TargetOpcode::G_OR: in shouldCSEOpc()
47 case TargetOpcode::G_SHL: in shouldCSEOpc()
48 case TargetOpcode::G_SUB: in shouldCSEOpc()
49 case TargetOpcode::G_XOR: in shouldCSEOpc()
50 case TargetOpcode in shouldCSEOpc()
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H A DCombinerHelper.cpp155 return isLegalOrBeforeLegalizer({TargetOpcode::G_CONSTANT, {Ty}}); in isConstantLegalOrBeforeLegalizer()
160 return isLegal({TargetOpcode::G_BUILD_VECTOR, {Ty, EltTy}}) && in isConstantLegalOrBeforeLegalizer()
161 isLegal({TargetOpcode::G_CONSTANT, {EltTy}}); in isConstantLegalOrBeforeLegalizer()
213 if (MI.getOpcode() != TargetOpcode::COPY) in matchCombineCopy()
298 assert(MI.getOpcode() == TargetOpcode::G_CONCAT_VECTORS && in matchCombineConcatVectors()
313 case TargetOpcode::G_BUILD_VECTOR: in matchCombineConcatVectors()
320 case TargetOpcode::G_IMPLICIT_DEF: { in matchCombineConcatVectors()
345 {TargetOpcode::G_BUILD_VECTOR, {DstTy, MRI.getType(Ops[0])}})) { in matchCombineConcatVectors()
405 {TargetOpcode::G_IMPLICIT_DEF, {ConcatSrcTy}})) in matchCombineShuffleConcat()
429 {TargetOpcode::G_CONCAT_VECTORS, in matchCombineShuffleConcat()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVRegisterBankInfo.cpp187 if (MI.getOpcode() != TargetOpcode::COPY) in hasFPConstraints()
197 case TargetOpcode::G_FPTOSI: in onlyUsesFP()
198 case TargetOpcode::G_FPTOUI: in onlyUsesFP()
199 case TargetOpcode::G_FCMP: in onlyUsesFP()
212 case TargetOpcode::G_SITOFP: in onlyDefinesFP()
213 case TargetOpcode::G_UITOFP: in onlyDefinesFP()
253 if (!isPreISelGenericOpcode(Opc) || Opc == TargetOpcode::G_PHI) { in getInstrMapping()
273 case TargetOpcode::G_ADD: in getInstrMapping()
274 case TargetOpcode::G_SUB: in getInstrMapping()
275 case TargetOpcode::G_SHL: in getInstrMapping()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBankInfo.cpp75 if (!isPreISelGenericOpcode(Opc) || Opc == TargetOpcode::G_PHI) { in getInstrMapping()
94 case TargetOpcode::G_ADD: in getInstrMapping()
95 case TargetOpcode::G_SUB: in getInstrMapping()
97 case TargetOpcode::G_AND: in getInstrMapping()
98 case TargetOpcode::G_OR: in getInstrMapping()
99 case TargetOpcode::G_XOR: in getInstrMapping()
101 case TargetOpcode::G_SEXT: in getInstrMapping()
102 case TargetOpcode::G_ZEXT: in getInstrMapping()
103 case TargetOpcode::G_ANYEXT: { in getInstrMapping()
118 case TargetOpcode::G_FADD: in getInstrMapping()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp306 case TargetOpcode::G_OR: { in getInstrAlternativeMappings()
329 case TargetOpcode::G_BITCAST: { in getInstrAlternativeMappings()
369 case TargetOpcode::G_LOAD: { in getInstrAlternativeMappings()
411 case TargetOpcode::G_OR: in applyMappingImpl()
412 case TargetOpcode::G_BITCAST: in applyMappingImpl()
413 case TargetOpcode::G_LOAD: in applyMappingImpl()
419 case TargetOpcode::G_INSERT_VECTOR_ELT: { in applyMappingImpl()
522 if (Op == TargetOpcode::G_INTRINSIC && isFPIntrinsic(MRI, MI)) in hasFPConstraints()
531 if (Op != TargetOpcode::COPY && !MI.isPHI() && in hasFPConstraints()
560 case TargetOpcode::G_FPTOSI: in onlyUsesFP()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86RegisterBankInfo.cpp100 if (Op == TargetOpcode::G_INTRINSIC && isFPIntrinsic(MRI, MI)) in hasFPConstraints()
109 if (Op != TargetOpcode::COPY && !MI.isPHI() && in hasFPConstraints()
138 case TargetOpcode::G_FPTOSI: in onlyUsesFP()
139 case TargetOpcode::G_FPTOUI: in onlyUsesFP()
140 case TargetOpcode::G_FCMP: in onlyUsesFP()
141 case TargetOpcode::G_LROUND: in onlyUsesFP()
142 case TargetOpcode::G_LLROUND: in onlyUsesFP()
143 case TargetOpcode::G_INTRINSIC_TRUNC: in onlyUsesFP()
144 case TargetOpcode::G_INTRINSIC_ROUND: in onlyUsesFP()
157 case TargetOpcode::G_SITOFP: in onlyDefinesFP()
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H A DX86InstructionSelector.cpp301 TII.get(TargetOpcode::SUBREG_TO_REG)) in selectCopy()
366 if (Opcode == TargetOpcode::LOAD_STACK_GUARD) in select()
390 case TargetOpcode::G_STORE: in select()
391 case TargetOpcode::G_LOAD: in select()
393 case TargetOpcode::G_PTR_ADD: in select()
394 case TargetOpcode::G_FRAME_INDEX: in select()
396 case TargetOpcode::G_GLOBAL_VALUE: in select()
398 case TargetOpcode::G_CONSTANT: in select()
400 case TargetOpcode::G_FCONSTANT: in select()
402 case TargetOpcode::G_PTRTOINT: in select()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterBankInfo.cpp
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.cpp111 case TargetOpcode::G_FPTOSI: in isFloatingPointOpcodeUse()
112 case TargetOpcode::G_FPTOUI: in isFloatingPointOpcodeUse()
113 case TargetOpcode::G_FCMP: in isFloatingPointOpcodeUse()
124 case TargetOpcode::G_SITOFP: in isFloatingPointOpcodeDef()
125 case TargetOpcode::G_UITOFP: in isFloatingPointOpcodeDef()
133 if (MI->getOpcode() == TargetOpcode::G_LOAD || in isGprbTwoInstrUnalignedLoadOrStore()
134 MI->getOpcode() == TargetOpcode::G_STORE) { in isGprbTwoInstrUnalignedLoadOrStore()
147 case TargetOpcode::G_LOAD: in isAmbiguous()
148 case TargetOpcode::G_STORE: in isAmbiguous()
149 case TargetOpcode::G_PHI: in isAmbiguous()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp28 TargetOpcode::G_ADD,
29 TargetOpcode::G_FADD,
30 TargetOpcode::G_SUB,
31 TargetOpcode::G_FSUB,
32 TargetOpcode::G_MUL,
33 TargetOpcode::G_FMUL,
34 TargetOpcode::G_SDIV,
35 TargetOpcode::G_UDIV,
36 TargetOpcode::G_FDIV,
37 TargetOpcode::G_SREM,
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H A DSPIRVInstructionSelector.cpp306 assert(Res || Def->getOpcode() == TargetOpcode::G_CONSTANT); in select()
330 assert(!HasDefs || ResType || I.getOpcode() == TargetOpcode::G_GLOBAL_VALUE); in select()
345 if (isTypeFoldingSupported(Opcode) && Opcode != TargetOpcode::G_CONSTANT) in spvSelect()
348 case TargetOpcode::G_CONSTANT: in spvSelect()
351 case TargetOpcode::G_GLOBAL_VALUE: in spvSelect()
353 case TargetOpcode::G_IMPLICIT_DEF: in spvSelect()
355 case TargetOpcode::G_FREEZE: in spvSelect()
358 case TargetOpcode::G_INTRINSIC: in spvSelect()
359 case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS: in spvSelect()
360 case TargetOpcode::G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS: in spvSelect()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenCommonISel.cpp67 case TargetOpcode::G_TRUNC: in MIIsInTerminatorSequence()
68 case TargetOpcode::G_ZEXT: in MIIsInTerminatorSequence()
69 case TargetOpcode::G_ANYEXT: in MIIsInTerminatorSequence()
70 case TargetOpcode::G_SEXT: in MIIsInTerminatorSequence()
71 case TargetOpcode::G_MERGE_VALUES: in MIIsInTerminatorSequence()
72 case TargetOpcode::G_UNMERGE_VALUES: in MIIsInTerminatorSequence()
73 case TargetOpcode::G_CONCAT_VECTORS: in MIIsInTerminatorSequence()
74 case TargetOpcode::G_BUILD_VECTOR: in MIIsInTerminatorSequence()
75 case TargetOpcode::G_EXTRACT: in MIIsInTerminatorSequence()
212 assert(Copy.getOpcode() == TargetOpcode::COPY && "Must be a COPY"); in getSalvageOpsForCopy()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetOpcodes.h20 namespace TargetOpcode {
31 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START && in isPreISelGenericOpcode()
32 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isPreISelGenericOpcode()
37 return Opcode > TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isTargetSpecificOpcode()
43 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START && in isPreISelGenericOptimizationHint()
44 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END; in isPreISelGenericOptimizationHint()

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