Lines Matching refs:TargetOpcode
155 return isLegalOrBeforeLegalizer({TargetOpcode::G_CONSTANT, {Ty}}); in isConstantLegalOrBeforeLegalizer()
160 return isLegal({TargetOpcode::G_BUILD_VECTOR, {Ty, EltTy}}) && in isConstantLegalOrBeforeLegalizer()
161 isLegal({TargetOpcode::G_CONSTANT, {EltTy}}); in isConstantLegalOrBeforeLegalizer()
213 if (MI.getOpcode() != TargetOpcode::COPY) in matchCombineCopy()
298 assert(MI.getOpcode() == TargetOpcode::G_CONCAT_VECTORS && in matchCombineConcatVectors()
313 case TargetOpcode::G_BUILD_VECTOR: in matchCombineConcatVectors()
320 case TargetOpcode::G_IMPLICIT_DEF: { in matchCombineConcatVectors()
345 {TargetOpcode::G_BUILD_VECTOR, {DstTy, MRI.getType(Ops[0])}})) { in matchCombineConcatVectors()
405 {TargetOpcode::G_IMPLICIT_DEF, {ConcatSrcTy}})) in matchCombineShuffleConcat()
429 {TargetOpcode::G_CONCAT_VECTORS, in matchCombineShuffleConcat()
467 assert(MI.getOpcode() == TargetOpcode::G_SHUFFLE_VECTOR && in matchCombineShuffleVector()
557 assert(MI.getOpcode() == TargetOpcode::G_SHUFFLE_VECTOR && in matchShuffleToExtract()
600 CurrentUse.ExtendOpcode == TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
612 if (OpcodeForCandidate == TargetOpcode::G_ANYEXT && in ChoosePreferredUse()
613 CurrentUse.ExtendOpcode != TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
615 else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ANYEXT && in ChoosePreferredUse()
616 OpcodeForCandidate != TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
624 if (CurrentUse.ExtendOpcode == TargetOpcode::G_SEXT && in ChoosePreferredUse()
625 OpcodeForCandidate == TargetOpcode::G_ZEXT) in ChoosePreferredUse()
627 else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ZEXT && in ChoosePreferredUse()
628 OpcodeForCandidate == TargetOpcode::G_SEXT) in ChoosePreferredUse()
689 case TargetOpcode::G_ANYEXT: in getExtLoadOpcForExtend()
690 CandidateLoadOpc = TargetOpcode::G_LOAD; in getExtLoadOpcForExtend()
692 case TargetOpcode::G_SEXT: in getExtLoadOpcForExtend()
693 CandidateLoadOpc = TargetOpcode::G_SEXTLOAD; in getExtLoadOpcForExtend()
695 case TargetOpcode::G_ZEXT: in getExtLoadOpcForExtend()
696 CandidateLoadOpc = TargetOpcode::G_ZEXTLOAD; in getExtLoadOpcForExtend()
742 ? TargetOpcode::G_ANYEXT in matchCombineExtendingLoads()
743 : isa<GSExtLoad>(&MI) ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in matchCombineExtendingLoads()
746 if (UseMI.getOpcode() == TargetOpcode::G_SEXT || in matchCombineExtendingLoads()
747 UseMI.getOpcode() == TargetOpcode::G_ZEXT || in matchCombineExtendingLoads()
748 (UseMI.getOpcode() == TargetOpcode::G_ANYEXT)) { in matchCombineExtendingLoads()
822 UseMI->getOpcode() == TargetOpcode::G_ANYEXT) { in applyCombineExtendingLoads()
888 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchCombineLoadWithAndMask()
954 {TargetOpcode::G_ZEXTLOAD, {RegTy, MRI.getType(PtrReg)}, {MemDesc}})) in matchCombineLoadWithAndMask()
962 B.buildLoadInstr(TargetOpcode::G_ZEXTLOAD, Dst, PtrReg, *NewMMO); in matchCombineLoadWithAndMask()
997 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in matchSextTruncSextLoad()
1024 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in applySextTruncSextLoad()
1031 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in matchSextInRegOfLoad()
1071 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_SEXTLOAD, in matchSextInRegOfLoad()
1083 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in applySextInRegOfLoad()
1100 Builder.buildLoadInstr(TargetOpcode::G_SEXTLOAD, MI.getOperand(0).getReg(), in applySextInRegOfLoad()
1130 case TargetOpcode::G_LOAD: in getIndexedOpc()
1131 return TargetOpcode::G_INDEXED_LOAD; in getIndexedOpc()
1132 case TargetOpcode::G_STORE: in getIndexedOpc()
1133 return TargetOpcode::G_INDEXED_STORE; in getIndexedOpc()
1134 case TargetOpcode::G_ZEXTLOAD: in getIndexedOpc()
1135 return TargetOpcode::G_INDEXED_ZEXTLOAD; in getIndexedOpc()
1136 case TargetOpcode::G_SEXTLOAD: in getIndexedOpc()
1137 return TargetOpcode::G_INDEXED_SEXTLOAD; in getIndexedOpc()
1153 if (IndexedOpc == TargetOpcode::G_INDEXED_STORE) in isIndexedLoadStoreLegal()
1185 if (getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Ptr, MRI)) in findPostIndexCandidate()
1219 if (OffsetDef->getOpcode() != TargetOpcode::G_CONSTANT) in findPostIndexCandidate()
1281 if (BaseDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) in findPreIndexCandidate()
1321 assert(MI.getOpcode() == TargetOpcode::G_EXTRACT_VECTOR_ELT); in matchCombineExtractedVectorLoad()
1392 LegalityQuery Q = {TargetOpcode::G_LOAD, {VecEltTy, PtrTy}, {MMDesc}}; in matchCombineExtractedVectorLoad()
1446 bool IsStore = Opcode == TargetOpcode::G_STORE; in applyCombineIndexedLoadStore()
1485 case TargetOpcode::G_SDIV: in matchCombineDivRem()
1486 case TargetOpcode::G_UDIV: { in matchCombineDivRem()
1488 IsSigned = Opcode == TargetOpcode::G_SDIV; in matchCombineDivRem()
1491 case TargetOpcode::G_SREM: in matchCombineDivRem()
1492 case TargetOpcode::G_UREM: { in matchCombineDivRem()
1494 IsSigned = Opcode == TargetOpcode::G_SREM; in matchCombineDivRem()
1502 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
1503 RemOpcode = TargetOpcode::G_SREM; in matchCombineDivRem()
1504 DivremOpcode = TargetOpcode::G_SDIVREM; in matchCombineDivRem()
1506 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
1507 RemOpcode = TargetOpcode::G_UREM; in matchCombineDivRem()
1508 DivremOpcode = TargetOpcode::G_UDIVREM; in matchCombineDivRem()
1546 if (Opcode == TargetOpcode::G_SDIV || Opcode == TargetOpcode::G_UDIV) { in applyCombineDivRem()
1555 Opcode == TargetOpcode::G_SDIV || Opcode == TargetOpcode::G_SREM; in applyCombineDivRem()
1564 Builder.buildInstr(IsSigned ? TargetOpcode::G_SDIVREM in applyCombineDivRem()
1565 : TargetOpcode::G_UDIVREM, in applyCombineDivRem()
1574 assert(MI.getOpcode() == TargetOpcode::G_BR); in matchOptBrCondByInvertingCond()
1596 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1655 case TargetOpcode::G_FNEG: { in constantFoldFpUnary()
1659 case TargetOpcode::G_FABS: { in constantFoldFpUnary()
1663 case TargetOpcode::G_FPTRUNC: { in constantFoldFpUnary()
1670 case TargetOpcode::G_FSQRT: { in constantFoldFpUnary()
1677 case TargetOpcode::G_FLOG2: { in constantFoldFpUnary()
1709 if (MI.getOpcode() != TargetOpcode::G_PTR_ADD) in matchPtrAddImmedChain()
1719 if (!Add2Def || Add2Def->getOpcode() != TargetOpcode::G_PTR_ADD) in matchPtrAddImmedChain()
1765 assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected G_PTR_ADD"); in applyPtrAddImmedChain()
1786 assert((Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_ASHR || in matchShiftImmedChain()
1787 Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_SSHLSAT || in matchShiftImmedChain()
1788 Opcode == TargetOpcode::G_USHLSAT) && in matchShiftImmedChain()
1814 if (Opcode == TargetOpcode::G_USHLSAT && in matchShiftImmedChain()
1824 assert((Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_ASHR || in applyShiftImmedChain()
1825 Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_SSHLSAT || in applyShiftImmedChain()
1826 Opcode == TargetOpcode::G_USHLSAT) && in applyShiftImmedChain()
1835 if (Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_LSHR) { in applyShiftImmedChain()
1866 assert((ShiftOpcode == TargetOpcode::G_SHL || in matchShiftOfShiftedLogic()
1867 ShiftOpcode == TargetOpcode::G_ASHR || in matchShiftOfShiftedLogic()
1868 ShiftOpcode == TargetOpcode::G_LSHR || in matchShiftOfShiftedLogic()
1869 ShiftOpcode == TargetOpcode::G_USHLSAT || in matchShiftOfShiftedLogic()
1870 ShiftOpcode == TargetOpcode::G_SSHLSAT) && in matchShiftOfShiftedLogic()
1880 if (LogicOpcode != TargetOpcode::G_AND && LogicOpcode != TargetOpcode::G_OR && in matchShiftOfShiftedLogic()
1881 LogicOpcode != TargetOpcode::G_XOR) in matchShiftOfShiftedLogic()
1937 assert((Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_ASHR || in applyShiftOfShiftedLogic()
1938 Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_USHLSAT || in applyShiftOfShiftedLogic()
1939 Opcode == TargetOpcode::G_SSHLSAT) && in applyShiftOfShiftedLogic()
1974 assert(MI.getOpcode() == TargetOpcode::G_SHL && "Expected G_SHL"); in matchCommuteShift()
1997 assert((SrcDef->getOpcode() == TargetOpcode::G_ADD || in matchCommuteShift()
1998 SrcDef->getOpcode() == TargetOpcode::G_OR) && "Unexpected op"); in matchCommuteShift()
2010 assert(MI.getOpcode() == TargetOpcode::G_MUL && "Expected a G_MUL"); in matchCombineMulToShl()
2022 assert(MI.getOpcode() == TargetOpcode::G_MUL && "Expected a G_MUL"); in applyCombineMulToShl()
2027 MI.setDesc(MIB.getTII().get(TargetOpcode::G_SHL)); in applyCombineMulToShl()
2035 assert(MI.getOpcode() == TargetOpcode::G_SHL && KB); in matchCombineShlOfExtend()
2060 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_SHL, {SrcTy, ShiftAmtTy}})) in matchCombineShlOfExtend()
2115 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in matchCombineUnmergeMergeToPlainValues()
2139 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in applyCombineUnmergeMergeToPlainValues()
2173 if (SrcInstr->getOpcode() != TargetOpcode::G_CONSTANT && in matchCombineUnmergeConstant()
2174 SrcInstr->getOpcode() != TargetOpcode::G_FCONSTANT) in matchCombineUnmergeConstant()
2178 APInt Val = SrcInstr->getOpcode() == TargetOpcode::G_CONSTANT in matchCombineUnmergeConstant()
2195 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in applyCombineUnmergeConstant()
2223 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in matchCombineUnmergeWithDeadLanesToTrunc()
2244 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in matchCombineUnmergeZExtToZExt()
2270 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in applyCombineUnmergeZExtToZExt()
2277 assert(ZExtInstr && ZExtInstr->getOpcode() == TargetOpcode::G_ZEXT && in applyCombineUnmergeZExtToZExt()
2304 assert((MI.getOpcode() == TargetOpcode::G_SHL || in matchCombineShiftToUnmerge()
2305 MI.getOpcode() == TargetOpcode::G_LSHR || in matchCombineShiftToUnmerge()
2306 MI.getOpcode() == TargetOpcode::G_ASHR) && "Expected a shift"); in matchCombineShiftToUnmerge()
2340 if (MI.getOpcode() == TargetOpcode::G_LSHR) { in applyCombineShiftToUnmerge()
2355 } else if (MI.getOpcode() == TargetOpcode::G_SHL) { in applyCombineShiftToUnmerge()
2369 assert(MI.getOpcode() == TargetOpcode::G_ASHR); in applyCombineShiftToUnmerge()
2410 assert(MI.getOpcode() == TargetOpcode::G_INTTOPTR && "Expected a G_INTTOPTR"); in matchCombineI2PToP2I()
2419 assert(MI.getOpcode() == TargetOpcode::G_INTTOPTR && "Expected a G_INTTOPTR"); in applyCombineI2PToP2I()
2426 assert(MI.getOpcode() == TargetOpcode::G_PTRTOINT && "Expected a G_PTRTOINT"); in applyCombineP2IToI2P()
2434 assert(MI.getOpcode() == TargetOpcode::G_ADD); in matchCombineAddP2IToPtrAdd()
2506 assert(MI.getOpcode() == TargetOpcode::G_ANYEXT && "Expected a G_ANYEXT"); in matchCombineAnyExtTrunc()
2518 assert(MI.getOpcode() == TargetOpcode::G_ZEXT && "Expected a G_ZEXT"); in matchCombineZextTrunc()
2533 assert((MI.getOpcode() == TargetOpcode::G_ANYEXT || in matchCombineExtOfExt()
2534 MI.getOpcode() == TargetOpcode::G_SEXT || in matchCombineExtOfExt()
2535 MI.getOpcode() == TargetOpcode::G_ZEXT) && in matchCombineExtOfExt()
2546 (Opc == TargetOpcode::G_ANYEXT && in matchCombineExtOfExt()
2547 (SrcOpc == TargetOpcode::G_SEXT || SrcOpc == TargetOpcode::G_ZEXT)) || in matchCombineExtOfExt()
2548 (Opc == TargetOpcode::G_SEXT && SrcOpc == TargetOpcode::G_ZEXT)) { in matchCombineExtOfExt()
2557 assert((MI.getOpcode() == TargetOpcode::G_ANYEXT || in applyCombineExtOfExt()
2558 MI.getOpcode() == TargetOpcode::G_SEXT || in applyCombineExtOfExt()
2559 MI.getOpcode() == TargetOpcode::G_ZEXT) && in applyCombineExtOfExt()
2576 if (MI.getOpcode() == TargetOpcode::G_ANYEXT || in applyCombineExtOfExt()
2577 (MI.getOpcode() == TargetOpcode::G_SEXT && in applyCombineExtOfExt()
2578 SrcExtOp == TargetOpcode::G_ZEXT)) { in applyCombineExtOfExt()
2587 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in matchCombineTruncOfExt()
2591 if (SrcOpc == TargetOpcode::G_ANYEXT || SrcOpc == TargetOpcode::G_SEXT || in matchCombineTruncOfExt()
2592 SrcOpc == TargetOpcode::G_ZEXT) { in matchCombineTruncOfExt()
2601 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in applyCombineTruncOfExt()
2638 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in matchCombineTruncOfShift()
2655 case TargetOpcode::G_SHL: { in matchCombineTruncOfShift()
2664 case TargetOpcode::G_LSHR: in matchCombineTruncOfShift()
2665 case TargetOpcode::G_ASHR: { in matchCombineTruncOfShift()
2672 if (User.getOpcode() == TargetOpcode::G_STORE) in matchCombineTruncOfShift()
2725 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAnyExplicitUseIsUndef()
2732 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAllExplicitUsesAreUndef()
2737 assert(MI.getOpcode() == TargetOpcode::G_SHUFFLE_VECTOR); in matchUndefShuffleVectorMask()
2743 assert(MI.getOpcode() == TargetOpcode::G_STORE); in matchUndefStore()
2744 return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(), in matchUndefStore()
2749 assert(MI.getOpcode() == TargetOpcode::G_SELECT); in matchUndefSelectCmp()
2750 return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(1).getReg(), in matchUndefSelectCmp()
2755 assert((MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT || in matchInsertExtractVecEltOutOfBounds()
2756 MI.getOpcode() == TargetOpcode::G_EXTRACT_VECTOR_ELT) && in matchInsertExtractVecEltOutOfBounds()
2760 MI.getOpcode() == TargetOpcode::G_EXTRACT_VECTOR_ELT ? 2 : 3; in matchInsertExtractVecEltOutOfBounds()
2929 assert((MI.getOpcode() == TargetOpcode::G_FSHL || in applyFunnelShiftConstantModulo()
2930 MI.getOpcode() == TargetOpcode::G_FSHR) && in applyFunnelShiftConstantModulo()
2953 assert(MI.getOpcode() == TargetOpcode::G_SELECT); in matchSelectSameVal()
2975 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchOperandIsUndef()
3037 assert(MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT && in matchCombineInsertVecElts()
3046 TargetOpcode::G_INSERT_VECTOR_ELT) in matchCombineInsertVecElts()
3063 if (CurrInst->getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT) in matchCombineInsertVecElts()
3065 if (TmpInst->getOpcode() == TargetOpcode::G_BUILD_VECTOR) { in matchCombineInsertVecElts()
3074 return TmpInst->getOpcode() == TargetOpcode::G_IMPLICIT_DEF || in matchCombineInsertVecElts()
3113 assert(LogicOpcode == TargetOpcode::G_AND || in matchHoistLogicOpWithSameOpcodeHands()
3114 LogicOpcode == TargetOpcode::G_OR || in matchHoistLogicOpWithSameOpcodeHands()
3115 LogicOpcode == TargetOpcode::G_XOR); in matchHoistLogicOpWithSameOpcodeHands()
3151 case TargetOpcode::G_ANYEXT: in matchHoistLogicOpWithSameOpcodeHands()
3152 case TargetOpcode::G_SEXT: in matchHoistLogicOpWithSameOpcodeHands()
3153 case TargetOpcode::G_ZEXT: { in matchHoistLogicOpWithSameOpcodeHands()
3157 case TargetOpcode::G_TRUNC: { in matchHoistLogicOpWithSameOpcodeHands()
3173 case TargetOpcode::G_AND: in matchHoistLogicOpWithSameOpcodeHands()
3174 case TargetOpcode::G_ASHR: in matchHoistLogicOpWithSameOpcodeHands()
3175 case TargetOpcode::G_LSHR: in matchHoistLogicOpWithSameOpcodeHands()
3176 case TargetOpcode::G_SHL: { in matchHoistLogicOpWithSameOpcodeHands()
3228 assert(MI.getOpcode() == TargetOpcode::G_ASHR); in matchAshrShlToSextInreg()
3238 {TargetOpcode::G_SEXT_INREG, {MRI.getType(Src)}})) in matchAshrShlToSextInreg()
3246 assert(MI.getOpcode() == TargetOpcode::G_ASHR); in applyAshShlToSextInreg()
3258 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchOverlappingAnd()
3299 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchRedundantAnd()
3346 assert(MI.getOpcode() == TargetOpcode::G_OR); in matchRedundantOr()
3396 assert(MI.getOpcode() == TargetOpcode::G_XOR); in matchNotCmp()
3426 case TargetOpcode::G_ICMP: in matchNotCmp()
3432 case TargetOpcode::G_FCMP: in matchNotCmp()
3438 case TargetOpcode::G_AND: in matchNotCmp()
3439 case TargetOpcode::G_OR: in matchNotCmp()
3481 case TargetOpcode::G_ICMP: in applyNotCmp()
3482 case TargetOpcode::G_FCMP: { in applyNotCmp()
3489 case TargetOpcode::G_AND: in applyNotCmp()
3490 Def->setDesc(Builder.getTII().get(TargetOpcode::G_OR)); in applyNotCmp()
3492 case TargetOpcode::G_OR: in applyNotCmp()
3493 Def->setDesc(Builder.getTII().get(TargetOpcode::G_AND)); in applyNotCmp()
3506 assert(MI.getOpcode() == TargetOpcode::G_XOR); in matchXorOfAndWithSameReg()
3541 MI.setDesc(Builder.getTII().get(TargetOpcode::G_AND)); in applyXorOfAndWithSameReg()
3597 if (Select->getOpcode() != TargetOpcode::G_SELECT || in matchFoldBinOpIntoSelect()
3602 if (Select->getOpcode() != TargetOpcode::G_SELECT || in matchFoldBinOpIntoSelect()
3625 (BinOpcode == TargetOpcode::G_AND || BinOpcode == TargetOpcode::G_OR) && in matchFoldBinOpIntoSelect()
3678 assert(Root->getOpcode() == TargetOpcode::G_OR && "Expected G_OR only!"); in findCandidatesForLoadOrCombine()
3722 if (const MachineInstr *Or = getOpcodeDef(TargetOpcode::G_OR, OrLHS, MRI)) in findCandidatesForLoadOrCombine()
3726 if (const MachineInstr *Or = getOpcodeDef(TargetOpcode::G_OR, OrRHS, MRI)) in findCandidatesForLoadOrCombine()
3910 assert(MI.getOpcode() == TargetOpcode::G_OR); in matchLoadOrCombine()
3970 if (NeedsBSwap && !isLegalOrBeforeLegalizer({TargetOpcode::G_BSWAP, {Ty}})) in matchLoadOrCombine()
3998 {TargetOpcode::G_LOAD, {Ty, MRI.getType(Ptr)}, {MMDesc}})) in matchLoadOrCombine()
4036 case TargetOpcode::G_ANYEXT: in matchExtendThroughPhis()
4038 case TargetOpcode::G_ZEXT: in matchExtendThroughPhis()
4039 case TargetOpcode::G_SEXT: in matchExtendThroughPhis()
4056 case TargetOpcode::G_LOAD: in matchExtendThroughPhis()
4057 case TargetOpcode::G_TRUNC: in matchExtendThroughPhis()
4058 case TargetOpcode::G_SEXT: in matchExtendThroughPhis()
4059 case TargetOpcode::G_ZEXT: in matchExtendThroughPhis()
4060 case TargetOpcode::G_ANYEXT: in matchExtendThroughPhis()
4061 case TargetOpcode::G_CONSTANT: in matchExtendThroughPhis()
4106 auto NewPhi = Builder.buildInstrNoInsert(TargetOpcode::G_PHI); in applyExtendThroughPhis()
4122 assert(MI.getOpcode() == TargetOpcode::G_EXTRACT_VECTOR_ELT); in matchExtractVecEltBuildVec()
4137 if (SrcVecMI->getOpcode() == TargetOpcode::G_TRUNC) { in matchExtractVecEltBuildVec()
4141 if (SrcVecMI->getOpcode() != TargetOpcode::G_BUILD_VECTOR && in matchExtractVecEltBuildVec()
4142 SrcVecMI->getOpcode() != TargetOpcode::G_BUILD_VECTOR_TRUNC) in matchExtractVecEltBuildVec()
4174 assert(MI.getOpcode() == TargetOpcode::G_BUILD_VECTOR); in matchExtractAllEltsFromBuildVector()
4197 if (II.getOpcode() != TargetOpcode::G_EXTRACT_VECTOR_ELT) in matchExtractAllEltsFromBuildVector()
4216 assert(MI.getOpcode() == TargetOpcode::G_BUILD_VECTOR); in applyExtractAllEltsFromBuildVector()
4238 assert(MI.getOpcode() == TargetOpcode::G_OR); in matchOrShiftToFunnelShift()
4260 FshOpc = TargetOpcode::G_FSHR; in matchOrShiftToFunnelShift()
4267 FshOpc = TargetOpcode::G_FSHL; in matchOrShiftToFunnelShift()
4273 FshOpc = TargetOpcode::G_FSHR; in matchOrShiftToFunnelShift()
4292 assert(Opc == TargetOpcode::G_FSHL || Opc == TargetOpcode::G_FSHR); in matchFunnelShiftToRotate()
4298 Opc == TargetOpcode::G_FSHL ? TargetOpcode::G_ROTL : TargetOpcode::G_ROTR; in matchFunnelShiftToRotate()
4304 assert(Opc == TargetOpcode::G_FSHL || Opc == TargetOpcode::G_FSHR); in applyFunnelShiftToRotate()
4305 bool IsFSHL = Opc == TargetOpcode::G_FSHL; in applyFunnelShiftToRotate()
4307 MI.setDesc(Builder.getTII().get(IsFSHL ? TargetOpcode::G_ROTL in applyFunnelShiftToRotate()
4308 : TargetOpcode::G_ROTR)); in applyFunnelShiftToRotate()
4315 assert(MI.getOpcode() == TargetOpcode::G_ROTL || in matchRotateOutOfRange()
4316 MI.getOpcode() == TargetOpcode::G_ROTR); in matchRotateOutOfRange()
4330 assert(MI.getOpcode() == TargetOpcode::G_ROTL || in applyRotateOutOfRange()
4331 MI.getOpcode() == TargetOpcode::G_ROTR); in applyRotateOutOfRange()
4345 assert(MI.getOpcode() == TargetOpcode::G_ICMP); in matchICmpToTrueFalseKnownBits()
4422 assert(MI.getOpcode() == TargetOpcode::G_ICMP); in matchICmpToLHSKnownBits()
4453 unsigned Op = TargetOpcode::COPY; in matchICmpToLHSKnownBits()
4455 Op = DstSize < LHSSize ? TargetOpcode::G_TRUNC : TargetOpcode::G_ZEXT; in matchICmpToLHSKnownBits()
4465 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchAndOrDisjointMask()
4500 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in matchBitfieldExtractFromSExtInReg()
4505 if (!LI || !LI->isLegalOrCustom({TargetOpcode::G_SBFX, {Ty, ExtractTy}})) in matchBitfieldExtractFromSExtInReg()
4535 if (LI && !LI->isLegalOrCustom({TargetOpcode::G_UBFX, {Ty, ExtractTy}})) in matchBitfieldExtractFromAnd()
4559 B.buildInstr(TargetOpcode::G_UBFX, {Dst}, {ShiftSrc, LSBCst, WidthCst}); in matchBitfieldExtractFromAnd()
4567 assert(Opcode == TargetOpcode::G_ASHR || Opcode == TargetOpcode::G_LSHR); in matchBitfieldExtractFromShr()
4571 const unsigned ExtrOpcode = Opcode == TargetOpcode::G_ASHR in matchBitfieldExtractFromShr()
4572 ? TargetOpcode::G_SBFX in matchBitfieldExtractFromShr()
4573 : TargetOpcode::G_UBFX; in matchBitfieldExtractFromShr()
4598 if (Opcode == TargetOpcode::G_ASHR && ShlAmt == ShrAmt) in matchBitfieldExtractFromShr()
4616 assert(Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_ASHR); in matchBitfieldExtractFromShrAnd()
4621 if (LI && !LI->isLegalOrCustom({TargetOpcode::G_UBFX, {Ty, ExtractTy}})) in matchBitfieldExtractFromShrAnd()
4659 if (Opcode == TargetOpcode::G_ASHR && Width + ShrAmt == Size) in matchBitfieldExtractFromShrAnd()
4665 B.buildInstr(TargetOpcode::G_UBFX, {Dst}, {AndSrc, PosCst, WidthCst}); in matchBitfieldExtractFromShrAnd()
4700 while (ConvUseOpc == TargetOpcode::G_INTTOPTR || in reassociationCanBreakAddressingModePattern()
4701 ConvUseOpc == TargetOpcode::G_PTRTOINT) { in reassociationCanBreakAddressingModePattern()
4740 if (RHS->getOpcode() != TargetOpcode::G_ADD) in matchReassocConstantInnerRHS()
4943 assert(MI.getOpcode() == TargetOpcode::G_FMA || in matchConstantFoldFMA()
4944 MI.getOpcode() == TargetOpcode::G_FMAD); in matchConstantFoldFMA()
4984 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchNarrowBinopFeedingAnd()
5008 case TargetOpcode::G_ADD: in matchNarrowBinopFeedingAnd()
5009 case TargetOpcode::G_SUB: in matchNarrowBinopFeedingAnd()
5010 case TargetOpcode::G_MUL: in matchNarrowBinopFeedingAnd()
5011 case TargetOpcode::G_AND: in matchNarrowBinopFeedingAnd()
5012 case TargetOpcode::G_OR: in matchNarrowBinopFeedingAnd()
5013 case TargetOpcode::G_XOR: in matchNarrowBinopFeedingAnd()
5039 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_TRUNC, {NarrowTy, WideTy}}) || in matchNarrowBinopFeedingAnd()
5040 !isLegalOrBeforeLegalizer({TargetOpcode::G_ZEXT, {WideTy, NarrowTy}})) in matchNarrowBinopFeedingAnd()
5059 assert(Opc == TargetOpcode::G_UMULO || Opc == TargetOpcode::G_SMULO); in matchMulOBy2()
5066 unsigned NewOpc = Opc == TargetOpcode::G_UMULO ? TargetOpcode::G_UADDO in matchMulOBy2()
5067 : TargetOpcode::G_SADDO; in matchMulOBy2()
5077 assert(MI.getOpcode() == TargetOpcode::G_UMULO || in matchMulOBy0()
5078 MI.getOpcode() == TargetOpcode::G_SMULO); in matchMulOBy0()
5096 assert(MI.getOpcode() == TargetOpcode::G_UADDE || in matchAddEToAddO()
5097 MI.getOpcode() == TargetOpcode::G_SADDE || in matchAddEToAddO()
5098 MI.getOpcode() == TargetOpcode::G_USUBE || in matchAddEToAddO()
5099 MI.getOpcode() == TargetOpcode::G_SSUBE); in matchAddEToAddO()
5105 case TargetOpcode::G_UADDE: in matchAddEToAddO()
5106 NewOpcode = TargetOpcode::G_UADDO; in matchAddEToAddO()
5108 case TargetOpcode::G_SADDE: in matchAddEToAddO()
5109 NewOpcode = TargetOpcode::G_SADDO; in matchAddEToAddO()
5111 case TargetOpcode::G_USUBE: in matchAddEToAddO()
5112 NewOpcode = TargetOpcode::G_USUBO; in matchAddEToAddO()
5114 case TargetOpcode::G_SSUBE: in matchAddEToAddO()
5115 NewOpcode = TargetOpcode::G_SSUBO; in matchAddEToAddO()
5128 assert(MI.getOpcode() == TargetOpcode::G_SUB); in matchSubAddSameReg()
5171 assert(MI.getOpcode() == TargetOpcode::G_UDIV); in buildUDivUsingMul()
5332 assert(MI.getOpcode() == TargetOpcode::G_UDIV); in matchUDivByConst()
5361 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_MUL, {DstTy, DstTy}})) in matchUDivByConst()
5363 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_UMULH, {DstTy}})) in matchUDivByConst()
5366 {TargetOpcode::G_ICMP, in matchUDivByConst()
5382 assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV"); in matchSDivByConst()
5416 assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV"); in buildSDivUsingMul()
5480 assert((MI.getOpcode() == TargetOpcode::G_SDIV || in matchDivByPow2()
5481 MI.getOpcode() == TargetOpcode::G_UDIV) && in matchDivByPow2()
5494 assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV"); in applySDivByPow2()
5553 assert(MI.getOpcode() == TargetOpcode::G_UDIV && "Expected UDIV"); in applyUDivByPow2()
5567 assert(MI.getOpcode() == TargetOpcode::G_UMULH); in matchUMulHToLShr()
5579 return isLegalOrBeforeLegalizer({TargetOpcode::G_LSHR, {Ty, ShiftAmtTy}}); in matchUMulHToLShr()
5601 assert(Opc == TargetOpcode::G_FADD || Opc == TargetOpcode::G_FSUB || in matchRedundantNegOperands()
5602 Opc == TargetOpcode::G_FMUL || Opc == TargetOpcode::G_FDIV || in matchRedundantNegOperands()
5603 Opc == TargetOpcode::G_FMAD || Opc == TargetOpcode::G_FMA); in matchRedundantNegOperands()
5614 isLegalOrBeforeLegalizer({TargetOpcode::G_FSUB, {Type}})) { in matchRedundantNegOperands()
5615 Opc = TargetOpcode::G_FSUB; in matchRedundantNegOperands()
5619 isLegalOrBeforeLegalizer({TargetOpcode::G_FADD, {Type}})) { in matchRedundantNegOperands()
5620 Opc = TargetOpcode::G_FADD; in matchRedundantNegOperands()
5626 else if ((Opc == TargetOpcode::G_FMUL || Opc == TargetOpcode::G_FDIV || in matchRedundantNegOperands()
5627 Opc == TargetOpcode::G_FMAD || Opc == TargetOpcode::G_FMA) && in matchRedundantNegOperands()
5645 assert(MI.getOpcode() == TargetOpcode::G_FSUB); in matchFsubToFneg()
5678 if (MI.getOpcode() != TargetOpcode::G_FMUL) in isContractableFMul()
5709 isLegalOrBeforeLegalizer({TargetOpcode::G_FMA, {DstType}}); in canCombineFMadOrFMA()
5726 assert(MI.getOpcode() == TargetOpcode::G_FADD); in matchCombineFAddFMulToFMadOrFMA()
5737 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFAddFMulToFMadOrFMA()
5774 assert(MI.getOpcode() == TargetOpcode::G_FADD); in matchCombineFAddFpExtFMulToFMadOrFMA()
5788 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFAddFpExtFMulToFMadOrFMA()
5833 assert(MI.getOpcode() == TargetOpcode::G_FADD); in matchCombineFAddFMAFMulToFMadOrFMA()
5846 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFAddFMAFMulToFMadOrFMA()
5861 TargetOpcode::G_FMUL) && in matchCombineFAddFMAFMulToFMadOrFMA()
5870 TargetOpcode::G_FMUL) && in matchCombineFAddFMAFMulToFMadOrFMA()
5898 assert(MI.getOpcode() == TargetOpcode::G_FADD); in matchCombineFAddFpExtFMulToFMadOrFMAAggressive()
5915 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFAddFpExtFMulToFMadOrFMAAggressive()
6024 assert(MI.getOpcode() == TargetOpcode::G_FSUB); in matchCombineFSubFMulToFMadOrFMA()
6045 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFSubFMulToFMadOrFMA()
6076 assert(MI.getOpcode() == TargetOpcode::G_FSUB); in matchCombineFSubFNegFMulToFMadOrFMA()
6087 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFSubFNegFMulToFMadOrFMA()
6123 assert(MI.getOpcode() == TargetOpcode::G_FSUB); in matchCombineFSubFpExtFMulToFMadOrFMA()
6134 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFSubFpExtFMulToFMadOrFMA()
6174 assert(MI.getOpcode() == TargetOpcode::G_FSUB); in matchCombineFSubFpExtFNegFMulToFMadOrFMA()
6186 HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; in matchCombineFSubFpExtFNegFMulToFMadOrFMA()
6237 case TargetOpcode::G_FMINNUM: in matchCombineFMinMaxNaN()
6238 case TargetOpcode::G_FMAXNUM: in matchCombineFMinMaxNaN()
6241 case TargetOpcode::G_FMINIMUM: in matchCombineFMinMaxNaN()
6242 case TargetOpcode::G_FMAXIMUM: in matchCombineFMinMaxNaN()
6260 assert(MI.getOpcode() == TargetOpcode::G_ADD && "Expected a G_ADD"); in matchAddSubSameReg()
6362 return TargetOpcode::G_FMAXNUM; in getFPMinMaxOpcForSelect()
6364 return TargetOpcode::G_FMAXIMUM; in getFPMinMaxOpcForSelect()
6365 if (isLegal({TargetOpcode::G_FMAXNUM, {DstTy}})) in getFPMinMaxOpcForSelect()
6366 return TargetOpcode::G_FMAXNUM; in getFPMinMaxOpcForSelect()
6367 if (isLegal({TargetOpcode::G_FMAXIMUM, {DstTy}})) in getFPMinMaxOpcForSelect()
6368 return TargetOpcode::G_FMAXIMUM; in getFPMinMaxOpcForSelect()
6375 return TargetOpcode::G_FMINNUM; in getFPMinMaxOpcForSelect()
6377 return TargetOpcode::G_FMINIMUM; in getFPMinMaxOpcForSelect()
6378 if (isLegal({TargetOpcode::G_FMINNUM, {DstTy}})) in getFPMinMaxOpcForSelect()
6379 return TargetOpcode::G_FMINNUM; in getFPMinMaxOpcForSelect()
6380 if (!isLegal({TargetOpcode::G_FMINIMUM, {DstTy}})) in getFPMinMaxOpcForSelect()
6382 return TargetOpcode::G_FMINIMUM; in getFPMinMaxOpcForSelect()
6446 if (Opc != TargetOpcode::G_FMAXIMUM && Opc != TargetOpcode::G_FMINIMUM) { in matchFPSelectToMinMax()
6466 assert(MI.getOpcode() == TargetOpcode::G_SELECT); in matchSimplifySelectToMinMax()
6480 assert(MI.getOpcode() == TargetOpcode::G_ICMP); in matchRedundantBinOpInEquality()
6524 case TargetOpcode::G_UADDO: in matchCommuteConstantToRHS()
6525 case TargetOpcode::G_SADDO: in matchCommuteConstantToRHS()
6526 case TargetOpcode::G_UMULO: in matchCommuteConstantToRHS()
6527 case TargetOpcode::G_SMULO: in matchCommuteConstantToRHS()
6541 TargetOpcode::G_CONSTANT_FOLD_BARRIER) in matchCommuteConstantToRHS()
6546 TargetOpcode::G_CONSTANT_FOLD_BARRIER && in matchCommuteConstantToRHS()
6564 case TargetOpcode::G_UADDO: in applyCommuteBinOpOperands()
6565 case TargetOpcode::G_SADDO: in applyCommuteBinOpOperands()
6566 case TargetOpcode::G_UMULO: in applyCommuteBinOpOperands()
6567 case TargetOpcode::G_SMULO: in applyCommuteBinOpOperands()
6934 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_UMAX, DstTy})) in matchSelectIMinMax()
6941 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_SMAX, DstTy})) in matchSelectIMinMax()
6948 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_UMIN, DstTy})) in matchSelectIMinMax()
6955 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_SMIN, DstTy})) in matchSelectIMinMax()
6983 assert(Logic->getOpcode() != TargetOpcode::G_XOR && "unexpected xor"); in tryFoldAndOrOrICmpsUsingRanges()
6984 bool IsAnd = Logic->getOpcode() == TargetOpcode::G_AND; in tryFoldAndOrOrICmpsUsingRanges()
7031 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_AND, CmpOperandTy}) || in tryFoldAndOrOrICmpsUsingRanges()
7032 !isLegalOrBeforeLegalizer({TargetOpcode::G_ADD, CmpOperandTy}) || in tryFoldAndOrOrICmpsUsingRanges()
7142 assert(Logic->getOpcode() != TargetOpcode::G_XOR && "unexpecte xor"); in tryFoldLogicOfFCmps()
7146 bool IsAnd = Logic->getOpcode() == TargetOpcode::G_AND; in tryFoldLogicOfFCmps()
7164 {TargetOpcode::G_FCMP, {CmpTy, CmpOperandTy}}) || in tryFoldLogicOfFCmps()
7253 isLegalOrBeforeLegalizer({TargetOpcode::G_ADD, {DstTy}})) { in matchAddOverflow()
7333 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_ADD, {DstTy}}) || in matchAddOverflow()
7478 isLegalOrBeforeLegalizer({TargetOpcode::G_TRUNC, {DstTy, SrcTy}})) { in matchSextOfTrunc()
7486 isLegalOrBeforeLegalizer({TargetOpcode::G_SEXT, {DstTy, SrcTy}})) { in matchSextOfTrunc()
7511 isLegalOrBeforeLegalizer({TargetOpcode::G_TRUNC, {DstTy, SrcTy}})) { in matchZextOfTrunc()
7519 isLegalOrBeforeLegalizer({TargetOpcode::G_ZEXT, {DstTy, SrcTy}})) { in matchZextOfTrunc()
7541 if (isLegalOrBeforeLegalizer({TargetOpcode::G_SEXT, {DstTy, SrcTy}}) && in matchNonNegZext()